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torvaldstorvalds
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Merge tag 'drm-fixes-2023-10-20' of git://anongit.freedesktop.org/drm/drm
Pull drm fixes from Dave Airlie: "Regular fixes for the week, amdgpu, i915, nouveau, with some other scattered around, nothing major. amdgpu: - Fix possible NULL pointer dereference - Avoid possible BUG_ON in GPUVM updates - Disable AMD_CTX_PRIORITY_UNSET i915: - Fix display issue that was blocking S0ix - Retry gtt fault when out of fence registers bridge: - ti-sn65dsi86: Fix device lifetime edid: - Add quirk for BenQ GW2765 ivpu: - Extend address range for MMU mmap nouveau: - DP-connector fixes - Documentation fixes panel: - Move AUX B116XW03 into panel-simple scheduler: - Eliminate DRM_SCHED_PRIORITY_UNSET ttm: - Fix possible NULL-ptr deref in cleanup mediatek: - Correctly free sg_table in gem prime vmap" * tag 'drm-fixes-2023-10-20' of git://anongit.freedesktop.org/drm/drm: drm/amdgpu: Reserve fences for VM update drm/amdgpu: Fix possible null pointer dereference accel/ivpu: Extend address range for MMU mmap Revert "accel/ivpu: Use cached buffers for FW loading" accel/ivpu: Don't enter d0i3 during FLR drm/i915: Retry gtt fault when out of fence registers drm/i915/cx0: Only clear/set the Pipe Reset bit of the PHY Lanes Owned gpu/drm: Eliminate DRM_SCHED_PRIORITY_UNSET drm/amdgpu: Unset context priority is now invalid drm/mediatek: Correctly free sg_table in gem prime vmap drm/edid: add 8 bpc quirk to the BenQ GW2765 drm/ttm: Reorder sys manager cleanup step drm/nouveau/disp: fix DP capable DSM connectors drm/nouveau: exec: fix ioctl kernel-doc warning drm/panel: Move AUX B116XW03 out of panel-edp back to panel-simple drm/bridge: ti-sn65dsi86: Associate DSI device lifetime with auxiliary device
2 parents 0df072a + 8b35ce3 commit c8045b4

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23 files changed

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-72
lines changed

23 files changed

+109
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lines changed

‎drivers/accel/ivpu/ivpu_drv.c‎

Lines changed: 8 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -367,14 +367,19 @@ int ivpu_boot(struct ivpu_device *vdev)
367367
return 0;
368368
}
369369

370-
int ivpu_shutdown(struct ivpu_device *vdev)
370+
void ivpu_prepare_for_reset(struct ivpu_device *vdev)
371371
{
372-
int ret;
373-
374372
ivpu_hw_irq_disable(vdev);
375373
disable_irq(vdev->irq);
376374
ivpu_ipc_disable(vdev);
377375
ivpu_mmu_disable(vdev);
376+
}
377+
378+
int ivpu_shutdown(struct ivpu_device *vdev)
379+
{
380+
int ret;
381+
382+
ivpu_prepare_for_reset(vdev);
378383

379384
ret = ivpu_hw_power_down(vdev);
380385
if (ret)

‎drivers/accel/ivpu/ivpu_drv.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -151,6 +151,7 @@ void ivpu_file_priv_put(struct ivpu_file_priv **link);
151151

152152
int ivpu_boot(struct ivpu_device *vdev);
153153
int ivpu_shutdown(struct ivpu_device *vdev);
154+
void ivpu_prepare_for_reset(struct ivpu_device *vdev);
154155

155156
static inline u8 ivpu_revision(struct ivpu_device *vdev)
156157
{

‎drivers/accel/ivpu/ivpu_fw.c‎

Lines changed: 4 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -220,8 +220,7 @@ static int ivpu_fw_mem_init(struct ivpu_device *vdev)
220220
if (ret)
221221
return ret;
222222

223-
fw->mem = ivpu_bo_alloc_internal(vdev, fw->runtime_addr, fw->runtime_size,
224-
DRM_IVPU_BO_CACHED | DRM_IVPU_BO_NOSNOOP);
223+
fw->mem = ivpu_bo_alloc_internal(vdev, fw->runtime_addr, fw->runtime_size, DRM_IVPU_BO_WC);
225224
if (!fw->mem) {
226225
ivpu_err(vdev, "Failed to allocate firmware runtime memory\n");
227226
return -ENOMEM;
@@ -331,7 +330,7 @@ int ivpu_fw_load(struct ivpu_device *vdev)
331330
memset(start, 0, size);
332331
}
333332

334-
clflush_cache_range(fw->mem->kvaddr, fw->mem->base.size);
333+
wmb(); /* Flush WC buffers after writing fw->mem */
335334

336335
return 0;
337336
}
@@ -433,7 +432,7 @@ void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params
433432
if (!ivpu_fw_is_cold_boot(vdev)) {
434433
boot_params->save_restore_ret_address = 0;
435434
vdev->pm->is_warmboot = true;
436-
clflush_cache_range(vdev->fw->mem->kvaddr, SZ_4K);
435+
wmb(); /* Flush WC buffers after writing save_restore_ret_address */
437436
return;
438437
}
439438

@@ -495,7 +494,7 @@ void ivpu_fw_boot_params_setup(struct ivpu_device *vdev, struct vpu_boot_params
495494
boot_params->punit_telemetry_sram_size = ivpu_hw_reg_telemetry_size_get(vdev);
496495
boot_params->vpu_telemetry_enable = ivpu_hw_reg_telemetry_enable_get(vdev);
497496

498-
clflush_cache_range(vdev->fw->mem->kvaddr, SZ_4K);
497+
wmb(); /* Flush WC buffers after writing bootparams */
499498

500499
ivpu_fw_boot_params_print(vdev, boot_params);
501500
}

‎drivers/accel/ivpu/ivpu_gem.h‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8,8 +8,6 @@
88
#include <drm/drm_gem.h>
99
#include <drm/drm_mm.h>
1010

11-
#define DRM_IVPU_BO_NOSNOOP 0x10000000
12-
1311
struct dma_buf;
1412
struct ivpu_bo_ops;
1513
struct ivpu_file_priv;
@@ -85,9 +83,6 @@ static inline u32 ivpu_bo_cache_mode(struct ivpu_bo *bo)
8583

8684
static inline bool ivpu_bo_is_snooped(struct ivpu_bo *bo)
8785
{
88-
if (bo->flags & DRM_IVPU_BO_NOSNOOP)
89-
return false;
90-
9186
return ivpu_bo_cache_mode(bo) == DRM_IVPU_BO_CACHED;
9287
}
9388

‎drivers/accel/ivpu/ivpu_hw.h‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,7 @@ struct ivpu_hw_ops {
1313
int (*power_up)(struct ivpu_device *vdev);
1414
int (*boot_fw)(struct ivpu_device *vdev);
1515
int (*power_down)(struct ivpu_device *vdev);
16+
int (*reset)(struct ivpu_device *vdev);
1617
bool (*is_idle)(struct ivpu_device *vdev);
1718
void (*wdt_disable)(struct ivpu_device *vdev);
1819
void (*diagnose_failure)(struct ivpu_device *vdev);
@@ -91,6 +92,13 @@ static inline int ivpu_hw_power_down(struct ivpu_device *vdev)
9192
return vdev->hw->ops->power_down(vdev);
9293
};
9394

95+
static inline int ivpu_hw_reset(struct ivpu_device *vdev)
96+
{
97+
ivpu_dbg(vdev, PM, "HW reset\n");
98+
99+
return vdev->hw->ops->reset(vdev);
100+
};
101+
94102
static inline void ivpu_hw_wdt_disable(struct ivpu_device *vdev)
95103
{
96104
vdev->hw->ops->wdt_disable(vdev);

‎drivers/accel/ivpu/ivpu_hw_37xx.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1029,6 +1029,7 @@ const struct ivpu_hw_ops ivpu_hw_37xx_ops = {
10291029
.power_up = ivpu_hw_37xx_power_up,
10301030
.is_idle = ivpu_hw_37xx_is_idle,
10311031
.power_down = ivpu_hw_37xx_power_down,
1032+
.reset = ivpu_hw_37xx_reset,
10321033
.boot_fw = ivpu_hw_37xx_boot_fw,
10331034
.wdt_disable = ivpu_hw_37xx_wdt_disable,
10341035
.diagnose_failure = ivpu_hw_37xx_diagnose_failure,

‎drivers/accel/ivpu/ivpu_hw_40xx.c‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1179,6 +1179,7 @@ const struct ivpu_hw_ops ivpu_hw_40xx_ops = {
11791179
.power_up = ivpu_hw_40xx_power_up,
11801180
.is_idle = ivpu_hw_40xx_is_idle,
11811181
.power_down = ivpu_hw_40xx_power_down,
1182+
.reset = ivpu_hw_40xx_reset,
11821183
.boot_fw = ivpu_hw_40xx_boot_fw,
11831184
.wdt_disable = ivpu_hw_40xx_wdt_disable,
11841185
.diagnose_failure = ivpu_hw_40xx_diagnose_failure,

‎drivers/accel/ivpu/ivpu_mmu_context.c‎

Lines changed: 3 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111
#include "ivpu_mmu.h"
1212
#include "ivpu_mmu_context.h"
1313

14+
#define IVPU_MMU_VPU_ADDRESS_MASK GENMASK(47, 12)
1415
#define IVPU_MMU_PGD_INDEX_MASK GENMASK(47, 39)
1516
#define IVPU_MMU_PUD_INDEX_MASK GENMASK(38, 30)
1617
#define IVPU_MMU_PMD_INDEX_MASK GENMASK(29, 21)
@@ -328,12 +329,8 @@ ivpu_mmu_context_map_sgt(struct ivpu_device *vdev, struct ivpu_mmu_context *ctx,
328329

329330
if (!IS_ALIGNED(vpu_addr, IVPU_MMU_PAGE_SIZE))
330331
return -EINVAL;
331-
/*
332-
* VPU is only 32 bit, but DMA engine is 38 bit
333-
* Ranges < 2 GB are reserved for VPU internal registers
334-
* Limit range to 8 GB
335-
*/
336-
if (vpu_addr < SZ_2G || vpu_addr > SZ_8G)
332+
333+
if (vpu_addr & ~IVPU_MMU_VPU_ADDRESS_MASK)
337334
return -EINVAL;
338335

339336
prot = IVPU_MMU_ENTRY_MAPPED;

‎drivers/accel/ivpu/ivpu_pm.c‎

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -261,7 +261,8 @@ void ivpu_pm_reset_prepare_cb(struct pci_dev *pdev)
261261
ivpu_dbg(vdev, PM, "Pre-reset..\n");
262262
atomic_inc(&vdev->pm->reset_counter);
263263
atomic_set(&vdev->pm->in_reset, 1);
264-
ivpu_shutdown(vdev);
264+
ivpu_prepare_for_reset(vdev);
265+
ivpu_hw_reset(vdev);
265266
ivpu_pm_prepare_cold_boot(vdev);
266267
ivpu_jobs_abort_all(vdev);
267268
ivpu_dbg(vdev, PM, "Pre-reset done.\n");

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c‎

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -47,14 +47,14 @@ const unsigned int amdgpu_ctx_num_entities[AMDGPU_HW_IP_NUM] = {
4747
bool amdgpu_ctx_priority_is_valid(int32_t ctx_prio)
4848
{
4949
switch (ctx_prio) {
50-
case AMDGPU_CTX_PRIORITY_UNSET:
5150
case AMDGPU_CTX_PRIORITY_VERY_LOW:
5251
case AMDGPU_CTX_PRIORITY_LOW:
5352
case AMDGPU_CTX_PRIORITY_NORMAL:
5453
case AMDGPU_CTX_PRIORITY_HIGH:
5554
case AMDGPU_CTX_PRIORITY_VERY_HIGH:
5655
return true;
5756
default:
57+
case AMDGPU_CTX_PRIORITY_UNSET:
5858
return false;
5959
}
6060
}
@@ -64,7 +64,8 @@ amdgpu_ctx_to_drm_sched_prio(int32_t ctx_prio)
6464
{
6565
switch (ctx_prio) {
6666
case AMDGPU_CTX_PRIORITY_UNSET:
67-
return DRM_SCHED_PRIORITY_UNSET;
67+
pr_warn_once("AMD-->DRM context priority value UNSET-->NORMAL");
68+
return DRM_SCHED_PRIORITY_NORMAL;
6869

6970
case AMDGPU_CTX_PRIORITY_VERY_LOW:
7071
return DRM_SCHED_PRIORITY_MIN;

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