@@ -147,6 +147,25 @@ struct rockchip_pmu {
147147 .active_wakeup = wakeup, \
148148}
149149
150+ #define DOMAIN_M_O_R_G (_name , p_offset , pwr , status , m_offset , m_status , r_status , r_offset , req , idle , ack , g_mask , wakeup ) \
151+ { \
152+ .name = _name, \
153+ .pwr_offset = p_offset, \
154+ .pwr_w_mask = (pwr) << 16, \
155+ .pwr_mask = (pwr), \
156+ .status_mask = (status), \
157+ .mem_offset = m_offset, \
158+ .mem_status_mask = (m_status), \
159+ .repair_status_mask = (r_status), \
160+ .req_offset = r_offset, \
161+ .req_w_mask = (req) << 16, \
162+ .req_mask = (req), \
163+ .idle_mask = (idle), \
164+ .clk_ungate_mask = (g_mask), \
165+ .ack_mask = (ack), \
166+ .active_wakeup = wakeup, \
167+ }
168+
150169#define DOMAIN_RK3036 (_name , req , ack , idle , wakeup ) \
151170{ \
152171 .name = _name, \
@@ -178,8 +197,8 @@ struct rockchip_pmu {
178197#define DOMAIN_RK3568 (name , pwr , req , wakeup ) \
179198 DOMAIN_M(name, pwr, pwr, req, req, req, wakeup)
180199
181- #define DOMAIN_RK3576 (name , p_offset , pwr , status , r_status , r_offset , req , idle , wakeup ) \
182- DOMAIN_M_O_R (name, p_offset, pwr, status, 0, r_status, r_status, r_offset, req, idle, idle, wakeup)
200+ #define DOMAIN_RK3576 (name , p_offset , pwr , status , r_status , r_offset , req , idle , g_mask , wakeup ) \
201+ DOMAIN_M_O_R_G (name, p_offset, pwr, status, 0, r_status, r_status, r_offset, req, idle, idle, g_mask , wakeup)
183202
184203/*
185204 * Dynamic Memory Controller may need to coordinate with us -- see
@@ -1124,25 +1143,25 @@ static const struct rockchip_domain_info rk3568_pm_domains[] = {
11241143};
11251144
11261145static const struct rockchip_domain_info rk3576_pm_domains [] = {
1127- [RK3576_PD_NPU ] = DOMAIN_RK3576 ("npu" , 0x0 , BIT (0 ), BIT (0 ), 0 , 0x0 , 0 , 0 , false),
1128- [RK3576_PD_NVM ] = DOMAIN_RK3576 ("nvm" , 0x0 , BIT (6 ), 0 , BIT (6 ), 0x4 , BIT (2 ), BIT (18 ), false),
1129- [RK3576_PD_SDGMAC ] = DOMAIN_RK3576 ("sdgmac" , 0x0 , BIT (7 ), 0 , BIT (7 ), 0x4 , BIT (1 ), BIT (17 ), false),
1130- [RK3576_PD_AUDIO ] = DOMAIN_RK3576 ("audio" , 0x0 , BIT (8 ), 0 , BIT (8 ), 0x4 , BIT (0 ), BIT (16 ), false),
1131- [RK3576_PD_PHP ] = DOMAIN_RK3576 ("php" , 0x0 , BIT (9 ), 0 , BIT (9 ), 0x0 , BIT (15 ), BIT (15 ), false),
1132- [RK3576_PD_SUBPHP ] = DOMAIN_RK3576 ("subphp" , 0x0 , BIT (10 ), 0 , BIT (10 ), 0x0 , 0 , 0 , false),
1133- [RK3576_PD_VOP ] = DOMAIN_RK3576 ("vop" , 0x0 , BIT (11 ), 0 , BIT (11 ), 0x0 , 0x6000 , 0x6000 , false),
1134- [RK3576_PD_VO1 ] = DOMAIN_RK3576 ("vo1" , 0x0 , BIT (14 ), 0 , BIT (14 ), 0x0 , BIT (12 ), BIT (12 ), false),
1135- [RK3576_PD_VO0 ] = DOMAIN_RK3576 ("vo0" , 0x0 , BIT (15 ), 0 , BIT (15 ), 0x0 , BIT (11 ), BIT (11 ), false),
1136- [RK3576_PD_USB ] = DOMAIN_RK3576 ("usb" , 0x4 , BIT (0 ), 0 , BIT (16 ), 0x0 , BIT (10 ), BIT (10 ), true),
1137- [RK3576_PD_VI ] = DOMAIN_RK3576 ("vi" , 0x4 , BIT (1 ), 0 , BIT (17 ), 0x0 , BIT (9 ), BIT (9 ), false),
1138- [RK3576_PD_VEPU0 ] = DOMAIN_RK3576 ("vepu0" , 0x4 , BIT (2 ), 0 , BIT (18 ), 0x0 , BIT (7 ), BIT (7 ), false),
1139- [RK3576_PD_VEPU1 ] = DOMAIN_RK3576 ("vepu1" , 0x4 , BIT (3 ), 0 , BIT (19 ), 0x0 , BIT (8 ), BIT (8 ), false),
1140- [RK3576_PD_VDEC ] = DOMAIN_RK3576 ("vdec" , 0x4 , BIT (4 ), 0 , BIT (20 ), 0x0 , BIT (6 ), BIT (6 ), false),
1141- [RK3576_PD_VPU ] = DOMAIN_RK3576 ("vpu" , 0x4 , BIT (5 ), 0 , BIT (21 ), 0x0 , BIT (5 ), BIT (5 ), false),
1142- [RK3576_PD_NPUTOP ] = DOMAIN_RK3576 ("nputop" , 0x4 , BIT (6 ), 0 , BIT (22 ), 0x0 , 0x18 , 0x18 , false),
1143- [RK3576_PD_NPU0 ] = DOMAIN_RK3576 ("npu0" , 0x4 , BIT (7 ), 0 , BIT (23 ), 0x0 , BIT (1 ), BIT (1 ), false),
1144- [RK3576_PD_NPU1 ] = DOMAIN_RK3576 ("npu1" , 0x4 , BIT (8 ), 0 , BIT (24 ), 0x0 , BIT (2 ), BIT (2 ), false),
1145- [RK3576_PD_GPU ] = DOMAIN_RK3576 ("gpu" , 0x4 , BIT (9 ), 0 , BIT (25 ), 0x0 , BIT (0 ), BIT (0 ), false),
1146+ [RK3576_PD_NPU ] = DOMAIN_RK3576 ("npu" , 0x0 , BIT (0 ), BIT (0 ), 0 , 0x0 , 0 , 0 , 0 , false),
1147+ [RK3576_PD_NVM ] = DOMAIN_RK3576 ("nvm" , 0x0 , BIT (6 ), 0 , BIT (6 ), 0x4 , BIT (2 ), BIT (18 ), BIT ( 2 ), false),
1148+ [RK3576_PD_SDGMAC ] = DOMAIN_RK3576 ("sdgmac" , 0x0 , BIT (7 ), 0 , BIT (7 ), 0x4 , BIT (1 ), BIT (17 ), 0x6 , false),
1149+ [RK3576_PD_AUDIO ] = DOMAIN_RK3576 ("audio" , 0x0 , BIT (8 ), 0 , BIT (8 ), 0x4 , BIT (0 ), BIT (16 ), BIT ( 0 ), false),
1150+ [RK3576_PD_PHP ] = DOMAIN_RK3576 ("php" , 0x0 , BIT (9 ), 0 , BIT (9 ), 0x0 , BIT (15 ), BIT (15 ), BIT ( 15 ), false),
1151+ [RK3576_PD_SUBPHP ] = DOMAIN_RK3576 ("subphp" , 0x0 , BIT (10 ), 0 , BIT (10 ), 0x0 , 0 , 0 , 0 , false),
1152+ [RK3576_PD_VOP ] = DOMAIN_RK3576 ("vop" , 0x0 , BIT (11 ), 0 , BIT (11 ), 0x0 , 0x6000 , 0x6000 , 0x6000 , false),
1153+ [RK3576_PD_VO1 ] = DOMAIN_RK3576 ("vo1" , 0x0 , BIT (14 ), 0 , BIT (14 ), 0x0 , BIT (12 ), BIT (12 ), 0x7000 , false),
1154+ [RK3576_PD_VO0 ] = DOMAIN_RK3576 ("vo0" , 0x0 , BIT (15 ), 0 , BIT (15 ), 0x0 , BIT (11 ), BIT (11 ), 0x6800 , false),
1155+ [RK3576_PD_USB ] = DOMAIN_RK3576 ("usb" , 0x4 , BIT (0 ), 0 , BIT (16 ), 0x0 , BIT (10 ), BIT (10 ), 0x6400 , true),
1156+ [RK3576_PD_VI ] = DOMAIN_RK3576 ("vi" , 0x4 , BIT (1 ), 0 , BIT (17 ), 0x0 , BIT (9 ), BIT (9 ), BIT ( 9 ), false),
1157+ [RK3576_PD_VEPU0 ] = DOMAIN_RK3576 ("vepu0" , 0x4 , BIT (2 ), 0 , BIT (18 ), 0x0 , BIT (7 ), BIT (7 ), 0x280 , false),
1158+ [RK3576_PD_VEPU1 ] = DOMAIN_RK3576 ("vepu1" , 0x4 , BIT (3 ), 0 , BIT (19 ), 0x0 , BIT (8 ), BIT (8 ), BIT ( 8 ), false),
1159+ [RK3576_PD_VDEC ] = DOMAIN_RK3576 ("vdec" , 0x4 , BIT (4 ), 0 , BIT (20 ), 0x0 , BIT (6 ), BIT (6 ), BIT ( 6 ), false),
1160+ [RK3576_PD_VPU ] = DOMAIN_RK3576 ("vpu" , 0x4 , BIT (5 ), 0 , BIT (21 ), 0x0 , BIT (5 ), BIT (5 ), BIT ( 5 ), false),
1161+ [RK3576_PD_NPUTOP ] = DOMAIN_RK3576 ("nputop" , 0x4 , BIT (6 ), 0 , BIT (22 ), 0x0 , 0x18 , 0x18 , 0x18 , false),
1162+ [RK3576_PD_NPU0 ] = DOMAIN_RK3576 ("npu0" , 0x4 , BIT (7 ), 0 , BIT (23 ), 0x0 , BIT (1 ), BIT (1 ), 0x1a , false),
1163+ [RK3576_PD_NPU1 ] = DOMAIN_RK3576 ("npu1" , 0x4 , BIT (8 ), 0 , BIT (24 ), 0x0 , BIT (2 ), BIT (2 ), 0x1c , false),
1164+ [RK3576_PD_GPU ] = DOMAIN_RK3576 ("gpu" , 0x4 , BIT (9 ), 0 , BIT (25 ), 0x0 , BIT (0 ), BIT (0 ), BIT ( 0 ), false),
11461165};
11471166
11481167static const struct rockchip_domain_info rk3588_pm_domains [] = {
@@ -1333,6 +1352,7 @@ static const struct rockchip_pmu_info rk3576_pmu = {
13331352 .idle_offset = 0x128 ,
13341353 .ack_offset = 0x120 ,
13351354 .repair_status_offset = 0x570 ,
1355+ .clk_ungate_offset = 0x140 ,
13361356
13371357 .num_domains = ARRAY_SIZE (rk3576_pm_domains ),
13381358 .domain_info = rk3576_pm_domains ,
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