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2 parents 657a292 + 2335c9c commit d7ac67bCopy full SHA for d7ac67b
arch/arm/Kconfig
@@ -86,6 +86,7 @@ config ARM
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select HAVE_ARCH_PFN_VALID
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select HAVE_ARCH_SECCOMP
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select HAVE_ARCH_SECCOMP_FILTER if AEABI && !OABI_COMPAT
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+ select HAVE_ARCH_STACKLEAK
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select HAVE_ARCH_THREAD_STRUCT_WHITELIST
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select HAVE_ARCH_TRACEHOOK
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select HAVE_ARCH_TRANSPARENT_HUGEPAGE if ARM_LPAE
@@ -115,6 +116,7 @@ config ARM
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select HAVE_KERNEL_XZ
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select HAVE_KPROBES if !XIP_KERNEL && !CPU_ENDIAN_BE32 && !CPU_V7M
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select HAVE_KRETPROBES if HAVE_KPROBES
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+ select HAVE_LD_DEAD_CODE_DATA_ELIMINATION
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select HAVE_MOD_ARCH_SPECIFIC
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select HAVE_NMI
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select HAVE_OPTPROBES if !THUMB2_KERNEL
@@ -735,7 +737,7 @@ config ARM_ERRATA_764319
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bool "ARM errata: Read to DBGPRSR and DBGOSLSR may generate Undefined instruction"
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depends on CPU_V7
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help
- This option enables the workaround for the 764319 Cortex A-9 erratum.
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+ This option enables the workaround for the 764319 Cortex-A9 erratum.
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CP14 read accesses to the DBGPRSR and DBGOSLSR registers generate an
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unexpected Undefined Instruction exception when the DBGSWENABLE
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external pin is set to 0, even when the CP14 accesses are performed
arch/arm/boot/compressed/Makefile
@@ -9,6 +9,7 @@ OBJS =
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HEAD = head.o
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OBJS += misc.o decompress.o
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+CFLAGS_decompress.o += $(DISABLE_STACKLEAK_PLUGIN)
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ifeq ($(CONFIG_DEBUG_UNCOMPRESS),y)
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OBJS += debug.o
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AFLAGS_head.o += -DDEBUG
arch/arm/boot/compressed/vmlinux.lds.S
@@ -125,7 +125,7 @@ SECTIONS
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. = BSS_START;
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__bss_start = .;
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- .bss : { *(.bss) }
+ .bss : { *(.bss .bss.*) }
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_end = .;
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. = ALIGN(8); /* the stack must be 64-bit aligned */
arch/arm/include/asm/stacktrace.h
@@ -26,6 +26,13 @@ struct stackframe {
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#endif
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};
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+static inline bool on_thread_stack(void)
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+{
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+ unsigned long delta = current_stack_pointer ^ (unsigned long)current->stack;
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+
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+ return delta < THREAD_SIZE;
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+}
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static __always_inline
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void arm_get_current_stackframe(struct pt_regs *regs, struct stackframe *frame)
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{
arch/arm/include/asm/vmlinux.lds.h
@@ -42,7 +42,7 @@
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#define PROC_INFO \
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. = ALIGN(4); \
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__proc_info_begin = .; \
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- *(.proc.info.init) \
+ KEEP(*(.proc.info.init)) \
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__proc_info_end = .;
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#define IDMAP_TEXT \
arch/arm/kernel/entry-armv.S
@@ -1065,6 +1065,7 @@ vector_addrexcptn:
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.globl vector_fiq
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.section .vectors, "ax", %progbits
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+ .reloc .text, R_ARM_NONE, .
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W(b) vector_rst
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W(b) vector_und
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ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_swi )
@@ -1078,6 +1079,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_swi )
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#ifdef CONFIG_HARDEN_BRANCH_HISTORY
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.section .vectors.bhb.loop8, "ax", %progbits
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W(b) vector_bhb_loop8_und
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ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_loop8_swi )
@@ -1090,6 +1092,7 @@ THUMB( .reloc ., R_ARM_THM_PC12, .L__vector_bhb_loop8_swi )
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W(b) vector_bhb_loop8_fiq
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.section .vectors.bhb.bpiall, "ax", %progbits
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W(b) vector_bhb_bpiall_und
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ARM( .reloc ., R_ARM_LDR_PC_G0, .L__vector_bhb_bpiall_swi )
arch/arm/kernel/entry-common.S
@@ -119,6 +119,9 @@ no_work_pending:
ct_user_enter save = 0
+#ifdef CONFIG_GCC_PLUGIN_STACKLEAK
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+ bl stackleak_erase_on_task_stack
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+#endif
restore_user_regs fast = 0, offset = 0
ENDPROC(ret_to_user_from_irq)
ENDPROC(ret_to_user)
arch/arm/kernel/module.c
@@ -395,11 +395,6 @@ apply_relocate(Elf32_Shdr *sechdrs, const char *strtab, unsigned int symindex,
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return 0;
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}
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-struct mod_unwind_map {
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- const Elf_Shdr *unw_sec;
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- const Elf_Shdr *txt_sec;
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-};
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-
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static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
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const Elf_Shdr *sechdrs, const char *name)
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arch/arm/kernel/vmlinux-xip.lds.S
@@ -63,7 +63,7 @@ SECTIONS
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. = ALIGN(4);
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__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
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__start___ex_table = .;
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- ARM_MMU_KEEP(*(__ex_table))
+ ARM_MMU_KEEP(KEEP(*(__ex_table)))
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__stop___ex_table = .;
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@@ -83,7 +83,7 @@ SECTIONS
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.init.arch.info : {
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__arch_info_begin = .;
- *(.arch.info.init)
+ KEEP(*(.arch.info.init))
__arch_info_end = .;
.init.tagtable : {
arch/arm/kernel/vmlinux.lds.S
@@ -74,7 +74,7 @@ SECTIONS
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@@ -99,7 +99,7 @@ SECTIONS
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@@ -116,7 +116,7 @@ SECTIONS
.init.pv_table : {
__pv_table_begin = .;
- *(.pv_table)
+ KEEP(*(.pv_table))
__pv_table_end = .;
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