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Merge tag 'drm-xe-fixes-2024-08-29' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-fixes
- Invalidate media_gt TLBs (Brost) - Fix HWMON i1 power setup write command (Karthik) Signed-off-by: Dave Airlie <[email protected]> From: Rodrigo Vivi <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
2 parents 9941b5b + 59d237c commit dde72a5

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+25
-14
lines changed

2 files changed

+25
-14
lines changed

drivers/gpu/drm/xe/xe_hwmon.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -450,7 +450,7 @@ static int xe_hwmon_pcode_write_i1(struct xe_gt *gt, u32 uval)
450450
{
451451
return xe_pcode_write(gt, PCODE_MBOX(PCODE_POWER_SETUP,
452452
POWER_SETUP_SUBCOMMAND_WRITE_I1, 0),
453-
uval);
453+
(uval & POWER_SETUP_I1_DATA_MASK));
454454
}
455455

456456
static int xe_hwmon_power_curr_crit_read(struct xe_hwmon *hwmon, int channel,

drivers/gpu/drm/xe/xe_vm.c

Lines changed: 24 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -3341,9 +3341,10 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
33413341
{
33423342
struct xe_device *xe = xe_vma_vm(vma)->xe;
33433343
struct xe_tile *tile;
3344-
struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE];
3345-
u32 tile_needs_invalidate = 0;
3344+
struct xe_gt_tlb_invalidation_fence
3345+
fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
33463346
u8 id;
3347+
u32 fence_id = 0;
33473348
int ret = 0;
33483349

33493350
xe_assert(xe, !xe_vma_is_null(vma));
@@ -3371,27 +3372,37 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
33713372
if (xe_pt_zap_ptes(tile, vma)) {
33723373
xe_device_wmb(xe);
33733374
xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
3374-
&fence[id], true);
3375+
&fence[fence_id],
3376+
true);
33753377

3376-
/*
3377-
* FIXME: We potentially need to invalidate multiple
3378-
* GTs within the tile
3379-
*/
33803378
ret = xe_gt_tlb_invalidation_vma(tile->primary_gt,
3381-
&fence[id], vma);
3379+
&fence[fence_id], vma);
33823380
if (ret < 0) {
3383-
xe_gt_tlb_invalidation_fence_fini(&fence[id]);
3381+
xe_gt_tlb_invalidation_fence_fini(&fence[fence_id]);
33843382
goto wait;
33853383
}
3384+
++fence_id;
33863385

3387-
tile_needs_invalidate |= BIT(id);
3386+
if (!tile->media_gt)
3387+
continue;
3388+
3389+
xe_gt_tlb_invalidation_fence_init(tile->media_gt,
3390+
&fence[fence_id],
3391+
true);
3392+
3393+
ret = xe_gt_tlb_invalidation_vma(tile->media_gt,
3394+
&fence[fence_id], vma);
3395+
if (ret < 0) {
3396+
xe_gt_tlb_invalidation_fence_fini(&fence[fence_id]);
3397+
goto wait;
3398+
}
3399+
++fence_id;
33883400
}
33893401
}
33903402

33913403
wait:
3392-
for_each_tile(tile, xe, id)
3393-
if (tile_needs_invalidate & BIT(id))
3394-
xe_gt_tlb_invalidation_fence_wait(&fence[id]);
3404+
for (id = 0; id < fence_id; ++id)
3405+
xe_gt_tlb_invalidation_fence_wait(&fence[id]);
33953406

33963407
vma->tile_invalidated = vma->tile_mask;
33973408

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