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Merge tag 'drm-next-2025-06-06' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie: "This is pretty much two weeks worth of fixes, plus one thing that might be considered next: amdkfd is now able to be enabled on risc-v platforms. Otherwise, amdgpu and xe with the majority of fixes, and then a smattering all over. panel: - nt37801: fix IS_ERR - nt37801: fix KConfig connector: - Fix null deref in HDMI audio helper. bridge: - analogix_dp: fixup clk-disable removal nouveau: - minor typo fix (',' vs ';') msm: - mailmap updates i915: - Fix the enabling/disabling of DP audio SDP splitting - Fix PSR register definitions for ALPM - Fix u32 overflow in SNPS PHY HDMI PLL setup - Fix GuC pending message underflow when submit fails - Fix GuC wakeref underflow race during reset xe: - Two documentation fixes - A couple of vm init fixes - Hwmon fixes - Drop reduntant conversion to bool - Fix CONFIG_INTEL_VSEC dependency - Rework eviction rejection of bound external bos - Stop re-submitting signalled jobs - A couple of pxp fixes - Add back a fix that got lost in a merge - Create LRC bo without VM - Fix for the above fix amdgpu: - UserQ fixes - SMU 13.x fixes - VCN fixes - JPEG fixes - Misc cleanups - runtime pm fix - DCN 4.0.1 fixes - Misc display fixes - ISP fix - VRAM manager fix - RAS fixes - IP discovery fix - Cleaner shader fix for GC 10.1.x - OD fix - Non-OLED panel fix - Misc display fixes - Brightness fixes amdkfd: - Enable CONFIG_HSA_AMD on RISCV - SVM fix - Misc cleanups - Ref leak fix - WPTR BO fix radeon: - Misc cleanups" * tag 'drm-next-2025-06-06' of https://gitlab.freedesktop.org/drm/kernel: (105 commits) drm/nouveau/vfn/r535: Convert comma to semicolon drm/xe: remove unmatched xe_vm_unlock() from __xe_exec_queue_init() drm/xe: Create LRC BO without VM drm/xe/guc_submit: add back fix drm/xe/pxp: Clarify PXP queue creation behavior if PXP is not ready drm/xe/pxp: Use the correct define in the set_property_funcs array drm/xe/sched: stop re-submitting signalled jobs drm/xe: Rework eviction rejection of bound external bos drm/xe/vsec: fix CONFIG_INTEL_VSEC dependency drm/xe: drop redundant conversion to bool drm/xe/hwmon: Move card reactive critical power under channel card drm/xe/hwmon: Add support to manage power limits though mailbox drm/xe/vm: move xe_svm_init() earlier drm/xe/vm: move rebind_work init earlier MAINTAINERS: .mailmap: update Rob Clark's email address mailmap: Update entry for Akhil P Oommen MAINTAINERS: update my email address MAINTAINERS: drop myself as maintainer drm/i915/display: Fix u32 overflow in SNPS PHY HDMI PLL setup drm/amd/display: Fix default DC and AC levels ...
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‎.mailmap‎

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@@ -21,7 +21,8 @@ Adam Radford <[email protected]>
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Adriana Reus <[email protected]> <[email protected]>
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Adrian Bunk <[email protected]>
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Ajay Kaher <[email protected]> <[email protected]>
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Akhil P Oommen <[email protected]> <[email protected]>
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Akhil P Oommen <[email protected]> <[email protected]>
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Akhil P Oommen <[email protected]> <[email protected]>
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Alan Cox <[email protected]>
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Alan Cox <[email protected]>
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Aleksandar Markovic <[email protected]> <[email protected]>
@@ -640,6 +641,8 @@ Richard Genoud <[email protected]> <[email protected]>
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Richard Leitner <[email protected]> <[email protected]>
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Richard Leitner <[email protected]> <[email protected]>
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Richard Leitner <[email protected]> <[email protected]>
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Rob Clark <[email protected]> <[email protected]>
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Rob Clark <[email protected]> <[email protected]>
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Robert Foss <[email protected]> <[email protected]>
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Rocky Liao <[email protected]> <[email protected]>
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Rodrigo Siqueira <[email protected]> <[email protected]>

‎Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon‎

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@@ -60,26 +60,26 @@ Description: RO. Package default power limit (default TDP setting).
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Only supported for particular Intel Xe graphics platforms.
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What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_crit
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Date: February 2024
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KernelVersion: 6.8
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What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
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Date: May 2025
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KernelVersion: 6.15
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Contact: [email protected]
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Description: RW. Package reactive critical (I1) power limit in microwatts.
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Description: RW. Card reactive critical (I1) power limit in microwatts.
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Package reactive critical (I1) power limit in microwatts is exposed
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Card reactive critical (I1) power limit in microwatts is exposed
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for client products. The power controller will throttle the
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operating frequency if the power averaged over a window exceeds
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this limit.
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Only supported for particular Intel Xe graphics platforms.
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What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr2_crit
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Date: February 2024
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KernelVersion: 6.8
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What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr1_crit
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Date: May 2025
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KernelVersion: 6.15
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Contact: [email protected]
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Description: RW. Package reactive critical (I1) power limit in milliamperes.
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Description: RW. Card reactive critical (I1) power limit in milliamperes.
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Package reactive critical (I1) power limit in milliamperes is
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Card reactive critical (I1) power limit in milliamperes is
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exposed for server products. The power controller will throttle
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the operating frequency if the power averaged over a window
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exceeds this limit.

‎Documentation/gpu/xe/index.rst‎

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@@ -16,6 +16,7 @@ DG2, etc is provided to prototype the driver.
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xe_migrate
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xe_cs
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xe_pm
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xe_gt_freq
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xe_pcode
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xe_gt_mcr
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xe_wa

‎Documentation/gpu/xe/xe_gt_freq.rst‎

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.. SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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==========================
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Xe GT Frequency Management
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==========================
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.. kernel-doc:: drivers/gpu/drm/xe/xe_gt_freq.c
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:doc: Xe GT Frequency Management
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Internal API
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============
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.. kernel-doc:: drivers/gpu/drm/xe/xe_gt_freq.c
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:internal:

‎MAINTAINERS‎

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@@ -7599,7 +7599,7 @@ F: Documentation/devicetree/bindings/display/panel/panel-mipi-dbi-spi.yaml
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F: drivers/gpu/drm/tiny/panel-mipi-dbi.c
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DRM DRIVER for Qualcomm Adreno GPUs
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M: Rob Clark <robdclark@gmail.com>
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M: Rob Clark <[email protected].com>
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R: Sean Paul <[email protected]>
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R: Konrad Dybcio <[email protected]>
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L: [email protected]
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F: include/uapi/drm/msm_drm.h
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DRM DRIVER for Qualcomm display hardware
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M: Rob Clark <[email protected]>
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M: Abhinav Kumar <[email protected]>
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M: Rob Clark <[email protected]>
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M: Dmitry Baryshkov <[email protected]>
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R: Abhinav Kumar <[email protected]>
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R: Jessica Zhang <[email protected]>
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R: Sean Paul <[email protected]>
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R: Marijn Suijten <[email protected]>
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L: [email protected]
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F: drivers/soc/qcom/trace_icc-bwmon.h
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QUALCOMM IOMMU
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M: Rob Clark <robdclark@gmail.com>
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M: Rob Clark <[email protected].com>
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L: [email protected]
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L: [email protected]
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S: Maintained
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QUALCOMM IRIS VIDEO ACCELERATOR DRIVER
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M: Vikash Garodia <[email protected]>
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M: Dikshita Agarwal <[email protected]>
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R: Abhinav Kumar <[email protected]>
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R: Abhinav Kumar <[email protected]>
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R: Bryan O'Donoghue <[email protected]>
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L: [email protected]

‎drivers/gpu/drm/amd/amdgpu/Kconfig‎

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@@ -76,7 +76,7 @@ config DRM_AMDGPU_USERPTR
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config DRM_AMD_ISP
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bool "Enable AMD Image Signal Processor IP support"
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depends on DRM_AMDGPU
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depends on DRM_AMDGPU && ACPI
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select MFD_CORE
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select PM_GENERIC_DOMAINS if PM
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help

‎drivers/gpu/drm/amd/amdgpu/amdgpu.h‎

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@@ -1713,6 +1713,10 @@ static inline bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev) { retu
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static inline bool amdgpu_acpi_is_s3_active(struct amdgpu_device *adev) { return false; }
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#endif
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#if defined(CONFIG_DRM_AMD_ISP)
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int amdgpu_acpi_get_isp4_dev_hid(u8 (*hid)[ACPI_ID_LEN]);
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#endif
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void amdgpu_register_gpu_instance(struct amdgpu_device *adev);
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void amdgpu_unregister_gpu_instance(struct amdgpu_device *adev);
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‎drivers/gpu/drm/amd/amdgpu/amdgpu_acpi.c‎

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@@ -1532,5 +1532,35 @@ bool amdgpu_acpi_is_s0ix_active(struct amdgpu_device *adev)
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return true;
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#endif /* CONFIG_AMD_PMC */
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}
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#endif /* CONFIG_SUSPEND */
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#if IS_ENABLED(CONFIG_DRM_AMD_ISP)
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static const struct acpi_device_id isp_sensor_ids[] = {
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{ "OMNI5C10" },
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{ }
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};
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static int isp_match_acpi_device_ids(struct device *dev, const void *data)
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{
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return acpi_match_device(data, dev) ? 1 : 0;
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}
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int amdgpu_acpi_get_isp4_dev_hid(u8 (*hid)[ACPI_ID_LEN])
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{
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struct device *pdev __free(put_device) = NULL;
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struct acpi_device *acpi_pdev;
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pdev = bus_find_device(&platform_bus_type, NULL, isp_sensor_ids,
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isp_match_acpi_device_ids);
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if (!pdev)
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return -EINVAL;
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acpi_pdev = ACPI_COMPANION(pdev);
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if (!acpi_pdev)
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return -ENODEV;
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strscpy(*hid, acpi_device_hid(acpi_pdev));
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return 0;
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}
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#endif /* CONFIG_DRM_AMD_ISP */

‎drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c‎

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@@ -368,6 +368,9 @@ void amdgpu_amdkfd_free_gtt_mem(struct amdgpu_device *adev, void **mem_obj)
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if (!bo || !*bo)
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return;
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(void)amdgpu_bo_reserve(*bo, true);
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amdgpu_bo_kunmap(*bo);
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amdgpu_bo_unpin(*bo);

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c‎

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@@ -919,7 +919,7 @@ long amdgpu_ctx_mgr_entity_flush(struct amdgpu_ctx_mgr *mgr, long timeout)
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void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
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static void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
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{
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void amdgpu_ctx_mgr_fini(struct amdgpu_ctx_mgr *mgr)
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{
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struct amdgpu_ctx *ctx;
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struct idr *idp;
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uint32_t id;
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amdgpu_ctx_mgr_entity_fini(mgr);
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idp = &mgr->ctx_handles;
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idr_for_each_entry(idp, ctx, id) {
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if (kref_put(&ctx->refcount, amdgpu_ctx_fini) != 1)
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DRM_ERROR("ctx %p is still alive\n", ctx);
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}
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idr_destroy(&mgr->ctx_handles);
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mutex_destroy(&mgr->lock);
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}

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