@@ -6288,21 +6288,6 @@ static void gfx_v11_0_ring_emit_reg_write_reg_wait(struct amdgpu_ring *ring,
62886288 ref , mask , 0x20 );
62896289}
62906290
6291- static void gfx_v11_0_ring_soft_recovery (struct amdgpu_ring * ring ,
6292- unsigned vmid )
6293- {
6294- struct amdgpu_device * adev = ring -> adev ;
6295- uint32_t value = 0 ;
6296-
6297- value = REG_SET_FIELD (value , SQ_CMD , CMD , 0x03 );
6298- value = REG_SET_FIELD (value , SQ_CMD , MODE , 0x01 );
6299- value = REG_SET_FIELD (value , SQ_CMD , CHECK_VMID , 1 );
6300- value = REG_SET_FIELD (value , SQ_CMD , VM_ID , vmid );
6301- amdgpu_gfx_rlc_enter_safe_mode (adev , 0 );
6302- WREG32_SOC15 (GC , 0 , regSQ_CMD , value );
6303- amdgpu_gfx_rlc_exit_safe_mode (adev , 0 );
6304- }
6305-
63066291static void
63076292gfx_v11_0_set_gfx_eop_interrupt_state (struct amdgpu_device * adev ,
63086293 uint32_t me , uint32_t pipe ,
@@ -6826,7 +6811,7 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring,
68266811 if (!(adev -> gfx .gfx_supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE ))
68276812 return - EOPNOTSUPP ;
68286813
6829- drm_sched_wqueue_stop ( & ring -> sched );
6814+ amdgpu_ring_reset_helper_begin ( ring , timedout_fence );
68306815
68316816 r = amdgpu_mes_reset_legacy_queue (ring -> adev , ring , vmid , false);
68326817 if (r ) {
@@ -6849,12 +6834,7 @@ static int gfx_v11_0_reset_kgq(struct amdgpu_ring *ring,
68496834 return r ;
68506835 }
68516836
6852- r = amdgpu_ring_test_ring (ring );
6853- if (r )
6854- return r ;
6855- amdgpu_fence_driver_force_completion (ring );
6856- drm_sched_wqueue_start (& ring -> sched );
6857- return 0 ;
6837+ return amdgpu_ring_reset_helper_end (ring , timedout_fence );
68586838}
68596839
68606840static int gfx_v11_0_reset_compute_pipe (struct amdgpu_ring * ring )
@@ -6997,7 +6977,7 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring,
69976977 if (!(adev -> gfx .compute_supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE ))
69986978 return - EOPNOTSUPP ;
69996979
7000- drm_sched_wqueue_stop ( & ring -> sched );
6980+ amdgpu_ring_reset_helper_begin ( ring , timedout_fence );
70016981
70026982 r = amdgpu_mes_reset_legacy_queue (ring -> adev , ring , vmid , true);
70036983 if (r ) {
@@ -7018,12 +6998,7 @@ static int gfx_v11_0_reset_kcq(struct amdgpu_ring *ring,
70186998 return r ;
70196999 }
70207000
7021- r = amdgpu_ring_test_ring (ring );
7022- if (r )
7023- return r ;
7024- amdgpu_fence_driver_force_completion (ring );
7025- drm_sched_wqueue_start (& ring -> sched );
7026- return 0 ;
7001+ return amdgpu_ring_reset_helper_end (ring , timedout_fence );
70277002}
70287003
70297004static void gfx_v11_ip_print (struct amdgpu_ip_block * ip_block , struct drm_printer * p )
@@ -7259,7 +7234,6 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_gfx = {
72597234 .emit_wreg = gfx_v11_0_ring_emit_wreg ,
72607235 .emit_reg_wait = gfx_v11_0_ring_emit_reg_wait ,
72617236 .emit_reg_write_reg_wait = gfx_v11_0_ring_emit_reg_write_reg_wait ,
7262- .soft_recovery = gfx_v11_0_ring_soft_recovery ,
72637237 .emit_mem_sync = gfx_v11_0_emit_mem_sync ,
72647238 .reset = gfx_v11_0_reset_kgq ,
72657239 .emit_cleaner_shader = gfx_v11_0_ring_emit_cleaner_shader ,
@@ -7301,7 +7275,6 @@ static const struct amdgpu_ring_funcs gfx_v11_0_ring_funcs_compute = {
73017275 .emit_wreg = gfx_v11_0_ring_emit_wreg ,
73027276 .emit_reg_wait = gfx_v11_0_ring_emit_reg_wait ,
73037277 .emit_reg_write_reg_wait = gfx_v11_0_ring_emit_reg_write_reg_wait ,
7304- .soft_recovery = gfx_v11_0_ring_soft_recovery ,
73057278 .emit_mem_sync = gfx_v11_0_emit_mem_sync ,
73067279 .reset = gfx_v11_0_reset_kcq ,
73077280 .emit_cleaner_shader = gfx_v11_0_ring_emit_cleaner_shader ,
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