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lines changed Original file line number Diff line number Diff line change 175175#define PCLK_CIF 352
176176#define PCLK_OTP_PHY 353
177177
178- #define CLK_NR_CLKS (PCLK_OTP_PHY + 1)
179-
180178/* pmu-clocks indices */
181179
182180#define PLL_GPLL 1
195193#define PCLK_GPIO0_PMU 20
196194#define PCLK_UART0_PMU 21
197195
198- #define CLKPMU_NR_CLKS (PCLK_UART0_PMU + 1)
199-
200196/* soft-reset indices */
201197#define SRST_CORE0_PO 0
202198#define SRST_CORE1_PO 1
Original file line number Diff line number Diff line change 9494#define HCLK_CPU 477
9595#define HCLK_PERI 478
9696
97- #define CLK_NR_CLKS (HCLK_PERI + 1)
98-
9997/* soft-reset indices */
10098#define SRST_CORE0 0
10199#define SRST_CORE1 1
Original file line number Diff line number Diff line change 146146#define HCLK_S_CRYPTO 477
147147#define HCLK_PERI 478
148148
149- #define CLK_NR_CLKS (HCLK_PERI + 1)
150-
151149/* soft-reset indices */
152150#define SRST_CORE0_PO 0
153151#define SRST_CORE1_PO 1
Original file line number Diff line number Diff line change 195195#define HCLK_CPU 477
196196#define HCLK_PERI 478
197197
198- #define CLK_NR_CLKS (HCLK_PERI + 1)
199-
200198/* soft-reset indices */
201199#define SRST_CORE0 0
202200#define SRST_CORE1 1
Original file line number Diff line number Diff line change 212212#define PCLK_CAN 233
213213#define PCLK_OWIRE 234
214214
215- #define CLK_NR_CLKS (PCLK_OWIRE + 1)
216-
217215/* soft-reset indices */
218216
219217/* cru_softrst_con0 */
Original file line number Diff line number Diff line change 201201#define HCLK_RGA 340
202202#define HCLK_HDCP 341
203203
204- #define CLK_NR_CLKS (HCLK_HDCP + 1)
205-
206204/* soft-reset indices */
207205#define SRST_CORE0_PO 0
208206#define SRST_CORE1_PO 1
Original file line number Diff line number Diff line change 182182#define HCLK_BUS 477
183183#define HCLK_PERI 478
184184
185- #define CLK_NR_CLKS (HCLK_PERI + 1)
186-
187185/* soft-reset indices */
188186#define SRST_CORE_B0 0
189187#define SRST_CORE_B1 1
Original file line number Diff line number Diff line change 335335#define HCLK_SDIO_NOC 495
336336#define HCLK_SDIOAUDIO_NOC 496
337337
338- #define CLK_NR_CLKS (HCLK_SDIOAUDIO_NOC + 1)
339-
340338/* pmu-clocks indices */
341339
342340#define PLL_PPLL 1
378376#define PCLK_INTR_ARB_PMU 49
379377#define HCLK_NOC_PMU 50
380378
381- #define CLKPMU_NR_CLKS (HCLK_NOC_PMU + 1)
382-
383379/* soft-reset indices */
384380
385381/* cru_softrst_con0 */
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