@@ -193,30 +193,29 @@ static void pcie_clkpm_cap_init(struct pcie_link_state *link, int blacklist)
193193 link -> clkpm_disable = blacklist ? 1 : 0 ;
194194}
195195
196- static bool pcie_retrain_link (struct pcie_link_state * link )
196+ static bool pcie_retrain_link (struct pci_dev * pdev )
197197{
198- struct pci_dev * parent = link -> pdev ;
199198 unsigned long end_jiffies ;
200199 u16 lnkctl ;
201200 u16 lnksta ;
202201
203- pcie_capability_read_word (parent , PCI_EXP_LNKCTL , & lnkctl );
202+ pcie_capability_read_word (pdev , PCI_EXP_LNKCTL , & lnkctl );
204203 lnkctl |= PCI_EXP_LNKCTL_RL ;
205- pcie_capability_write_word (parent , PCI_EXP_LNKCTL , lnkctl );
206- if (parent -> clear_retrain_link ) {
204+ pcie_capability_write_word (pdev , PCI_EXP_LNKCTL , lnkctl );
205+ if (pdev -> clear_retrain_link ) {
207206 /*
208207 * Due to an erratum in some devices the Retrain Link bit
209208 * needs to be cleared again manually to allow the link
210209 * training to succeed.
211210 */
212211 lnkctl &= ~PCI_EXP_LNKCTL_RL ;
213- pcie_capability_write_word (parent , PCI_EXP_LNKCTL , lnkctl );
212+ pcie_capability_write_word (pdev , PCI_EXP_LNKCTL , lnkctl );
214213 }
215214
216215 /* Wait for link training end. Break out after waiting for timeout */
217216 end_jiffies = jiffies + LINK_RETRAIN_TIMEOUT ;
218217 do {
219- pcie_capability_read_word (parent , PCI_EXP_LNKSTA , & lnksta );
218+ pcie_capability_read_word (pdev , PCI_EXP_LNKSTA , & lnksta );
220219 if (!(lnksta & PCI_EXP_LNKSTA_LT ))
221220 break ;
222221 msleep (1 );
@@ -290,7 +289,7 @@ static void pcie_aspm_configure_common_clock(struct pcie_link_state *link)
290289 reg16 &= ~PCI_EXP_LNKCTL_CCC ;
291290 pcie_capability_write_word (parent , PCI_EXP_LNKCTL , reg16 );
292291
293- if (pcie_retrain_link (link ))
292+ if (pcie_retrain_link (link -> pdev ))
294293 return ;
295294
296295 /* Training failed. Restore common clock configurations */
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