drm/amd/pm: fix the pp_dpm_pcie issue on smu v14.0.2/3

Kenneth Feng · alexdeucher · commit fedf6db3ea9d · 2024-09-10T13:44:29.000-04:00
fix the pp_dpm_pcie issue on smu v14.0.2/3 as below:
0: 2.5GT/s, x4 250Mhz
1: 8.0GT/s, x4 616Mhz *
2: 8.0GT/s, x4 1143Mhz *
the middle level can be removed since it is always skipped on
smu v14.0.2/3

Signed-off-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu14/smu_v14_0_2_ppt.c
@@ -696,6 +696,9 @@ static int smu_v14_0_2_set_default_dpm_table(struct smu_context *smu)
 		pcie_table->clk_freq[pcie_table->num_of_link_levels] =
 					skutable->LclkFreq[link_level];
 		pcie_table->num_of_link_levels++;
+
+		if (link_level == 0)
+			link_level++;
 	}
 
 	/* dcefclk dpm table setup */

Original file line number	Diff line number	Diff line change
`@@ -696,6 +696,9 @@ static int smu_v14_0_2_set_default_dpm_table(struct smu_context *smu)`
`696`	`696`	`pcie_table->clk_freq[pcie_table->num_of_link_levels] =`
`697`	`697`	`skutable->LclkFreq[link_level];`
`698`	`698`	`pcie_table->num_of_link_levels++;`
	`699`	`+`
	`700`	`+ if (link_level == 0)`
	`701`	`+ link_level++;`
`699`	`702`	`}`
`700`	`703`
`701`	`704`	`/* dcefclk dpm table setup */`