Progress on getting Sivaraman testbench to run

[csziklai]

I am making this discussion to save my progress on getting Sivaraman’s pifo testbench to run. The first roadblock we experienced when trying to get it to run following the instructions on the repo was that we didn’t have VCS installed on our machine nor could we easily get it.

The next thing I tried was to alter the Makefile in order to use Verilator. However, after some insight from Kevin that “testbench Verilog is notoriously non-portable between different simulators”, I decided this was not the route to take.

So, I tried to use Quartus, which is what the BBQ artifact uses. This is the artifact Sivaraman brought to our attention when we emailed him. However, as I began mucking around with Quartus, I ran into another problem that we didn’t have ModelSIM installed, which is needed to run simulations. When trying to run FPGA synthesis part A), the point where I got stuck was

cns58@havarti:/scratch/cassandra/BBQ/hardware$ ./pifo/setup.sh 200 2025.03.16.14:39:37 Info: Doing: qsys-script --script=my_pll.tcl --quartus-project=../quartus/pifo.qsf 2025.03.16.14:39:39 Error: can't find package qsys 18.0 2025.03.16.14:39:40 Error: Failed to set device family and part to Quartus project, manually re-run the commands included in /scratch/cassandra/BBQ/hardware/pifo/ip/quartus_sh_tcl_file_for_qsyspro.tcl in Quartus tcl shell.

It seems that the version of Quartus on our system is incomplete or something because it wants quartus_tcl, which we don’t have.

Finally, the most recent thing I tried was Xililinx Vivado, which is an alternative to Quartus to my understanding. I used the instructions from last semester for synthesis. This produced some metrics, which I have attached to this discussion. However, I think this kind of misses the point of what the main goal of getting the testbench to run was. That is, we wanted simulation as the verilog file can be a shortcut to creating a compiler if we are interested in incorporating Sivaraman’s space-saving design for pifos into our own pifo implementations.

Download report from running synthesis