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arch: KVM CPUID definitions
We introduce CPUID definitions defined for the KVM hypervisor. These definitions will later be utilized by the upcoming CPU profile generation tool. Signed-off-by: Oliver Anderson <[email protected]> On-behalf-of: SAP [email protected]
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‎arch/src/x86_64/cpuid_definitions/kvm.rs‎

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// Copyright © 2025 Cyberus Technology GmbH
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//
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// SPDX-License-Identifier: Apache-2.0
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//
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//! This module contains CPUID definitions for the KVM hypervisor.
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use std::ops::RangeInclusive;
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use crate::x86_64::CpuidReg;
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use crate::x86_64::cpuid_definitions::{
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CpuidDefinitions, Parameters, ProfilePolicy, ValueDefinition, ValueDefinitions,
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};
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/// CPUID features defined for the KVM hypervisor.
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///
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/// See https://www.kernel.org/doc/html/latest/virt/kvm/x86/cpuid.html
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pub const KVM_CPUID_DEFINITIONS: CpuidDefinitions<6> = const {
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CpuidDefinitions([
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//=====================================================================
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// KVM CPUID Signature
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// ===================================================================
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(
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Parameters {
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leaf: 0x4000_0000,
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sub_leaf: RangeInclusive::new(0, 0),
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register: CpuidReg::EAX,
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},
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ValueDefinitions::new(&[ValueDefinition {
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short: "max_hypervisor_leaf",
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description: "The maximum valid leaf between 0x4000_0000 and 0x4FFF_FFF",
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bits_range: (0, 31),
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policy: ProfilePolicy::Passthrough,
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}]),
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),
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(
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Parameters {
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leaf: 0x4000_0000,
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sub_leaf: RangeInclusive::new(0, 0),
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register: CpuidReg::EBX,
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},
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ValueDefinitions::new(&[ValueDefinition {
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short: "hypervisor_string_ebx",
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description: "Part of the hypervisor string",
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bits_range: (0, 31),
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policy: ProfilePolicy::Passthrough,
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}]),
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),
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(
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Parameters {
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leaf: 0x4000_0000,
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sub_leaf: RangeInclusive::new(0, 0),
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register: CpuidReg::ECX,
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},
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ValueDefinitions::new(&[ValueDefinition {
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short: "hypervisor_string_ecx",
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description: "Part of the hypervisor string",
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bits_range: (0, 31),
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policy: ProfilePolicy::Passthrough,
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}]),
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),
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(
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Parameters {
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leaf: 0x4000_0000,
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sub_leaf: RangeInclusive::new(0, 0),
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register: CpuidReg::EDX,
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},
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ValueDefinitions::new(&[ValueDefinition {
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short: "hypervisor_string_edx",
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description: "Part of the hypervisor string",
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bits_range: (0, 31),
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policy: ProfilePolicy::Passthrough,
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}]),
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),
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//=====================================================================
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// KVM CPUID Features
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// ===================================================================
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(
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Parameters {
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leaf: 0x4000_0001,
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sub_leaf: RangeInclusive::new(0, 0),
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register: CpuidReg::EAX,
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},
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ValueDefinitions::new(&[
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ValueDefinition {
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short: "kvm_feature_clocksource",
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description: "kvmclock available at MSRs 0x11 and 0x12",
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bits_range: (0, 0),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_nop_io_delay",
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description: "Not necessary to perform delays on PIO operations",
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bits_range: (1, 1),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_mmu_op",
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description: "Deprecated",
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bits_range: (2, 2),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_clocksource2",
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description: "kvmclock available at MSRs 0x4b564d00 and 0x4b564d01",
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bits_range: (3, 3),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_async_pf",
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description: "async pf can be enabled by writing to MSR 0x4b564d02",
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bits_range: (4, 4),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_steal_time",
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description: "steal time can be enabled by writing to msr 0x4b564d03",
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bits_range: (5, 5),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_pv_eoi",
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description: "paravirtualized end of interrupt handler can be enabled by writing to msr 0x4b564d04",
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bits_range: (6, 6),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_pv_unhalt",
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description: "guest checks this feature bit before enabling paravirtualized spinlock support",
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bits_range: (7, 7),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_pv_tlb_flush",
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description: "guest checks this feature bit before enabling paravirtualized tlb flush",
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bits_range: (9, 9),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_async_pf_vmexit",
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description: "paravirtualized async PF VM EXIT can be enabled by setting bit 2 when writing to msr 0x4b564d02",
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bits_range: (10, 10),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_pv_send_ipi",
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description: "guest checks this feature bit before enabling paravirtualized send IPIs",
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bits_range: (11, 11),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_poll_control",
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description: "host-side polling on HLT can be disabled by writing to msr 0x4b564d05.",
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bits_range: (12, 12),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_pv_sched_yield",
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description: "guest checks this feature bit before using paravirtualized sched yield.",
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bits_range: (13, 13),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_async_pf_int",
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description: "guest checks this feature bit before using the second async pf control msr 0x4b564d06 and async pf acknowledgment msr 0x4b564d07.",
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bits_range: (14, 14),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_msi_ext_dest_id",
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description: "guest checks this feature bit before using extended destination ID bits in MSI address bits 11-5.",
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bits_range: (15, 15),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_hc_map_gpa_range",
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description: "guest checks this feature bit before using the map gpa range hypercall to notify the page state change",
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bits_range: (16, 16),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_migration_control",
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description: "guest checks this feature bit before using MSR_KVM_MIGRATION_CONTROL",
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bits_range: (17, 17),
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policy: ProfilePolicy::Passthrough,
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},
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ValueDefinition {
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short: "kvm_feature_clocksource_stable_bit",
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description: "host will warn if no guest-side per-cpu warps are expected in kvmclock",
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bits_range: (24, 24),
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policy: ProfilePolicy::Passthrough,
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},
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]),
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),
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(
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Parameters {
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leaf: 0x4000_0001,
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sub_leaf: RangeInclusive::new(0, 0),
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register: CpuidReg::EDX,
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},
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ValueDefinitions::new(&[ValueDefinition {
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short: "kvm_hints_realtime",
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description: "guest checks this feature bit to determine that vCPUs are never preempted for an unlimited time allowing optimizations",
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bits_range: (0, 0),
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policy: ProfilePolicy::Passthrough,
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}]),
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),
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])
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};

‎arch/src/x86_64/cpuid_definitions/mod.rs‎

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use crate::x86_64::CpuidReg;
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pub mod intel;
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#[cfg(feature = "kvm")]
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pub mod kvm;
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pub(in crate::x86_64) fn serialize_as_hex<S: Serializer>(
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input: &u32,

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