Skip to content

Commit 16648aa

Browse files
Chris Friedtcfriedt
authored andcommitted
board: tt_blackhole: minor cleanup of SRST workaround
Add a minor cleanup of the SRST workaround, bringing variables out to Kconfig. It makes the SRST workaround optional, but enabled by default. By doing so, we preserve the previous functionality, which will also work when only one JTAG adapter is present for SMC. This will work unmodified for P100, but requires the SRST (BH_RESET) signal is brought out to the debug header for other Blackhole cards such as P100A, as well as P150 and P300 variants. Signed-off-by: Chris Friedt <[email protected]>
1 parent 43d3881 commit 16648aa

File tree

3 files changed

+67
-18
lines changed

3 files changed

+67
-18
lines changed

boards/tenstorrent/tt_blackhole/Kconfig

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -7,3 +7,44 @@ config BOARD_INIT_PRIORITY
77
help
88
Board initialization priority. Should be greater than flash
99
initialization priority
10+
11+
if BOARD_TT_BLACKHOLE_TT_BLACKHOLE_SMC
12+
13+
config TT_SRST_ASSIST
14+
bool "Enable TT SRST assist"
15+
default y
16+
help
17+
It's safe to enable this option always, but it is mainly required when using JTAG to control
18+
Blackhole cards. It requires both a JTAG debugger attached to the SMC as well as an SWD
19+
debugger attached to the BMC.
20+
21+
if TT_SRST_ASSIST
22+
23+
config TT_SRST_ASSIST_ADDR
24+
hex "Address to write to toggle SRST pin(s)"
25+
# this is the same address on all P100a+ boards
26+
default 0x50000418
27+
help
28+
This is the address of the GPIO control register on the BMC that controls the SRST pin(s).
29+
30+
config TT_SRST_ASSIST_SET
31+
hex "Value to write to set SRST pin(s)"
32+
# GPIOB pins 0 and 1
33+
default 0x30000 if BOARD_P300
34+
# GPIOB pin 0
35+
default 0x10000
36+
help
37+
This is the value to write to the GPIO control register on the BMC to set the SRST pin(s).
38+
39+
config TT_SRST_ASSIST_CLR
40+
hex "Value to write to set SRST pin(s)"
41+
# GPIOB pins 0 and 1
42+
default 0x3 if BOARD_P300
43+
# GPIOB pin 0
44+
default 0x1
45+
help
46+
This is the value to write to the GPIO control register on the BMC to set the SRST pin(s).
47+
48+
endif
49+
50+
endif

boards/tenstorrent/tt_blackhole/board.cmake

Lines changed: 6 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -14,24 +14,16 @@ if(CONFIG_ARM)
1414
board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
1515
endif()
1616

17-
if(CONFIG_SOC_TT_BLACKHOLE_SMC)
18-
set(BMC_VARS "# Autogenerated file with variables to reset BH core. Don't edit!\n")
17+
set(BMC_VARS "# Autogenerated file with variables to reset SMC. Don't edit!\n")
18+
if(CONFIG_TT_SRST_ASSIST)
1919
string(APPEND BMC_VARS "set OPENOCD ${OPENOCD}\n")
2020
string(APPEND BMC_VARS "set OPENOCD_DEFAULT_PATH ${OPENOCD_DEFAULT_PATH}\n")
2121
string(APPEND BMC_VARS "set BMC_CFG ${CMAKE_CURRENT_LIST_DIR}/support/tt_blackhole_bmc.cfg\n")
22-
if(CONFIG_BOARD_REVISION MATCHES "p300.*")
23-
# P300 has two reset GPIOs, on GPIOB pin 0 and 1
24-
string(APPEND BMC_VARS "set RST_GPIO_REG 0x50000418\n")
25-
string(APPEND BMC_VARS "set RST_GPIO_SET_MASK 0x30000\n")
26-
string(APPEND BMC_VARS "set RST_GPIO_CLR_MASK 0x3\n")
27-
else()
28-
# All other Blackhole cards have RST pin on GPIOB, pin 0
29-
string(APPEND BMC_VARS "set RST_GPIO_REG 0x50000418\n")
30-
string(APPEND BMC_VARS "set RST_GPIO_SET_MASK 0x10000\n")
31-
string(APPEND BMC_VARS "set RST_GPIO_CLR_MASK 0x1\n")
32-
endif()
33-
file(WRITE ${CMAKE_CURRENT_LIST_DIR}/support/bmc-reset-vars.cfg ${BMC_VARS})
22+
string(APPEND BMC_VARS "set RST_GPIO_REG ${CONFIG_TT_SRST_ASSIST_ADDR}\n")
23+
string(APPEND BMC_VARS "set RST_GPIO_SET_MASK ${CONFIG_TT_SRST_ASSIST_SET}\n")
24+
string(APPEND BMC_VARS "set RST_GPIO_CLR_MASK ${CONFIG_TT_SRST_ASSIST_CLR}\n")
3425
endif()
26+
file(WRITE ${CMAKE_CURRENT_LIST_DIR}/support/bmc-reset-vars.cfg ${BMC_VARS})
3527

3628
# Include debugger templates below (order is important)
3729
include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/tenstorrent/tt_blackhole/support/tt_blackhole_smc.cfg

Lines changed: 20 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,7 @@ set _dbgbase [expr {$_coreid << 13}]
1414

1515
set _CHIPNAME arc-em
1616

17-
# Override the init_reset procedure
18-
proc init_reset {mode} {
17+
proc toggle_srst {} {
1918
global OPENOCD
2019
global OPENOCD_DEFAULT_PATH
2120
global BMC_CFG
@@ -24,9 +23,26 @@ proc init_reset {mode} {
2423
global RST_GPIO_SET_MASK
2524

2625
echo "Resetting blackhole SOC"
27-
exec $OPENOCD -s $OPENOCD_DEFAULT_PATH -f $BMC_CFG -c "init; mww $RST_GPIO_REG $RST_GPIO_SET_MASK; exit"
26+
27+
# This method works for all Blackhole cards but requires an SWD adapter on BMC
28+
if {[info exists BMC_CFG]} {
29+
exec $OPENOCD -s $OPENOCD_DEFAULT_PATH -f $BMC_CFG -c "init; mww $RST_GPIO_REG $RST_GPIO_SET_MASK; exit"
30+
sleep 10
31+
exec $OPENOCD -s $OPENOCD_DEFAULT_PATH -f $BMC_CFG -c "init; mww $RST_GPIO_REG $RST_GPIO_CLR_MASK; exit"
32+
return
33+
}
34+
35+
# This method may be used as a fallback when no SWD adapter is available.
36+
# It does require that the SRST pin is brought out to the SMC debug interface.
37+
reset_config srst_only
38+
adapter assert srst
2839
sleep 10
29-
exec $OPENOCD -s $OPENOCD_DEFAULT_PATH -f $BMC_CFG -c "init; mww $RST_GPIO_REG $RST_GPIO_CLR_MASK; exit"
40+
adapter deassert srst
41+
}
42+
43+
# Override the init_reset procedure
44+
proc init_reset {mode} {
45+
toggle_srst
3046
# Without this delay, the jtag scan fails
3147
sleep 100
3248
jtag arp_init

0 commit comments

Comments
 (0)