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danieldegrassecfriedt
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boards: tenstorrent: implement workaround to reset BH SOC on PCIE cards
P100 cards have the BH_RST gpio wired to the ARC JTAG interface, enabling the ARC JTAG to reset the SOC directly. However, P100a/b/c, P150 a/b/c, and P300 a/b/c cards don't connect this GPIO. To workaround this, we need to directly instruct the BMC to toggle the reset pin of the BH SOC. We accomplish this by starting an openocd instance for the BMC within the reset procedure for the BH SOC. This openocd instance directly sets the GPIO register for the reset pin, then clears it. This allows us to assert the BH_RST pin on cards that do not wire it to the ARC_JTAG interface. Note that in order to export the proper variables for the openocd command, the build process now creates a temporary file "bmc-reset-vars.cfg" with the board-specific data for the reset procedure, as well as the path to the openocd instance to run. This file is added to gitignore as we don't want to track it. Signed-off-by: Daniel DeGrasse <[email protected]>
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.gitignore

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@@ -109,3 +109,6 @@ YAMLLint.txt
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*.fwbundle
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scripts/tt-console/tt-console
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# Autogenerated file for SMC reset workaround
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bmc-reset-vars.cfg

boards/tenstorrent/tt_blackhole/board.cmake

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@@ -14,6 +14,25 @@ if(CONFIG_ARM)
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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endif()
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if(CONFIG_SOC_TT_BLACKHOLE_SMC)
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set(BMC_VARS "# Autogenerated file with variables to reset BH core. Don't edit!\n")
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string(APPEND BMC_VARS "set OPENOCD ${OPENOCD}\n")
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string(APPEND BMC_VARS "set OPENOCD_DEFAULT_PATH ${OPENOCD_DEFAULT_PATH}\n")
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string(APPEND BMC_VARS "set BMC_CFG ${CMAKE_CURRENT_LIST_DIR}/support/tt_blackhole_bmc.cfg\n")
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if(CONFIG_BOARD_REVISION MATCHES "p300.*")
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# P300 has two reset GPIOs, on GPIOB pin 0 and 1
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string(APPEND BMC_VARS "set RST_GPIO_REG 0x50000418\n")
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string(APPEND BMC_VARS "set RST_GPIO_SET_MASK 0x30000\n")
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string(APPEND BMC_VARS "set RST_GPIO_CLR_MASK 0x3\n")
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else()
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# All other Blackhole cards have RST pin on GPIOB, pin 0
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string(APPEND BMC_VARS "set RST_GPIO_REG 0x50000418\n")
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string(APPEND BMC_VARS "set RST_GPIO_SET_MASK 0x10000\n")
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string(APPEND BMC_VARS "set RST_GPIO_CLR_MASK 0x1\n")
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endif()
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file(WRITE ${CMAKE_CURRENT_LIST_DIR}/support/bmc-reset-vars.cfg ${BMC_VARS})
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endif()
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# Include debugger templates below (order is important)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)
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boards/tenstorrent/tt_blackhole/support/tt_blackhole_smc.cfg

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@@ -7,8 +7,7 @@ adapter speed 10000
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transport select jtag
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source [find cpu/arc/hs.tcl]
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reset_config srst_only
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source [find bmc-reset-vars.cfg]
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set _coreid 0
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set _dbgbase [expr {$_coreid << 13}]
@@ -17,28 +16,26 @@ set _CHIPNAME arc-em
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# Override the init_reset procedure
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proc init_reset {mode} {
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global OPENOCD
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global OPENOCD_DEFAULT_PATH
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global BMC_CFG
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global RST_GPIO_REG
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global RST_GPIO_CLR_MASK
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global RST_GPIO_SET_MASK
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echo "Resetting blackhole SOC"
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adapter assert srst
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exec $OPENOCD -s $OPENOCD_DEFAULT_PATH -f $BMC_CFG -c "init; mww $RST_GPIO_REG $RST_GPIO_SET_MASK; exit"
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sleep 10
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adapter deassert srst
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exec $OPENOCD -s $OPENOCD_DEFAULT_PATH -f $BMC_CFG -c "init; mww $RST_GPIO_REG $RST_GPIO_CLR_MASK; exit"
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# Without this delay, the jtag scan fails
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sleep 100
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jtag arp_init
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# Check if core 0 actually reset. If so, PC should be at 0x4000_0080
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set _pc [expr [arc jtag get-aux-reg 0x6]]
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if {$_pc != 0x40000080} {
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echo "Reset failed, fallback required"
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# Program 0x80 to the ROM_START address. A spinloop is
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# programmed in the bootrom at this address
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write_memory 0x80000000 32 0x80
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# Set the halt bits in ARC_MISC_CNTL to stop all the ARC cores
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write_memory 0x80030100 32 0xf0
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# Now, use the `self-reset` bit of the ARC_MISC_CNTL register
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# To reset the ARC. This isn't equivalent to a system reset,
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# but it's the best we have. Also, clear the halt bits.
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write_memory 0x80030100 32 0x80000000
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set _pc [format %X [arc jtag get-aux-reg 0x6]]
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echo "PC is 0x$_pc"
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echo "PC is 0x[format %X $_pc]"
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if {$_pc != 0x40000080 && $_pc != 0x80} {
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echo "Reset failed, PC is 0x[format %X $_pc]!"
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exit 1
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}
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# Core 0 will be running after reset, which is out of sync
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# with OpenOCD's internal state. Halt the core manually by setting

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