daniilavdeev
diff --git a/‎llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/AArch64/arith-fp-frem-costs.ll‎ b/‎llvm/test/Analysis/CostModel/AArch64/arith-fp-frem.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/AArch64/arith-fp-frem-costs.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/gather-i16-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i16-with-i8-index.ll‎ b/‎llvm/test/Analysis/CostModel/X86/gather-i16-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i16-with-i8-index.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/gather-i32-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i32-with-i8-index.ll‎ b/‎llvm/test/Analysis/CostModel/X86/gather-i32-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i32-with-i8-index.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/gather-i64-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i64-with-i8-index.ll‎ b/‎llvm/test/Analysis/CostModel/X86/gather-i64-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i64-with-i8-index.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/gather-i8-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i8-with-i8-index.ll‎ b/‎llvm/test/Analysis/CostModel/X86/gather-i8-with-i8-index.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/gather-i8-with-i8-index.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/handle-iptr-with-data-layout-to-not-assert.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll‎ b/‎llvm/test/Analysis/CostModel/X86/handle-iptr-with-data-layout-to-not-assert.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/handle-iptr-with-data-layout-to-not-assert.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll‎ b/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-2.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll‎ b/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-3.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-3.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll‎ b/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-4.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-4.ll‎
diff --git a/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll‎ b/‎llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-5.ll‎ renamed to ‎llvm/test/Transforms/LoopVectorize/X86/CostModel/interleaved-load-f32-stride-5.ll‎