[M68k] Implement SWAP instruction encoding and basic patterns

This implements an Instruction class for SWAP in order to enable its use
during DAG selection. As of now, it is being used for mul/div patterns
which were previously getting the high-word output by shifting it 16
bits to the right.

Author: dansalvato

llvm/lib/Target/M68k/M68kInstrArithmetic.td

@@ -655,12 +655,12 @@ def : Pat<(udiv i8:$dst, i8:$opd),
 
 def : Pat<(srem i8:$dst, i8:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SDIVd32d16 (MOVSXd32d8 $dst), (MOVSXd16d8 $opd)), 8), 8),
+            (SWAP (SDIVd32d16 (MOVSXd32d8 $dst), (MOVSXd16d8 $opd))),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(urem i8:$dst, i8:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UDIVd32d16 (MOVZXd32d8 $dst), (MOVZXd16d8 $opd)), 8), 8),
+            (SWAP (UDIVd32d16 (MOVZXd32d8 $dst), (MOVZXd16d8 $opd))),
              MxSubRegIndex8Lo)>;
 
 // RR i16
@@ -676,12 +676,12 @@ def : Pat<(udiv i16:$dst, i16:$opd),
 
 def : Pat<(srem i16:$dst, i16:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SDIVd32d16 (MOVSXd32d16 $dst), $opd), 8), 8),
+            (SWAP (SDIVd32d16 (MOVSXd32d16 $dst), $opd)),
              MxSubRegIndex16Lo)>;
 
 def : Pat<(urem i16:$dst, i16:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UDIVd32d16 (MOVZXd32d16 $dst), $opd), 8), 8),
+            (SWAP (UDIVd32d16 (MOVZXd32d16 $dst), $opd)),
              MxSubRegIndex16Lo)>;
 
 // RI i8
@@ -697,12 +697,12 @@ def : Pat<(udiv i8:$dst, Mxi8immSExt8:$opd),
 
 def : Pat<(srem i8:$dst, Mxi8immSExt8:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SDIVd32i16 (MOVSXd32d8 $dst), (as_i16imm $opd)), 8), 8),
+            (SWAP (SDIVd32i16 (MOVSXd32d8 $dst), (as_i16imm $opd))),
              MxSubRegIndex8Lo)>;
 
 def : Pat<(urem i8:$dst, Mxi8immSExt8:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UDIVd32i16 (MOVZXd32d8 $dst), (as_i16imm $opd)), 8), 8),
+            (SWAP (UDIVd32i16 (MOVZXd32d8 $dst), (as_i16imm $opd))),
              MxSubRegIndex8Lo)>;
 
 // RI i16
@@ -718,12 +718,12 @@ def : Pat<(udiv i16:$dst, Mxi16immSExt16:$opd),
 
 def : Pat<(srem i16:$dst, Mxi16immSExt16:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SDIVd32i16 (MOVSXd32d16 $dst), imm:$opd), 8), 8),
+            (SWAP (SDIVd32i16 (MOVSXd32d16 $dst), imm:$opd)),
              MxSubRegIndex16Lo)>;
 
 def : Pat<(urem i16:$dst, Mxi16immSExt16:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UDIVd32i16 (MOVZXd32d16 $dst), imm:$opd), 8), 8),
+            (SWAP (UDIVd32i16 (MOVZXd32d16 $dst), imm:$opd)),
              MxSubRegIndex16Lo)>;
 
 
@@ -740,12 +740,12 @@ def : Pat<(mul i16:$dst, i16:$opd),
 
 def : Pat<(mulhs i16:$dst, i16:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SMULd32d16 (MOVXd32d16 $dst), $opd), 8), 8),
+            (SWAP (SMULd32d16 (MOVXd32d16 $dst), $opd)),
              MxSubRegIndex16Lo)>;
 
 def : Pat<(mulhu i16:$dst, i16:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UMULd32d16 (MOVXd32d16 $dst), $opd), 8), 8),
+            (SWAP (UMULd32d16 (MOVXd32d16 $dst), $opd)),
              MxSubRegIndex16Lo)>;
 
 def : Pat<(mul i32:$dst, i32:$opd), (SMULd32d32 $dst, $opd)>;
@@ -759,12 +759,12 @@ def : Pat<(mul i16:$dst, Mxi16immSExt16:$opd),
 
 def : Pat<(mulhs i16:$dst, Mxi16immSExt16:$opd),
           (EXTRACT_SUBREG
-            (ASR32di (ASR32di (SMULd32i16 (MOVXd32d16 $dst), imm:$opd), 8), 8),
+            (SWAP (SMULd32i16 (MOVXd32d16 $dst), imm:$opd)),
              MxSubRegIndex16Lo)>;
 
 def : Pat<(mulhu i16:$dst, Mxi16immSExt16:$opd),
           (EXTRACT_SUBREG
-            (LSR32di (LSR32di (UMULd32i16 (MOVXd32d16 $dst), imm:$opd), 8), 8),
+            (SWAP (UMULd32i16 (MOVXd32d16 $dst), imm:$opd)),
              MxSubRegIndex16Lo)>;
 
 

llvm/lib/Target/M68k/M68kInstrShiftRotate.td

@@ -96,3 +96,23 @@ defm ASR : MxSROp<"asr", sra, MxRODI_R, MxROOP_AS>;
 
 defm ROL : MxSROp<"rol", rotl, MxRODI_L, MxROOP_RO>;
 defm ROR : MxSROp<"ror", rotr, MxRODI_R, MxROOP_RO>;
+
+
+/// ---------------------------------------+---------
+///  F  E  D  C  B  A  9  8  7  6  5  4  3 | 2  1  0
+/// ---------------------------------------+---------
+///  0  1  0  0  1  0  0  0  0  1  0  0  0 |   REG
+/// ---------------------------------------+---------
+
+let isAsCheapAsAMove = 1, Defs = [CCR] in {
+let Constraints = "$src = $dst" in {
+def SWAP
+      : MxInst<(outs MxDRD32:$dst), (ins MxDRD32:$src), "swap\t$src",
+        []> {
+    let Inst = (descend 0b0100, 0b1000, 0b0100, 0b0, (operand "$src", 3));
+  }
+} // Constraints
+} // Defs = [CCR]
+
+def : Pat<(rotl i32:$src, (i32 16)), (SWAP MxDRD32:$src)>;
+def : Pat<(rotr i32:$src, (i32 16)), (SWAP MxDRD32:$src)>;