[vm, compiler] Handle up to 32-bit offsets for pool loads on ARM64.

TEST=vm/dart/generated/many_double_literals_test, in later CL
Cq-Include-Trybots: luci.dart.try:vm-aot-linux-debug-arm64-try,vm-aot-linux-release-arm64-try,vm-linux-release-arm64-try,vm-linux-debug-arm64-try
Change-Id: I367c6a0298aba28fb6883d8ee62815e15a0c01de
Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/443900
Commit-Queue: Ryan Macnak <[email protected]>
Reviewed-by: Alexander Markov <[email protected]>

Author: rmacnak-google

runtime/vm/compiler/assembler/assembler_arm64.cc

@@ -604,7 +604,6 @@ void Assembler::LoadDoubleWordFromPoolIndex(Register lower,
   Operand op;
   // PP is _un_tagged on ARM64.
   const uint32_t offset = target::ObjectPool::element_offset(index);
-  ASSERT(offset < (1 << 24));
   const uint32_t upper20 = offset & 0xfffff000;
   const uint32_t lower12 = offset & 0x00000fff;
   if (Address::CanHoldOffset(offset, Address::PairOffset)) {
@@ -618,7 +617,7 @@ void Assembler::LoadDoubleWordFromPoolIndex(Register lower,
              Address::CanHoldOffset(lower12, Address::PairOffset)) {
     add(TMP, PP, op);
     ldp(lower, upper, Address(TMP, lower12, Address::PairOffset));
-  } else {
+  } else if (Utils::IsUint(24, offset)) {
     const uint32_t lower12 = offset & 0xfff;
     const uint32_t higher12 = offset & 0xfff000;
 
@@ -632,6 +631,15 @@ void Assembler::LoadDoubleWordFromPoolIndex(Register lower,
     add(TMP, PP, op_high);
     add(TMP, TMP, op_low);
     ldp(lower, upper, Address(TMP, 0, Address::PairOffset));
+  } else if (Utils::IsUint(32, offset)) {
+    const uint16_t offset_low = Utils::Low16Bits(offset);
+    const uint16_t offset_high = Utils::High16Bits(offset);
+    movz(TMP, Immediate(offset_low), 0);
+    movk(TMP, Immediate(offset_high), 1);
+    add(TMP, TMP, Operand(PP));
+    ldp(lower, upper, Address(TMP, 0, Address::PairOffset));
+  } else {
+    UNIMPLEMENTED();
   }
 }
 

runtime/vm/instructions_arm64.cc

@@ -247,6 +247,11 @@ uword InstructionPattern::DecodeLoadDoubleWordFromPool(uword end,
   //      add tmp, tmp, #lower12
   //      ldp reg1, reg2, [tmp, 0]
   //
+  //   4. movz tmp, #lower16
+  //      movk tmp, #upper16
+  //      add tmp, tmp, pp
+  //      ldp reg1, reg2, [tmp, 0]
+  //
   // Note that the pp register is untagged!
   //
   uword start = end - Instr::kInstrSize;
@@ -267,31 +272,52 @@ uword InstructionPattern::DecodeLoadDoubleWordFromPool(uword end,
     // Case 1.
     pool_offset = base_offset;
   } else {
-    // Case 2 & 3.
     ASSERT(base_reg == TMP);
 
     pool_offset = base_offset;
 
     start -= Instr::kInstrSize;
     Instr* add_instr = Instr::At(start);
-    ASSERT(add_instr->IsAddSubImmOp());
-    ASSERT(add_instr->RdField() == TMP);
+    if (add_instr->IsAddSubShiftExtOp()) {
+      // Case 4.
+      ASSERT(add_instr->RdField() == TMP);
 
-    const auto shift = add_instr->Imm12ShiftField();
-    ASSERT(shift == 0 || shift == 1);
-    pool_offset += (add_instr->Imm12Field() << (shift == 1 ? 12 : 0));
+      start -= Instr::kInstrSize;
+      Instr* movk_instr = Instr::At(start);
+      ASSERT(movk_instr->IsMoveWideOp());
+      ASSERT(movk_instr->Bits(29, 2) == 3);
+      ASSERT(movk_instr->HWField() == 1);  // movk tmp, imm1, 1
+      ASSERT(movk_instr->RdField() == TMP);
+      pool_offset += (movk_instr->Imm16Field() << 16);
 
-    if (add_instr->RnField() == TMP) {
       start -= Instr::kInstrSize;
-      Instr* prev_add_instr = Instr::At(start);
-      ASSERT(prev_add_instr->IsAddSubImmOp());
-      ASSERT(prev_add_instr->RnField() == PP);
+      Instr* movz_instr = Instr::At(start);
+      ASSERT(movz_instr->IsMoveWideOp());
+      ASSERT(movz_instr->Bits(29, 2) == 2);
+      ASSERT(movz_instr->HWField() == 0);  // movz tmp, imm0, 0
+      ASSERT(movz_instr->RdField() == TMP);
+      pool_offset += movz_instr->Imm16Field();
+    } else {
+      // Case 2 & 3.
+      ASSERT(add_instr->IsAddSubImmOp());
+      ASSERT(add_instr->RdField() == TMP);
 
-      const auto shift = prev_add_instr->Imm12ShiftField();
+      const auto shift = add_instr->Imm12ShiftField();
       ASSERT(shift == 0 || shift == 1);
-      pool_offset += (prev_add_instr->Imm12Field() << (shift == 1 ? 12 : 0));
-    } else {
-      ASSERT(add_instr->RnField() == PP);
+      pool_offset += (add_instr->Imm12Field() << (shift == 1 ? 12 : 0));
+
+      if (add_instr->RnField() == TMP) {
+        start -= Instr::kInstrSize;
+        Instr* prev_add_instr = Instr::At(start);
+        ASSERT(prev_add_instr->IsAddSubImmOp());
+        ASSERT(prev_add_instr->RnField() == PP);
+
+        const auto shift = prev_add_instr->Imm12ShiftField();
+        ASSERT(shift == 0 || shift == 1);
+        pool_offset += (prev_add_instr->Imm12Field() << (shift == 1 ? 12 : 0));
+      } else {
+        ASSERT(add_instr->RnField() == PP);
+      }
     }
   }
   *index = ObjectPool::IndexFromOffset(pool_offset - kHeapObjectTag);