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[vm, compiler] Enable argument registers for RISC-V.
dart2js.aot.rv64gc 28061800 -> 27559904 (-1.8%) dart2js.aot.rv64gcb 27996112 -> 27510728 (-1.7%) TEST=ci Bug: #54955 Change-Id: Ic18ab8c33f59c36561fa7e7aed4d06f4e8f8c9dc Reviewed-on: https://dart-review.googlesource.com/c/sdk/+/357215 Reviewed-by: Slava Egorov <[email protected]> Commit-Queue: Ryan Macnak <[email protected]>
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3 files changed

+13
-4
lines changed

3 files changed

+13
-4
lines changed

runtime/vm/compiler/backend/il.cc

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Original file line numberDiff line numberDiff line change
@@ -5978,9 +5978,15 @@ void CachableIdempotentCallInstr::EmitNativeCode(FlowGraphCompiler* compiler) {
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"CachableIdempotentCall pool load and check. pool_index = "
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"%" Pd,
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cacheable_pool_index);
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#if defined(TARGET_ARCH_RISCV32) || defined(TARGET_ARCH_RISCV64)
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__ MoveRegister(TMP, dst);
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#endif
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__ LoadWordFromPoolIndex(dst, cacheable_pool_index);
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__ CompareImmediate(dst, 0);
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__ BranchIf(NOT_EQUAL, need_to_drop_args ? &drop_args : &done);
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#if defined(TARGET_ARCH_RISCV32) || defined(TARGET_ARCH_RISCV64)
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__ MoveRegister(dst, TMP);
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#endif
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__ Comment("CachableIdempotentCall pool load and check - end");
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ArgumentsInfo args_info(type_args_len(), ArgumentCount(), ArgumentsSize(),

runtime/vm/constants_riscv.h

Lines changed: 5 additions & 3 deletions
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@@ -67,7 +67,7 @@ enum Register {
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S7 = 23, // CALLEE_SAVED_TEMP2
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S8 = 24, // CALLEE_SAVED_TEMP / FAR_TMP
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S9 = 25, // DISPATCH_TABLE_REG
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S10 = 26, // nullptr
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S10 = 26, // NULL_REG
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S11 = 27, // WRITE_BARRIER_STATE
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T3 = 28,
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T4 = 29,
@@ -591,8 +591,10 @@ class CallingConventions {
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//
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// See |compiler::ComputeCallingConvention| for more details.
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struct DartCallingConvention {
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static constexpr Register kCpuRegistersForArgs[] = {kNoRegister};
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static constexpr FpuRegister kFpuRegistersForArgs[] = {kNoFpuRegister};
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// A2-A5 have conflicting uses. The order should be revisited once we
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// implement Location::MayBeSameAsInput, likely putting A0 first.
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static constexpr Register kCpuRegistersForArgs[] = {A1, A6, A0, A7};
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static constexpr FpuRegister kFpuRegistersForArgs[] = {FA0, FA1, FA2, FA3};
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};
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// TODO(riscv): Architecture-independent parts of the compiler should use

runtime/vm/object.cc

Lines changed: 2 additions & 1 deletion
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@@ -27728,7 +27728,8 @@ ErrorPtr EntryPointMemberInvocationError(const Object& member) {
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// dynamic call site.
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intptr_t Function::MaxNumberOfParametersInRegisters(Zone* zone) const {
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#if defined(TARGET_ARCH_X64) || defined(TARGET_ARCH_ARM64) || \
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defined(TARGET_ARCH_ARM)
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defined(TARGET_ARCH_ARM) || defined(TARGET_ARCH_RISCV32) || \
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defined(TARGET_ARCH_RISCV64)
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if (!FLAG_precompiled_mode) {
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return 0;
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}

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