Fix bugs in vectorized regint operations in binary VMs.

Author: mkskeller

GC/Program.hpp

@@ -115,7 +115,7 @@ BreakType Program::execute(Processor<T>& Proc, U& dynamic_memory,
         auto& instruction = p[Proc.PC++];
         switch (instruction.get_opcode())
         {
-#define X(NAME, CODE) case NAME: CODE; break;
+#define X(NAME, CODE) case NAME: {CODE;} break;
         INSTRUCTIONS
 #undef X
         default:

GC/instructions.h

@@ -35,8 +35,7 @@
 
 #define MMS processor.memories.MS
 #define MMC processor.memories.MC
-#define MID MACH->MI[IMM]
-#define MII MACH->MI[PI1.get()]
+#define MMI MACH->MI
 
 #define BIT_INSTRUCTIONS \
     X(XORS, T::xors(PROC, EXTRA)) \
@@ -106,7 +105,7 @@
     X(PRINTCHR, PROC.print_chr(IMM)) \
     X(PRINTSTR, PROC.print_str(IMM)) \
     X(PRINTFLOATPREC, PROC.print_float_prec(IMM)) \
-    X(LDINT, I0 = int(IMM)) \
+    X(LDINT, auto d = &I0; for (int i = 0; i < SIZE; i++) *d++ = int(IMM)) \
     X(ADDINT, I0 = PI1 + PI2) \
     X(SUBINT, I0 = PI1 - PI2) \
     X(MULINT, I0 = PI1 * PI2) \
@@ -121,10 +120,10 @@
     X(GTC, I0 = PI1 > PI2) \
     X(EQC, I0 = PI1 == PI2) \
     X(JMPI, PROC.PC += I0) \
-    X(LDMINT, I0 = MID) \
-    X(STMINT, MID = I0) \
-    X(LDMINTI, I0 = MII) \
-    X(STMINTI, MII = I0) \
+    X(LDMINT, PROC.mem_op(SIZE, PROC.I, MMI, R0, IMM)) \
+    X(STMINT, PROC.mem_op(SIZE, MMI, PROC.I, IMM, R0)) \
+    X(LDMINTI, PROC.mem_op(SIZE, PROC.I, MMI, R0, Ci[REG1])) \
+    X(STMINTI, PROC.mem_op(SIZE, MMI, PROC.I, Ci[REG1], R0)) \
     X(PUSHINT, PROC.pushi(I0.get())) \
     X(POPINT, PROC.popi(I0)) \
     X(MOVINT, I0 = PI1) \