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author
David Simms
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Merge jdk
Merge jdk-26+2
2 parents c600049 + d7aa349 commit a7b1404

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279 files changed

+4516
-3909
lines changed

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279 files changed

+4516
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lines changed

make/conf/jib-profiles.js

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1192,8 +1192,8 @@ var getJibProfilesDependencies = function (input, common) {
11921192
server: "jpg",
11931193
product: "jcov",
11941194
version: "3.0",
1195-
build_number: "1",
1196-
file: "bundles/jcov-3.0+1.zip",
1195+
build_number: "3",
1196+
file: "bundles/jcov-3.0+3.zip",
11971197
environment_name: "JCOV_HOME",
11981198
},
11991199

make/modules/java.base/Gensrc.gmk

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,8 @@ CLDR_GEN_DONE := $(GENSRC_DIR)/_cldr-gensrc.marker
4747
TZ_DATA_DIR := $(MODULE_SRC)/share/data/tzdata
4848
ZONENAME_TEMPLATE := $(MODULE_SRC)/share/classes/java/time/format/ZoneName.java.template
4949

50+
# The `-utf8` option is used even for US English, as some names
51+
# may contain non-ASCII characters, such as “Türkiye”.
5052
$(CLDR_GEN_DONE): $(wildcard $(CLDR_DATA_DIR)/dtd/*.dtd) \
5153
$(wildcard $(CLDR_DATA_DIR)/main/en*.xml) \
5254
$(wildcard $(CLDR_DATA_DIR)/supplemental/*.xml) \
@@ -62,7 +64,8 @@ $(CLDR_GEN_DONE): $(wildcard $(CLDR_DATA_DIR)/dtd/*.dtd) \
6264
-basemodule \
6365
-year $(COPYRIGHT_YEAR) \
6466
-zntempfile $(ZONENAME_TEMPLATE) \
65-
-tzdatadir $(TZ_DATA_DIR))
67+
-tzdatadir $(TZ_DATA_DIR) \
68+
-utf8)
6669
$(TOUCH) $@
6770

6871
TARGETS += $(CLDR_GEN_DONE)

make/modules/jdk.localedata/Gensrc.gmk

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -45,7 +45,8 @@ $(CLDR_GEN_DONE): $(wildcard $(CLDR_DATA_DIR)/dtd/*.dtd) \
4545
-baselocales "en-US" \
4646
-year $(COPYRIGHT_YEAR) \
4747
-o $(GENSRC_DIR) \
48-
-tzdatadir $(TZ_DATA_DIR))
48+
-tzdatadir $(TZ_DATA_DIR) \
49+
-utf8)
4950
$(TOUCH) $@
5051

5152
TARGETS += $(CLDR_GEN_DONE)

src/demo/share/jfc/Stylepad/HelloWorld.java

Lines changed: 5 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -187,22 +187,18 @@ static class Run {
187187
new Run("none", "Hello from Cupertino")
188188
}),
189189
new Paragraph("title", new Run[] {
190-
new Run("none", "\u53F0\u5317\u554F\u5019\u60A8\u0021")
190+
new Run("none", "台北問候您!")
191191
}),
192192
new Paragraph("title", new Run[] {
193-
new Run("none", "\u0391\u03B8\u03B7\u03BD\u03B1\u03B9\u0020" // Greek
194-
+ "\u03B1\u03C3\u03C0\u03B1\u03B6\u03BF\u03BD"
195-
+ "\u03C4\u03B1\u03B9\u0020\u03C5\u03BC\u03B1"
196-
+ "\u03C2\u0021")
193+
new Run("none", "Αθηναι ασπαζονται υμας!") // Greek
197194
}),
198195
new Paragraph("title", new Run[] {
199-
new Run("none", "\u6771\u4eac\u304b\u3089\u4eca\u65e5\u306f")
196+
new Run("none", "東京から今日は")
200197
}),
201198
new Paragraph("title", new Run[] {
202-
new Run("none", "\u05e9\u05dc\u05d5\u05dd \u05de\u05d9\u05e8\u05d5"
203-
+ "\u05e9\u05dc\u05d9\u05dd")
199+
new Run("none", "שלום מירושלים")
204200
}),
205201
new Paragraph("title", new Run[] {
206-
new Run("none", "\u0633\u0644\u0627\u0645")
202+
new Run("none", "سلام")
207203
}), };
208204
}

src/hotspot/cpu/aarch64/aarch64.ad

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3946,6 +3946,10 @@ ins_attrib ins_alignment(4); // Required alignment attribute (must
39463946
// compute_padding() function must be
39473947
// provided for the instruction
39483948

3949+
// Whether this node is expanded during code emission into a sequence of
3950+
// instructions and the first instruction can perform an implicit null check.
3951+
ins_attrib ins_is_late_expanded_null_check_candidate(false);
3952+
39493953
//----------OPERANDS-----------------------------------------------------------
39503954
// Operand definitions must precede instruction definitions for correct parsing
39513955
// in the ADLC because operands constitute user defined types which are used in

src/hotspot/cpu/aarch64/gc/z/z_aarch64.ad

Lines changed: 12 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -106,6 +106,13 @@ instruct zLoadP(iRegPNoSp dst, memory8 mem, rFlagsReg cr)
106106
match(Set dst (LoadP mem));
107107
predicate(UseZGC && !needs_acquiring_load(n) && n->as_Load()->barrier_data() != 0);
108108
effect(TEMP dst, KILL cr);
109+
// The main load is a candidate to implement implicit null checks, as long as
110+
// legitimize_address() does not require a preceding lea instruction to
111+
// materialize the memory operand. The absence of a preceding lea instruction
112+
// is guaranteed for immLoffset8 memory operands, because these do not lead to
113+
// out-of-range offsets (see definition of immLoffset8). Fortunately,
114+
// immLoffset8 memory operands are the most common ones in practice.
115+
ins_is_late_expanded_null_check_candidate(opnd_array(1)->opcode() == INDOFFL8);
109116

110117
ins_cost(4 * INSN_COST);
111118

@@ -117,7 +124,11 @@ instruct zLoadP(iRegPNoSp dst, memory8 mem, rFlagsReg cr)
117124
// Fix up any out-of-range offsets.
118125
assert_different_registers(rscratch2, as_Register($mem$$base));
119126
assert_different_registers(rscratch2, $dst$$Register);
120-
ref_addr = __ legitimize_address(ref_addr, 8, rscratch2);
127+
int size = 8;
128+
assert(!this->is_late_expanded_null_check_candidate() ||
129+
!MacroAssembler::legitimize_address_requires_lea(ref_addr, size),
130+
"an instruction that can be used for implicit null checking should emit the candidate memory access first");
131+
ref_addr = __ legitimize_address(ref_addr, size, rscratch2);
121132
}
122133
__ ldr($dst$$Register, ref_addr);
123134
z_load_barrier(masm, this, ref_addr, $dst$$Register, rscratch1);

src/hotspot/cpu/aarch64/macroAssembler_aarch64.hpp

Lines changed: 12 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -134,16 +134,21 @@ class MacroAssembler: public Assembler {
134134
a.lea(this, r);
135135
}
136136

137+
// Whether materializing the given address for a LDR/STR requires an
138+
// additional lea instruction.
139+
static bool legitimize_address_requires_lea(const Address &a, int size) {
140+
return a.getMode() == Address::base_plus_offset &&
141+
!Address::offset_ok_for_immed(a.offset(), exact_log2(size));
142+
}
143+
137144
/* Sometimes we get misaligned loads and stores, usually from Unsafe
138145
accesses, and these can exceed the offset range. */
139146
Address legitimize_address(const Address &a, int size, Register scratch) {
140-
if (a.getMode() == Address::base_plus_offset) {
141-
if (! Address::offset_ok_for_immed(a.offset(), exact_log2(size))) {
142-
block_comment("legitimize_address {");
143-
lea(scratch, a);
144-
block_comment("} legitimize_address");
145-
return Address(scratch);
146-
}
147+
if (legitimize_address_requires_lea(a, size)) {
148+
block_comment("legitimize_address {");
149+
lea(scratch, a);
150+
block_comment("} legitimize_address");
151+
return Address(scratch);
147152
}
148153
return a;
149154
}

src/hotspot/cpu/ppc/gc/z/z_ppc.ad

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -141,6 +141,7 @@ instruct zLoadP(iRegPdst dst, memoryAlg4 mem, flagsRegCR0 cr0)
141141
%{
142142
match(Set dst (LoadP mem));
143143
effect(TEMP_DEF dst, KILL cr0);
144+
ins_is_late_expanded_null_check_candidate(true);
144145
ins_cost(MEMORY_REF_COST);
145146

146147
predicate((UseZGC && n->as_Load()->barrier_data() != 0)
@@ -160,6 +161,7 @@ instruct zLoadP_acq(iRegPdst dst, memoryAlg4 mem, flagsRegCR0 cr0)
160161
%{
161162
match(Set dst (LoadP mem));
162163
effect(TEMP_DEF dst, KILL cr0);
164+
ins_is_late_expanded_null_check_candidate(true);
163165
ins_cost(3 * MEMORY_REF_COST);
164166

165167
// Predicate on instruction order is implicitly present due to the predicate of the cheaper zLoadP operation

src/hotspot/cpu/ppc/ppc.ad

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4036,6 +4036,10 @@ ins_attrib ins_field_cbuf_insts_offset(-1);
40364036
ins_attrib ins_field_load_ic_hi_node(0);
40374037
ins_attrib ins_field_load_ic_node(0);
40384038

4039+
// Whether this node is expanded during code emission into a sequence of
4040+
// instructions and the first instruction can perform an implicit null check.
4041+
ins_attrib ins_is_late_expanded_null_check_candidate(false);
4042+
40394043
//----------OPERANDS-----------------------------------------------------------
40404044
// Operand definitions must precede instruction definitions for correct
40414045
// parsing in the ADLC because operands constitute user defined types

src/hotspot/cpu/riscv/gc/z/z_riscv.ad

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -96,6 +96,7 @@ instruct zLoadP(iRegPNoSp dst, memory mem, iRegPNoSp tmp, rFlagsReg cr)
9696
match(Set dst (LoadP mem));
9797
predicate(UseZGC && n->as_Load()->barrier_data() != 0);
9898
effect(TEMP dst, TEMP tmp, KILL cr);
99+
ins_is_late_expanded_null_check_candidate(true);
99100

100101
ins_cost(4 * DEFAULT_COST);
101102

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