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arch-arm: Disassemble A64 ISB with 4-bit Crm imm
ISB takes a 4-bit Crm operand that defaults to gem5#15. Print it if it has the non-default value. Change-Id: I4655a9adf58745c15d2abc8333601e72a93f654e
1 parent 7929d38 commit a390136

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4 files changed

+29
-4
lines changed

4 files changed

+29
-4
lines changed

src/arch/arm/insts/misc64.cc

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2643,4 +2643,15 @@ AtOp64::addressTranslation64(ThreadContext* tc,
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return std::make_pair(fault, par);
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}
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2646+
std::string
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IsbOp64::generateDisassembly(Addr pc, const loader::SymbolTable *symtab) const
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{
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std::stringstream ss;
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printMnemonic(ss, "", false);
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if (imm != 15) {
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ccprintf(ss, "#%d", imm);
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}
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return ss.str();
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}
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} // namespace gem5

src/arch/arm/insts/misc64.hh

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -357,6 +357,20 @@ class AtOp64 : public MiscRegRegImmOp64
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BaseMMU::Mode mode, Request::Flags flags, RegVal val) const;
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};
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360+
class IsbOp64 : public ArmISA::ArmStaticInst
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{
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protected:
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uint64_t imm;
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IsbOp64(const char *mnem, ArmISA::ExtMachInst _machInst,
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OpClass __opClass, uint64_t _imm) :
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ArmISA::ArmStaticInst(mnem, _machInst, __opClass), imm(_imm)
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{}
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std::string generateDisassembly(
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Addr pc, const loader::SymbolTable *symtab) const override;
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};
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} // namespace gem5
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#endif

src/arch/arm/isa/formats/aarch64.isa

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -428,7 +428,7 @@ namespace Aarch64
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case 0x5:
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return new Dmb64(machInst);
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case 0x6:
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return new Isb64(machInst);
431+
return new Isb64(machInst, crm);
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default:
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return new Unknown64(machInst);
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}

src/arch/arm/isa/insts/misc64.isa

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -188,10 +188,10 @@ let {{
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decoder_output += BasicConstructor64.subst(unknown64Iop)
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exec_output += BasicExecute.subst(unknown64Iop)
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191-
isbIop = ArmInstObjParams("isb", "Isb64", "ArmStaticInst", "",
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isbIop = ArmInstObjParams("isb", "Isb64", "IsbOp64", "",
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['IsSquashAfter'])
193-
header_output += BasicDeclare.subst(isbIop)
194-
decoder_output += BasicConstructor64.subst(isbIop)
193+
header_output += ImmOp64Declare.subst(isbIop)
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decoder_output += ImmOp64Constructor.subst(isbIop)
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exec_output += BasicExecute.subst(isbIop)
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dsbLocalIop = ArmInstObjParams("dsb", "Dsb64Local", "ArmStaticInst", "",

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