Skip to content

Commit 6c6e552

Browse files
ogatatsuogatatsu
committed
Add pinMode type
1 parent 2316b0f commit 6c6e552

File tree

3 files changed

+110
-9
lines changed

3 files changed

+110
-9
lines changed

‎cores/nRF5/wiring_constants.h‎

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -26,12 +26,22 @@ extern "C"{
2626
#define LOW (0x0)
2727
#define HIGH (0x1)
2828

29-
#define INPUT (0x0)
30-
#define OUTPUT (0x1)
31-
#define INPUT_PULLUP (0x2)
32-
#define INPUT_PULLDOWN (0x3)
29+
#define INPUT (0x0)
30+
#define OUTPUT (0x1)
31+
#define INPUT_PULLUP (0x2)
32+
#define INPUT_PULLDOWN (0x3)
3333
#define INPUT_PULLUP_SENSE (0x4)
3434
#define INPUT_PULLDOWN_SENSE (0x5)
35+
#define INPUT_SENSE_HIGH (0x6)
36+
#define INPUT_SENSE_LOW (0x7)
37+
#define OUTPUT_S0S1 OUTPUT
38+
#define OUTPUT_H0S1 (0x8)
39+
#define OUTPUT_S0H1 (0x9)
40+
#define OUTPUT_H0H1 (0xA)
41+
#define OUTPUT_D0S1 (0xB)
42+
#define OUTPUT_D0H1 (0xC)
43+
#define OUTPUT_S0D1 (0xD)
44+
#define OUTPUT_H0D1 (0xE)
3545

3646
#define PI 3.1415926535897932384626433832795
3747
#define HALF_PI 1.5707963267948966192313216916398

‎cores/nRF5/wiring_digital.c‎

Lines changed: 85 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
5555
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
5656
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
5757
break;
58-
58+
5959
case INPUT_PULLUP_SENSE:
6060
// Set pin to input mode with pull-up resistor enabled and sense when Low
6161
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
@@ -75,23 +75,104 @@ void pinMode( uint32_t ulPin, uint32_t ulMode )
7575
break;
7676

7777
case INPUT_PULLDOWN_SENSE:
78-
// Set pin to input mode with pull-down resistor enabled
78+
// Set pin to input mode with pull-down resistor enabled and sense when High
7979
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
8080
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
8181
| ((uint32_t)GPIO_PIN_CNF_PULL_Pulldown << GPIO_PIN_CNF_PULL_Pos)
8282
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
8383
| ((uint32_t)GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos);
8484
break;
8585

86-
case OUTPUT:
87-
// Set pin to output mode
86+
case INPUT_SENSE_HIGH:
87+
// Set pin to input mode and sense when High
88+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
89+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
90+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
91+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
92+
| ((uint32_t)GPIO_PIN_CNF_SENSE_High << GPIO_PIN_CNF_SENSE_Pos);
93+
break;
94+
95+
case INPUT_SENSE_LOW:
96+
// Set pin to input mode and sense when Low
97+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos)
98+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
99+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
100+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
101+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Low << GPIO_PIN_CNF_SENSE_Pos);
102+
break;
103+
104+
case OUTPUT_S0S1:
105+
// Set pin to output mode, sink to standard and source to standard
88106
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
89107
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
90108
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
91109
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
92110
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
93111
break;
94112

113+
case OUTPUT_H0S1:
114+
// Set pin to output mode, sink to high drive and source to standard
115+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
116+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
117+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
118+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_H0S1 << GPIO_PIN_CNF_DRIVE_Pos)
119+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
120+
break;
121+
122+
case OUTPUT_S0H1:
123+
// Set pin to output mode, sink to standard and source to high drive
124+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
125+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
126+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
127+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0H1 << GPIO_PIN_CNF_DRIVE_Pos)
128+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
129+
break;
130+
131+
case OUTPUT_H0H1:
132+
// Set pin to output mode, sink to high drive and source to high drive
133+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
134+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
135+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
136+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos)
137+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
138+
break;
139+
140+
case OUTPUT_D0S1:
141+
// Set pin to output mode, sink to disconnect and source to standard
142+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
143+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
144+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
145+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_D0S1 << GPIO_PIN_CNF_DRIVE_Pos)
146+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
147+
break;
148+
149+
case OUTPUT_D0H1:
150+
// Set pin to output mode, sink to disconnect and source to high drive
151+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
152+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
153+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
154+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_D0H1 << GPIO_PIN_CNF_DRIVE_Pos)
155+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
156+
break;
157+
158+
case OUTPUT_S0D1:
159+
// Set pin to output mode, sink to standard and source to disconnect
160+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
161+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
162+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
163+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_S0D1 << GPIO_PIN_CNF_DRIVE_Pos)
164+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
165+
break;
166+
167+
case OUTPUT_H0D1:
168+
// Set pin to output mode, sink to high drive and source to disconnect
169+
port->PIN_CNF[ulPin] = ((uint32_t)GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos)
170+
| ((uint32_t)GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
171+
| ((uint32_t)GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
172+
| ((uint32_t)GPIO_PIN_CNF_DRIVE_H0D1 << GPIO_PIN_CNF_DRIVE_Pos)
173+
| ((uint32_t)GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos);
174+
break;
175+
95176
default:
96177
// do nothing
97178
break ;

‎keywords.txt‎

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -95,10 +95,20 @@ writeChannel KEYWORD2
9595
#######################################
9696
# Constants (LITERAL1)
9797
#######################################
98-
INPUT_PULLDOWN LITERAL1
9998
INPUT_PULLUP LITERAL1
99+
INPUT_PULLDOWN LITERAL1
100+
INPUT_SENSE_HIGH LITERAL1
101+
INPUT_SENSE_LOW LITERAL1
100102
INPUT_PULLUP_SENSE LITERAL1
101103
INPUT_PULLDOWN_SENSE LITERAL1
104+
OUTPUT_S0S1 LITERAL1
105+
OUTPUT_H0S1 LITERAL1
106+
OUTPUT_S0H1 LITERAL1
107+
OUTPUT_H0H1 LITERAL1
108+
OUTPUT_D0S1 LITERAL1
109+
OUTPUT_D0H1 LITERAL1
110+
OUTPUT_S0D1 LITERAL1
111+
OUTPUT_H0D1 LITERAL1
102112

103113
PIN_A0 LITERAL1
104114
PIN_A1 LITERAL1

0 commit comments

Comments
 (0)