[ELF] Pass Ctx &

Author: MaskRay

lld/ELF/ARMErrataFix.cpp

@@ -417,7 +417,7 @@ void ARMErr657417Patcher::insertPatches(
 // isec so the branch we are patching always goes forwards.
 static void implementPatch(ScanResult sr, InputSection *isec,
                            std::vector<Patch657417Section *> &patches) {
-
+  Ctx &ctx = isec->getCtx();
   log("detected cortex-a8-657419 erratum sequence starting at " +
       utohexstr(isec->getVA(sr.off)) + " in unpatched output.");
   Patch657417Section *psec;

lld/ELF/Arch/Mips.cpp

@@ -480,7 +480,7 @@ int64_t MIPS<ELFT>::getImplicitAddend(const uint8_t *buf, RelType type) const {
 }
 
 static std::pair<uint32_t, uint64_t>
-calculateMipsRelChain(uint8_t *loc, RelType type, uint64_t val) {
+calculateMipsRelChain(Ctx &ctx, uint8_t *loc, RelType type, uint64_t val) {
   // MIPS N64 ABI packs multiple relocations into the single relocation
   // record. In general, all up to three relocations can have arbitrary
   // types. In fact, Clang and GCC uses only a few combinations. For now,
@@ -572,7 +572,7 @@ void MIPS<ELFT>::relocate(uint8_t *loc, const Relocation &rel,
   RelType type = rel.type;
 
   if (ELFT::Is64Bits || ctx.arg.mipsN32Abi)
-    std::tie(type, val) = calculateMipsRelChain(loc, type, val);
+    std::tie(type, val) = calculateMipsRelChain(ctx, loc, type, val);
 
   // Detect cross-mode jump/branch and fix instruction.
   val = fixupCrossModeJump<ELFT>(loc, type, val);

lld/ELF/DWARF.cpp

@@ -112,6 +112,7 @@ LLDDwarfObj<ELFT>::findAux(const InputSectionBase &sec, uint64_t pos,
   const RelTy &rel = *it;
 
   const ObjFile<ELFT> *file = sec.getFile<ELFT>();
+  Ctx &ctx = sec.getCtx();
   uint32_t symIndex = rel.getSymbol(ctx.arg.isMips64EL);
   const typename ELFT::Sym &sym = file->template getELFSyms<ELFT>()[symIndex];
   uint32_t secIndex = file->getSectionIndex(sym);