@@ -2555,6 +2555,14 @@ unsigned AArch64InstrInfo::getLoadStoreImmIdx(unsigned Opc) {
25552555 case AArch64::ST4H_IMM:
25562556 case AArch64::ST4W_IMM:
25572557 case AArch64::STGPi:
2558+ case AArch64::STGPreIndex:
2559+ case AArch64::STZGPreIndex:
2560+ case AArch64::ST2GPreIndex:
2561+ case AArch64::STZ2GPreIndex:
2562+ case AArch64::STGPostIndex:
2563+ case AArch64::STZGPostIndex:
2564+ case AArch64::ST2GPostIndex:
2565+ case AArch64::STZ2GPostIndex:
25582566 case AArch64::STNPDi:
25592567 case AArch64::STNPQi:
25602568 case AArch64::STNPSi:
@@ -2598,6 +2606,8 @@ unsigned AArch64InstrInfo::getLoadStoreImmIdx(unsigned Opc) {
25982606 case AArch64::LDPWpre:
25992607 case AArch64::LDPXpost:
26002608 case AArch64::LDPXpre:
2609+ case AArch64::STGPpre:
2610+ case AArch64::STGPpost:
26012611 case AArch64::STPDpost:
26022612 case AArch64::STPDpre:
26032613 case AArch64::STPQpost:
@@ -4167,7 +4177,11 @@ bool AArch64InstrInfo::getMemOpInfo(unsigned Opcode, TypeSize &Scale,
41674177 break ;
41684178 case AArch64::LDG:
41694179 case AArch64::STGi:
4180+ case AArch64::STGPreIndex:
4181+ case AArch64::STGPostIndex:
41704182 case AArch64::STZGi:
4183+ case AArch64::STZGPreIndex:
4184+ case AArch64::STZGPostIndex:
41714185 Scale = TypeSize::getFixed (16 );
41724186 Width = TypeSize::getFixed (16 );
41734187 MinOffset = -256 ;
@@ -4334,13 +4348,19 @@ bool AArch64InstrInfo::getMemOpInfo(unsigned Opcode, TypeSize &Scale,
43344348 MaxOffset = 7 ;
43354349 break ;
43364350 case AArch64::ST2Gi:
4351+ case AArch64::ST2GPreIndex:
4352+ case AArch64::ST2GPostIndex:
43374353 case AArch64::STZ2Gi:
4354+ case AArch64::STZ2GPreIndex:
4355+ case AArch64::STZ2GPostIndex:
43384356 Scale = TypeSize::getFixed (16 );
43394357 Width = TypeSize::getFixed (32 );
43404358 MinOffset = -256 ;
43414359 MaxOffset = 255 ;
43424360 break ;
43434361 case AArch64::STGPi:
4362+ case AArch64::STGPpost:
4363+ case AArch64::STGPpre:
43444364 Scale = TypeSize::getFixed (16 );
43454365 Width = TypeSize::getFixed (16 );
43464366 MinOffset = -64 ;
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