@@ -7459,20 +7459,12 @@ void CodeGen::genIntToIntCast(GenTreePtr treeNode)
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inst_RV_RV (INS_mov, targetReg, sourceReg, srcType);
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}
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}
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- else if (treeNode->gtSetFlags () && isUnsignedDst && castOp->InReg () && (targetReg == sourceReg))
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- {
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- // if we (might) need to set the flags and the value is in the same register
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- // and we have an unsigned value then use AND instead of MOVZX
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- noway_assert (ins == INS_movzx || ins == INS_mov);
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- ins = INS_AND;
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- }
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if (ins == INS_AND)
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{
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noway_assert ((needAndAfter == false ) && isUnsignedDst);
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/* Generate "and reg, MASK */
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- insFlags flags = treeNode->gtSetFlags () ? INS_FLAGS_SET : INS_FLAGS_DONT_CARE;
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unsigned fillPattern;
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if (size == EA_1BYTE)
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fillPattern = 0xff ;
@@ -7481,7 +7473,7 @@ void CodeGen::genIntToIntCast(GenTreePtr treeNode)
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else
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fillPattern = 0xffffffff ;
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- inst_RV_IV (INS_AND, targetReg, fillPattern, EA_4BYTE, flags );
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+ inst_RV_IV (INS_AND, targetReg, fillPattern, EA_4BYTE);
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}
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#ifdef _TARGET_AMD64_
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else if (ins == INS_movsxd)
@@ -7516,8 +7508,7 @@ void CodeGen::genIntToIntCast(GenTreePtr treeNode)
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if (needAndAfter)
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{
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noway_assert (genTypeSize (dstType) == 2 && ins == INS_movsx);
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- insFlags flags = treeNode->gtSetFlags () ? INS_FLAGS_SET : INS_FLAGS_DONT_CARE;
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- inst_RV_IV (INS_AND, targetReg, 0xFFFF , EA_4BYTE, flags);
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+ inst_RV_IV (INS_AND, targetReg, 0xFFFF , EA_4BYTE);
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}
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}
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}
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