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jonathandavies-armjonathandavies-arm
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arm64: Add remaining Sve2 Saturating functions (#117934)
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10 files changed

+1134
-3
lines changed

10 files changed

+1134
-3
lines changed

‎src/coreclr/jit/emitarm64sve.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -5483,15 +5483,15 @@ void emitter::emitInsSve_R_R_R_I(instruction ins,
54835483
assert(isVectorRegister(reg2)); // nnnnn
54845484
assert(isLowVectorRegister(reg3)); // mmmm
54855485

5486-
if (opt == INS_OPTS_SCALABLE_H)
5486+
if (opt == INS_OPTS_SCALABLE_S)
54875487
{
54885488
assert((REG_V0 <= reg3) && (reg3 <= REG_V7)); // mmm
54895489
assert(isValidUimm<3>(imm)); // ii i
54905490
fmt = IF_SVE_FH_3A;
54915491
}
54925492
else
54935493
{
5494-
assert(opt == INS_OPTS_SCALABLE_S);
5494+
assert(opt == INS_OPTS_SCALABLE_D);
54955495
assert(isValidUimm<2>(imm)); // i i
54965496
fmt = IF_SVE_FH_3B;
54975497
}

‎src/coreclr/jit/hwintrinsicarm64.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -349,6 +349,8 @@ void HWIntrinsicInfo::lookupImmBounds(
349349
case NI_Sve2_MultiplyDoublingWideningBySelectedScalarAndAddSaturateOdd:
350350
case NI_Sve2_MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateEven:
351351
case NI_Sve2_MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateOdd:
352+
case NI_Sve2_MultiplyDoublingWideningSaturateEvenBySelectedScalar:
353+
case NI_Sve2_MultiplyDoublingWideningSaturateOddBySelectedScalar:
352354
// Index is on the half-width vector, hence double the maximum index.
353355
immUpperBound = Compiler::getSIMDVectorLength(simdSize, baseType) * 2 - 1;
354356
break;

‎src/coreclr/jit/hwintrinsiclistarm64sve.h

Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -367,6 +367,16 @@ HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningBySelectedScalarAndAdd
367367
HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningBySelectedScalarAndAddSaturateOdd, -1, 4, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sqdmlalt, INS_invalid, INS_sve_sqdmlalt, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
368368
HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateEven, -1, 4, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sqdmlslb, INS_invalid, INS_sve_sqdmlslb, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
369369
HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateOdd, -1, 4, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sqdmlslt, INS_invalid, INS_sve_sqdmlslt, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
370+
HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningSaturateEven, -1, 2, {INS_invalid, INS_invalid, INS_sve_sqdmullb, INS_invalid, INS_sve_sqdmullb, INS_invalid, INS_sve_sqdmullb, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable)
371+
HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningSaturateEvenBySelectedScalar, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sqdmullb, INS_invalid, INS_sve_sqdmullb, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
372+
HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningSaturateOdd, -1, 2, {INS_invalid, INS_invalid, INS_sve_sqdmullt, INS_invalid, INS_sve_sqdmullt, INS_invalid, INS_sve_sqdmullt, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable)
373+
HARDWARE_INTRINSIC(Sve2, MultiplyDoublingWideningSaturateOddBySelectedScalar, -1, 3, {INS_invalid, INS_invalid, INS_invalid, INS_invalid, INS_sve_sqdmullt, INS_invalid, INS_sve_sqdmullt, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
374+
HARDWARE_INTRINSIC(Sve2, MultiplyRoundedDoublingBySelectedScalarSaturateHigh, -1, 3, {INS_invalid, INS_invalid, INS_sve_sqrdmulh, INS_invalid, INS_sve_sqrdmulh, INS_invalid, INS_sve_sqrdmulh, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
375+
HARDWARE_INTRINSIC(Sve2, MultiplyRoundedDoublingSaturateAndAddHigh, -1, 3, {INS_sve_sqrdmlah, INS_invalid, INS_sve_sqrdmlah, INS_invalid, INS_sve_sqrdmlah, INS_invalid, INS_sve_sqrdmlah, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics)
376+
HARDWARE_INTRINSIC(Sve2, MultiplyRoundedDoublingSaturateAndSubtractHigh, -1, 3, {INS_sve_sqrdmlsh, INS_invalid, INS_sve_sqrdmlsh, INS_invalid, INS_sve_sqrdmlsh, INS_invalid, INS_sve_sqrdmlsh, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics)
377+
HARDWARE_INTRINSIC(Sve2, MultiplyRoundedDoublingSaturateBySelectedScalarAndAddHigh, -1, 4, {INS_invalid, INS_invalid, INS_sve_sqrdmlah, INS_invalid, INS_sve_sqrdmlah, INS_invalid, INS_sve_sqrdmlah, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
378+
HARDWARE_INTRINSIC(Sve2, MultiplyRoundedDoublingSaturateBySelectedScalarAndSubtractHigh, -1, 4, {INS_invalid, INS_invalid, INS_sve_sqrdmlsh, INS_invalid, INS_sve_sqrdmlsh, INS_invalid, INS_sve_sqrdmlsh, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasRMWSemantics|HW_Flag_HasImmediateOperand|HW_Flag_LowVectorOperation)
379+
HARDWARE_INTRINSIC(Sve2, MultiplyRoundedDoublingSaturateHigh, -1, 2, {INS_sve_sqrdmulh, INS_invalid, INS_sve_sqrdmulh, INS_invalid, INS_sve_sqrdmulh, INS_invalid, INS_sve_sqrdmulh, INS_invalid, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable)
370380
HARDWARE_INTRINSIC(Sve2, MultiplySubtractBySelectedScalar, -1, 4, {INS_invalid, INS_invalid, INS_sve_mls, INS_sve_mls, INS_sve_mls, INS_sve_mls, INS_sve_mls, INS_sve_mls, INS_invalid, INS_invalid}, HW_Category_SIMDByIndexedElement, HW_Flag_Scalable|HW_Flag_HasImmediateOperand|HW_Flag_HasRMWSemantics|HW_Flag_LowVectorOperation)
371381
HARDWARE_INTRINSIC(Sve2, MultiplyWideningEven, -1, 2, {INS_invalid, INS_invalid, INS_sve_smullb, INS_sve_umullb, INS_sve_smullb, INS_sve_umullb, INS_sve_smullb, INS_sve_umullb, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable)
372382
HARDWARE_INTRINSIC(Sve2, MultiplyWideningEvenAndAdd, -1, 3, {INS_invalid, INS_invalid, INS_sve_smlalb, INS_sve_umlalb, INS_sve_smlalb, INS_sve_umlalb, INS_sve_smlalb, INS_sve_umlalb, INS_invalid, INS_invalid}, HW_Category_SIMD, HW_Flag_Scalable|HW_Flag_HasRMWSemantics)

‎src/coreclr/jit/lsraarm64.cpp

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2177,12 +2177,17 @@ SingleTypeRegSet LinearScan::getOperandCandidates(GenTreeHWIntrinsic* intrinsicT
21772177
case NI_Sve2_MultiplyDoublingWideningBySelectedScalarAndAddSaturateOdd:
21782178
case NI_Sve2_MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateEven:
21792179
case NI_Sve2_MultiplyDoublingWideningBySelectedScalarAndSubtractSaturateOdd:
2180+
case NI_Sve2_MultiplyRoundedDoublingSaturateBySelectedScalarAndAddHigh:
2181+
case NI_Sve2_MultiplyRoundedDoublingSaturateBySelectedScalarAndSubtractHigh:
21802182
isLowVectorOpNum = (opNum == 3);
21812183
break;
21822184
case NI_Sve_MultiplyBySelectedScalar:
21832185
case NI_Sve2_MultiplyBySelectedScalar:
21842186
case NI_Sve2_MultiplyBySelectedScalarWideningEven:
21852187
case NI_Sve2_MultiplyBySelectedScalarWideningOdd:
2188+
case NI_Sve2_MultiplyDoublingWideningSaturateEvenBySelectedScalar:
2189+
case NI_Sve2_MultiplyDoublingWideningSaturateOddBySelectedScalar:
2190+
case NI_Sve2_MultiplyRoundedDoublingBySelectedScalarSaturateHigh:
21862191
isLowVectorOpNum = (opNum == 2);
21872192
break;
21882193
default:

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