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Move GenTreeVecCon and GenTreeMskCon under the respective FEATURE_* defines (#104932)
* Move GenTreeVecCon and GenTreeMskCon under the respective FEATURE_* defines * Apply formatting patch
1 parent a36cd09 commit 5d9d6f5

18 files changed

+195
-82
lines changed

src/coreclr/jit/assertionprop.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3007,7 +3007,7 @@ GenTree* Compiler::optVNBasedFoldConstExpr(BasicBlock* block, GenTree* parent, G
30073007
}
30083008
break;
30093009

3010-
#if FEATURE_SIMD
3010+
#if defined(FEATURE_SIMD)
30113011
case TYP_SIMD8:
30123012
{
30133013
simd8_t value = vnStore->ConstantValue<simd8_t>(vnCns);
@@ -3066,6 +3066,7 @@ GenTree* Compiler::optVNBasedFoldConstExpr(BasicBlock* block, GenTree* parent, G
30663066
break;
30673067

30683068
#endif // TARGET_XARCH
3069+
#endif // FEATURE_SIMD
30693070

30703071
#if defined(FEATURE_MASKED_HW_INTRINSICS)
30713072
case TYP_MASK:
@@ -3080,7 +3081,6 @@ GenTree* Compiler::optVNBasedFoldConstExpr(BasicBlock* block, GenTree* parent, G
30803081
}
30813082
break;
30823083
#endif // FEATURE_MASKED_HW_INTRINSICS
3083-
#endif // FEATURE_SIMD
30843084

30853085
case TYP_BYREF:
30863086
// Do not support const byref optimization.

src/coreclr/jit/codegenarm64.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -2405,6 +2405,7 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
24052405
}
24062406
break;
24072407

2408+
#if defined(FEATURE_SIMD)
24082409
case GT_CNS_VEC:
24092410
{
24102411
GenTreeVecCon* vecCon = tree->AsVecCon();
@@ -2414,7 +2415,6 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
24142415

24152416
switch (tree->TypeGet())
24162417
{
2417-
#if defined(FEATURE_SIMD)
24182418
case TYP_SIMD8:
24192419
case TYP_SIMD12:
24202420
case TYP_SIMD16:
@@ -2470,7 +2470,6 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
24702470
}
24712471
break;
24722472
}
2473-
#endif // FEATURE_SIMD
24742473

24752474
default:
24762475
{
@@ -2480,6 +2479,7 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
24802479

24812480
break;
24822481
}
2482+
#endif // FEATURE_SIMD
24832483

24842484
default:
24852485
unreached();

src/coreclr/jit/codegenarmarch.cpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -186,8 +186,12 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
186186

187187
case GT_CNS_INT:
188188
case GT_CNS_DBL:
189+
#if defined(FEATURE_SIMD)
189190
case GT_CNS_VEC:
191+
#endif // FEATURE_SIMD
192+
#if defined(FEATURE_MASKED_HW_INTRINSICS)
190193
case GT_CNS_MSK:
194+
#endif // FEATURE_MASKED_HW_INTRINSICS
191195
genSetRegToConst(targetReg, targetType, treeNode);
192196
genProduceReg(treeNode);
193197
break;

src/coreclr/jit/codegencommon.cpp

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -8320,7 +8320,14 @@ void CodeGen::genCodeForReuseVal(GenTree* treeNode)
83208320
assert(treeNode->IsReuseRegVal());
83218321

83228322
// For now, this is only used for constant nodes.
8323+
#if defined(FEATURE_MASKED_HW_INTRINSICS)
83238324
assert(treeNode->OperIs(GT_CNS_INT, GT_CNS_DBL, GT_CNS_VEC, GT_CNS_MSK));
8325+
#elif defined(FEATURE_SIMD)
8326+
assert(treeNode->OperIs(GT_CNS_INT, GT_CNS_DBL, GT_CNS_VEC));
8327+
#else
8328+
assert(treeNode->OperIs(GT_CNS_INT, GT_CNS_DBL));
8329+
#endif
8330+
83248331
JITDUMP(" TreeNode is marked ReuseReg\n");
83258332

83268333
if (treeNode->IsIntegralConst(0) && GetEmitter()->emitCurIGnonEmpty())

src/coreclr/jit/codegenxarch.cpp

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -724,27 +724,23 @@ void CodeGen::genSetRegToConst(regNumber targetReg, var_types targetType, GenTre
724724
}
725725
break;
726726

727+
#if defined(FEATURE_SIMD)
727728
case GT_CNS_VEC:
728729
{
729-
#if defined(FEATURE_SIMD)
730730
GenTreeVecCon* vecCon = tree->AsVecCon();
731731
genSetRegToConst(vecCon->GetRegNum(), targetType, &vecCon->gtSimdVal);
732-
#else
733-
unreached();
734-
#endif
735732
break;
736733
}
734+
#endif // FEATURE_SIMD
737735

736+
#if defined(FEATURE_MASKED_HW_INTRINSICS)
738737
case GT_CNS_MSK:
739738
{
740-
#if defined(FEATURE_MASKED_HW_INTRINSICS)
741739
GenTreeMskCon* mskCon = tree->AsMskCon();
742740
genSetRegToConst(mskCon->GetRegNum(), targetType, &mskCon->gtSimdMaskVal);
743-
#else
744-
unreached();
745-
#endif
746741
break;
747742
}
743+
#endif // FEATURE_MASKED_HW_INTRINSICS
748744

749745
default:
750746
unreached();
@@ -1906,8 +1902,12 @@ void CodeGen::genCodeForTreeNode(GenTree* treeNode)
19061902
FALLTHROUGH;
19071903

19081904
case GT_CNS_DBL:
1905+
#if defined(FEATURE_SIMD)
19091906
case GT_CNS_VEC:
1907+
#endif // FEATURE_SIMD
1908+
#if defined(FEATURE_MASKED_HW_INTRINSICS)
19101909
case GT_CNS_MSK:
1910+
#endif // FEATURE_MASKED_HW_INTRINSICS
19111911
genSetRegToConst(targetReg, targetType, treeNode);
19121912
genProduceReg(treeNode);
19131913
break;

src/coreclr/jit/compiler.h

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -3108,11 +3108,14 @@ class Compiler
31083108

31093109
GenTree* gtNewSconNode(int CPX, CORINFO_MODULE_HANDLE scpHandle);
31103110

3111+
#if defined(FEATURE_SIMD)
31113112
GenTreeVecCon* gtNewVconNode(var_types type);
3112-
31133113
GenTreeVecCon* gtNewVconNode(var_types type, void* data);
3114+
#endif // FEATURE_SIMD
31143115

3116+
#if defined(FEATURE_MASKED_HW_INTRINSICS)
31153117
GenTreeMskCon* gtNewMskConNode(var_types type);
3118+
#endif // FEATURE_MASKED_HW_INTRINSICS
31163119

31173120
GenTree* gtNewAllBitsSetConNode(var_types type);
31183121

@@ -11825,8 +11828,12 @@ class GenTreeVisitor
1182511828
case GT_CNS_LNG:
1182611829
case GT_CNS_DBL:
1182711830
case GT_CNS_STR:
11831+
#if defined(FEATURE_SIMD)
1182811832
case GT_CNS_VEC:
11833+
#endif // FEATURE_SIMD
11834+
#if defined(FEATURE_MASKED_HW_INTRINSICS)
1182911835
case GT_CNS_MSK:
11836+
#endif // FEATURE_MASKED_HW_INTRINSICS
1183011837
case GT_MEMORYBARRIER:
1183111838
case GT_JMP:
1183211839
case GT_JCC:

src/coreclr/jit/compiler.hpp

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -4365,8 +4365,12 @@ void GenTree::VisitOperands(TVisitor visitor)
43654365
case GT_CNS_LNG:
43664366
case GT_CNS_DBL:
43674367
case GT_CNS_STR:
4368+
#if defined(FEATURE_SIMD)
43684369
case GT_CNS_VEC:
4370+
#endif // FEATURE_SIMD
4371+
#if defined(FEATURE_MASKED_HW_INTRINSICS)
43694372
case GT_CNS_MSK:
4373+
#endif // FEATURE_MASKED_HW_INTRINSICS
43704374
case GT_MEMORYBARRIER:
43714375
case GT_JMP:
43724376
case GT_JCC:

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