Initial support for System.Runtime.Intrinsics.Arm.Aes (#48114)

Author: fanyang-mono

src/mono/mono/mini/llvm-intrinsics.h

@@ -259,6 +259,10 @@ INTRINS(AARCH64_CRC32CB, aarch64_crc32cb)
 INTRINS(AARCH64_CRC32CH, aarch64_crc32ch)
 INTRINS(AARCH64_CRC32CW, aarch64_crc32cw)
 INTRINS(AARCH64_CRC32CX, aarch64_crc32cx)
+INTRINS(AARCH64_AESD, aarch64_crypto_aesd)
+INTRINS(AARCH64_AESE, aarch64_crypto_aese)
+INTRINS(AARCH64_AESIMC, aarch64_crypto_aesimc)
+INTRINS(AARCH64_AESMC, aarch64_crypto_aesmc)
 INTRINS(AARCH64_SHA1C, aarch64_crypto_sha1c)
 INTRINS(AARCH64_SHA1H, aarch64_crypto_sha1h)
 INTRINS(AARCH64_SHA1M, aarch64_crypto_sha1m)

src/mono/mono/mini/mini-llvm.c

@@ -9069,6 +9069,8 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
 			case SIMD_OP_ARM64_CRC32CH: id = INTRINS_AARCH64_CRC32CH; zext_last = TRUE; break;
 			case SIMD_OP_ARM64_CRC32CW: id = INTRINS_AARCH64_CRC32CW; zext_last = TRUE; break;
 			case SIMD_OP_ARM64_CRC32CX: id = INTRINS_AARCH64_CRC32CX; break;
+			case SIMD_OP_AES_DEC: id = INTRINS_AARCH64_AESD; break;
+			case SIMD_OP_AES_ENC: id = INTRINS_AARCH64_AESE; break;
 			case SIMD_OP_ARM64_SHA1SU1: id = INTRINS_AARCH64_SHA1SU1; break;
 			case SIMD_OP_ARM64_SHA256SU0: id = INTRINS_AARCH64_SHA256SU0; break;
 			default: g_assert_not_reached (); break;
@@ -9096,6 +9098,8 @@ process_bb (EmitContext *ctx, MonoBasicBlock *bb)
 		case OP_XOP_X_X: {
 			IntrinsicId id = (IntrinsicId)0;
 			switch (ins->inst_c0) {
+			case SIMD_OP_AES_IMC: id = INTRINS_AARCH64_AESIMC; break;
+			case SIMD_OP_ARM64_AES_AESMC: id = INTRINS_AARCH64_AESMC; break;
 			case SIMD_OP_LLVM_FABS: id = INTRINS_AARCH64_ADV_SIMD_ABS_FLOAT; break;
 			case SIMD_OP_LLVM_DABS: id = INTRINS_AARCH64_ADV_SIMD_ABS_DOUBLE; break;
 			case SIMD_OP_LLVM_I8ABS: id = INTRINS_AARCH64_ADV_SIMD_ABS_INT8; break;

src/mono/mono/mini/mini.h

@@ -2980,6 +2980,7 @@ typedef enum {
 	SIMD_OP_ARM64_CRC32CX,
 	SIMD_OP_ARM64_RBIT32,
 	SIMD_OP_ARM64_RBIT64,
+	SIMD_OP_ARM64_AES_AESMC,
 	SIMD_OP_ARM64_SHA1C,
 	SIMD_OP_ARM64_SHA1H,
 	SIMD_OP_ARM64_SHA1M,

src/mono/mono/mini/simd-intrinsics.c

@@ -818,6 +818,14 @@ static SimdIntrinsic crc32_methods [] = {
 	{SN_get_IsSupported}
 };
 
+static SimdIntrinsic crypto_aes_methods [] = {
+	{SN_Decrypt, OP_XOP_X_X_X, SIMD_OP_AES_DEC},
+	{SN_Encrypt, OP_XOP_X_X_X, SIMD_OP_AES_ENC},
+	{SN_InverseMixColumns, OP_XOP_X_X, SIMD_OP_AES_IMC},
+	{SN_MixColumns, OP_XOP_X_X, SIMD_OP_ARM64_AES_AESMC},
+	{SN_get_IsSupported}
+};
+
 static SimdIntrinsic sha1_methods [] = {
 	{SN_FixedRotate, OP_XOP_X_X, SIMD_OP_ARM64_SHA1H},
 	{SN_HashUpdateChoose, OP_XOP_X_X_X_X, SIMD_OP_ARM64_SHA1C},
@@ -930,6 +938,12 @@ emit_arm64_intrinsics (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignatur
 		intrinsics_size = sizeof (sha1_methods);
 	}
 
+	if (is_hw_intrinsics_class (klass, "Aes", &is_64bit)) {
+		feature = MONO_CPU_ARM64_CRYPTO;
+		intrinsics = crypto_aes_methods;
+		intrinsics_size = sizeof (crypto_aes_methods);
+	}
+
 	/*
 	 * Common logic for all instruction sets
 	 */

src/mono/mono/mini/simd-methods-netcore.h

@@ -245,3 +245,4 @@ METHOD(HashUpdate1)
 METHOD(HashUpdate2)
 METHOD(ScheduleUpdate0)
 METHOD(ScheduleUpdate1)
+METHOD(MixColumns)