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Clamped increment for IncSaturate
1 parent 4c3d41f commit e5c6b4c

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2 files changed

+13
-4
lines changed

2 files changed

+13
-4
lines changed

src/coreclr/jit/codegenriscv64.cpp

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1002,14 +1002,15 @@ void CodeGen::genCodeForIncSaturate(GenTree* tree)
10021002

10031003
GenTree* operand = tree->gtGetOp1();
10041004
assert(!operand->isContained());
1005+
regNumber tempReg = internalRegisters.GetSingle(tree);
10051006
// The src must be a register.
10061007
regNumber operandReg = genConsumeReg(operand);
10071008
emitAttr attr = emitActualTypeSize(tree);
1009+
assert(EA_SIZE(attr) == EA_PTRSIZE);
1010+
assert(tempReg != operandReg);
10081011

1009-
GetEmitter()->emitIns_R_R_I(INS_addi, attr, targetReg, operandReg, 1);
1010-
// bne targetReg, zero, 2 * 4
1011-
GetEmitter()->emitIns_R_R_I(INS_bne, attr, targetReg, REG_R0, 8);
1012-
GetEmitter()->emitIns_R_R(INS_not, attr, targetReg, targetReg);
1012+
GetEmitter()->emitIns_R_R_I(INS_sltiu, attr, tempReg, operandReg, SIZE_T_MAX); // temp = (operand < max) ? 1 : 0;
1013+
GetEmitter()->emitIns_R_R_I(INS_add, attr, targetReg, operandReg, tempReg); // target = operand + temp;
10131014

10141015
genProduceReg(tree);
10151016
}

src/coreclr/jit/lsrariscv64.cpp

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -787,6 +787,14 @@ int LinearScan::BuildNode(GenTree* tree)
787787
BuildDef(tree);
788788
break;
789789

790+
case GT_INC_SATURATE:
791+
assert(dstCount == 1);
792+
srcCount = 1;
793+
BuildUse(tree->gtGetOp1());
794+
buildInternalIntRegisterDefForNode(tree);
795+
buildInternalRegisterUses();
796+
BuildDef(tree);
797+
break;
790798
} // end switch (tree->OperGet())
791799

792800
if (tree->IsUnusedValue() && (dstCount != 0))

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