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Jit Format.
1 parent 9e9ac36 commit f633726

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4 files changed

+8
-9
lines changed

4 files changed

+8
-9
lines changed

src/coreclr/jit/emitxarch.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -129,7 +129,7 @@ bool emitter::Is3OpRmwInstruction(instruction ins)
129129
return ((ins >= FIRST_FMA_INSTRUCTION) && (ins <= LAST_FMA_INSTRUCTION)) ||
130130
IsAVXVNNIFamilyInstruction(ins) ||
131131
((ins >= FIRST_AVXIFMA_INSTRUCTION) && (ins <= LAST_AVXIFMA_INSTRUCTION)) ||
132-
((ins >= FIRST_AVX10V1_FMA_INSTR) && (ins <= LAST_AVX10V1_FMA_INSTR));
132+
((ins >= FIRST_AVX10V1_FMA_INSTR) && (ins <= LAST_AVX10V1_FMA_INSTR));
133133
}
134134
}
135135
}

src/coreclr/jit/importercalls.cpp

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4684,16 +4684,15 @@ GenTree* Compiler::impIntrinsic(CORINFO_CLASS_HANDLE clsHnd,
46844684
noway_assert(!"Unknown Half static property");
46854685
}
46864686

4687-
GenTree* zeroVec =
4688-
gtNewSimdCreateScalarUnsafeNode(TYP_SIMD16, gtNewDconNodeF(0.0f), TYP_HALF, 16);
4689-
retNode = gtNewSimdHWIntrinsicNode(TYP_SIMD16, zeroVec, gtNewIconNode(halfBits, TYP_INT), opId, TYP_INT, 16);
4687+
GenTree* zeroVec = gtNewSimdCreateScalarUnsafeNode(TYP_SIMD16, gtNewDconNodeF(0.0f), TYP_HALF, 16);
4688+
retNode = gtNewSimdHWIntrinsicNode(TYP_SIMD16, zeroVec, gtNewIconNode(halfBits, TYP_INT), opId,
4689+
TYP_INT, 16);
46904690
retNode = gtNewSimdToScalarNode(TYP_HALF, retNode, TYP_HALF, 16);
46914691
}
46924692
#endif
46934693
break;
46944694
}
46954695

4696-
46974696
#endif // FEATURE_HW_INTRINSICS
46984697

46994698
case NI_System_Math_Abs:

src/coreclr/jit/lower.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -9778,10 +9778,10 @@ bool Lowering::TryRemoveBitCast(GenTreeUnOp* node)
97789778
return false;
97799779
}
97809780

9781-
//if (node->TypeGet() == TYP_HALF)
9781+
// if (node->TypeGet() == TYP_HALF)
97829782
//{
9783-
// return false;
9784-
//}
9783+
// return false;
9784+
// }
97859785

97869786
GenTree* op = node->gtGetOp1();
97879787
assert(genTypeSize(node) == genTypeSize(genActualType(op)));

src/coreclr/jit/lsrabuild.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4388,7 +4388,7 @@ int LinearScan::BuildReturn(GenTree* tree)
43884388
#ifdef TARGET_X86
43894389
useCandidates = RBM_FLOATRET;
43904390
#else
4391-
useCandidates = RBM_FLOATRET.GetFloatRegSet();
4391+
useCandidates = RBM_FLOATRET.GetFloatRegSet();
43924392
#endif
43934393
break;
43944394
case TYP_FLOAT:

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