You give one of the two operand hints the name discard. The Apple patents refer to this as last_use, which I think makes more sense and makes it clear how the hint is to be used. This name also clarifies your concern about the consequences of using this hint in a predicated instruction.
You can see this described here:
https://patents.google.com/patent/US9600288B1
(look for the description of Fig 3)
There is an additional "prefetch" hint. The register address field that is used by a third source (ie FMA instruction) can be used with a two src instruction (ie most of them) to specify a register that is to be "prefetched" in this cycle.
The scheme APPEARS to be flexible enough to allow for either
- one-time prefetch (get the value here when I want, so either matching a companion register already in Operand Cache, or avoiding a Register Bank collision against a second source register expected to be in Register File not Operand Cache)
- prefetch into Operand Cache, so lower latency first use, and cached subsequent use.
You give one of the two operand hints the name discard. The Apple patents refer to this as last_use, which I think makes more sense and makes it clear how the hint is to be used. This name also clarifies your concern about the consequences of using this hint in a predicated instruction.
You can see this described here:
https://patents.google.com/patent/US9600288B1
(look for the description of Fig 3)
There is an additional "prefetch" hint. The register address field that is used by a third source (ie FMA instruction) can be used with a two src instruction (ie most of them) to specify a register that is to be "prefetched" in this cycle.
The scheme APPEARS to be flexible enough to allow for either