[WebAssembly] Fix bug in custom shuffle combine

Summary:
The code previously assumed the source of the bitcast in the combined
pattern was a vector type, but this is not always true. This patch
adds a check to avoid an assertion failure in that case.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80164

Author: tlively

llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp

@@ -1714,8 +1714,8 @@ performVECTOR_SHUFFLECombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
 
   // Hoist vector bitcasts that don't change the number of lanes out of unary
   // shuffles, where they are less likely to get in the way of other combines.
-  // (shuffle (vNxT1 (bitcast (vNxT0 x))),  undef, mask) ->
-  //  (vNxT1 (bitcast (vNxt0 (shuffle x, undef, mask))))
+  // (shuffle (vNxT1 (bitcast (vNxT0 x))), undef, mask) ->
+  //  (vNxT1 (bitcast (vNxT0 (shuffle x, undef, mask))))
   SDValue Bitcast = N->getOperand(0);
   if (Bitcast.getOpcode() != ISD::BITCAST)
     return SDValue();
@@ -1724,7 +1724,8 @@ performVECTOR_SHUFFLECombine(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
   SDValue CastOp = Bitcast.getOperand(0);
   MVT SrcType = CastOp.getSimpleValueType();
   MVT DstType = Bitcast.getSimpleValueType();
-  if (SrcType.getVectorNumElements() != DstType.getVectorNumElements())
+  if (!SrcType.is128BitVector() ||
+      SrcType.getVectorNumElements() != DstType.getVectorNumElements())
     return SDValue();
   SDValue NewShuffle = DAG.getVectorShuffle(
       SrcType, SDLoc(N), CastOp, DAG.getUNDEF(SrcType), Shuffle->getMask());

llvm/test/CodeGen/WebAssembly/simd-shuffle-bitcast.ll

@@ -17,3 +17,14 @@ define <4 x i32> @f32x4_splat(float %x) {
   %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
   ret <4 x i32> %b
 }
+
+; CHECK-LABEL: not_a_vec:
+; CHECK-NEXT: .functype not_a_vec (i64, i64) -> (v128){{$}}
+; CHECK-NEXT: i64x2.splat $push[[L1:[0-9]+]]=, $0{{$}}
+; CHECK-NEXT: v8x16.shuffle $push[[R:[0-9]+]]=, $pop[[L1]], $2, 0, 1, 2, 3
+; CHECK-NEXT: return $pop[[R]]
+define <4 x i32> @not_a_vec(i128 %x) {
+  %a = bitcast i128 %x to <4 x i32>
+  %b = shufflevector <4 x i32> %a, <4 x i32> undef, <4 x i32> zeroinitializer
+  ret <4 x i32> %b
+}