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[InstCombine] Precommit shuffle tests for D70093.
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‎llvm/test/Transforms/InstCombine/vec_shuffle.ll

Lines changed: 186 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1004,6 +1004,192 @@ define <2 x i32> @and_splat_constant(<2 x i32> %x) {
10041004
ret <2 x i32> %r
10051005
}
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1007+
define <4 x i16> @and_constant_mask_undef(<4 x i16> %add) {
1008+
; CHECK-LABEL: @and_constant_mask_undef(
1009+
; CHECK-NEXT: entry:
1010+
; CHECK-NEXT: [[AND:%.*]] = shufflevector <4 x i16> [[ADD:%.*]], <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1011+
; CHECK-NEXT: ret <4 x i16> [[AND]]
1012+
;
1013+
entry:
1014+
%shuffle = shufflevector <4 x i16> %add, <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1015+
%and = and <4 x i16> %shuffle, <i16 0, i16 0, i16 -1, i16 -1>
1016+
ret <4 x i16> %and
1017+
}
1018+
1019+
define <4 x i16> @and_constant_mask_undef_2(<4 x i16> %add) {
1020+
; CHECK-LABEL: @and_constant_mask_undef_2(
1021+
; CHECK-NEXT: entry:
1022+
; CHECK-NEXT: [[AND:%.*]] = shufflevector <4 x i16> [[ADD:%.*]], <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 undef>
1023+
; CHECK-NEXT: ret <4 x i16> [[AND]]
1024+
;
1025+
entry:
1026+
%shuffle = shufflevector <4 x i16> %add, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 1, i32 undef>
1027+
%and = and <4 x i16> %shuffle, <i16 -1, i16 -1, i16 -1, i16 -0>
1028+
ret <4 x i16> %and
1029+
}
1030+
1031+
define <4 x i16> @and_constant_mask_undef_3(<4 x i16> %add) {
1032+
; CHECK-LABEL: @and_constant_mask_undef_3(
1033+
; CHECK-NEXT: entry:
1034+
; CHECK-NEXT: ret <4 x i16> <i16 0, i16 0, i16 0, i16 undef>
1035+
;
1036+
entry:
1037+
%shuffle = shufflevector <4 x i16> %add, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 1, i32 undef>
1038+
%and = and <4 x i16> %shuffle, <i16 0, i16 0, i16 0, i16 -1>
1039+
ret <4 x i16> %and
1040+
}
1041+
1042+
define <4 x i16> @and_constant_mask_undef_4(<4 x i16> %add) {
1043+
; CHECK-LABEL: @and_constant_mask_undef_4(
1044+
; CHECK-NEXT: entry:
1045+
; CHECK-NEXT: [[TMP0:%.*]] = and <4 x i16> [[ADD:%.*]], <i16 9, i16 20, i16 undef, i16 undef>
1046+
; CHECK-NEXT: [[AND:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 1, i32 undef>
1047+
; CHECK-NEXT: ret <4 x i16> [[AND]]
1048+
;
1049+
entry:
1050+
%shuffle = shufflevector <4 x i16> %add, <4 x i16> undef, <4 x i32> <i32 0, i32 1, i32 1, i32 undef>
1051+
%and = and <4 x i16> %shuffle, <i16 9, i16 20, i16 20, i16 -1>
1052+
ret <4 x i16> %and
1053+
}
1054+
1055+
1056+
define <4 x i16> @and_constant_mask_not_undef(<4 x i16> %add) {
1057+
; CHECK-LABEL: @and_constant_mask_not_undef(
1058+
; CHECK-NEXT: entry:
1059+
; CHECK-NEXT: [[TMP0:%.*]] = and <4 x i16> [[ADD:%.*]], <i16 undef, i16 -1, i16 0, i16 0>
1060+
; CHECK-NEXT: [[AND:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 1>
1061+
; CHECK-NEXT: ret <4 x i16> [[AND]]
1062+
;
1063+
entry:
1064+
%shuffle = shufflevector <4 x i16> %add, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 1>
1065+
%and = and <4 x i16> %shuffle, <i16 0, i16 0, i16 -1, i16 -1>
1066+
ret <4 x i16> %and
1067+
}
1068+
1069+
define <4 x i16> @or_constant_mask_undef(<4 x i16> %in) {
1070+
; CHECK-LABEL: @or_constant_mask_undef(
1071+
; CHECK-NEXT: entry:
1072+
; CHECK-NEXT: [[OR:%.*]] = shufflevector <4 x i16> [[IN:%.*]], <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1073+
; CHECK-NEXT: ret <4 x i16> [[OR]]
1074+
;
1075+
entry:
1076+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1077+
%or = or <4 x i16> %shuffle, <i16 -1, i16 -1, i16 0, i16 0>
1078+
ret <4 x i16> %or
1079+
}
1080+
1081+
define <4 x i16> @or_constant_mask_undef_2(<4 x i16> %in) {
1082+
; CHECK-LABEL: @or_constant_mask_undef_2(
1083+
; CHECK-NEXT: entry:
1084+
; CHECK-NEXT: [[OR:%.*]] = shufflevector <4 x i16> [[IN:%.*]], <4 x i16> undef, <4 x i32> <i32 undef, i32 1, i32 1, i32 undef>
1085+
; CHECK-NEXT: ret <4 x i16> [[OR]]
1086+
;
1087+
entry:
1088+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 undef, i32 1, i32 1, i32 undef>
1089+
%or = or <4 x i16> %shuffle, <i16 -1, i16 0, i16 0, i16 -1>
1090+
ret <4 x i16> %or
1091+
}
1092+
1093+
define <4 x i16> @or_constant_mask_undef_3(<4 x i16> %in) {
1094+
; CHECK-LABEL: @or_constant_mask_undef_3(
1095+
; CHECK-NEXT: entry:
1096+
; CHECK-NEXT: ret <4 x i16> <i16 undef, i16 -1, i16 -1, i16 undef>
1097+
;
1098+
entry:
1099+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 undef, i32 1, i32 1, i32 undef>
1100+
%or = or <4 x i16> %shuffle, <i16 0, i16 -1, i16 -1, i16 0>
1101+
ret <4 x i16> %or
1102+
}
1103+
1104+
define <4 x i16> @or_constant_mask_undef_4(<4 x i16> %in) {
1105+
; CHECK-LABEL: @or_constant_mask_undef_4(
1106+
; CHECK-NEXT: entry:
1107+
; CHECK-NEXT: [[TMP0:%.*]] = or <4 x i16> [[IN:%.*]], <i16 undef, i16 99, i16 undef, i16 undef>
1108+
; CHECK-NEXT: [[OR:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> undef, <4 x i32> <i32 undef, i32 1, i32 1, i32 undef>
1109+
; CHECK-NEXT: ret <4 x i16> [[OR]]
1110+
;
1111+
entry:
1112+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 undef, i32 1, i32 1, i32 undef>
1113+
%or = or <4 x i16> %shuffle, <i16 0, i16 99, i16 99, i16 0>
1114+
ret <4 x i16> %or
1115+
}
1116+
1117+
define <4 x i16> @or_constant_mask_not_undef(<4 x i16> %in) {
1118+
; CHECK-LABEL: @or_constant_mask_not_undef(
1119+
; CHECK-NEXT: entry:
1120+
; CHECK-NEXT: [[TMP0:%.*]] = or <4 x i16> [[IN:%.*]], <i16 undef, i16 -1, i16 0, i16 0>
1121+
; CHECK-NEXT: [[AND:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 1>
1122+
; CHECK-NEXT: ret <4 x i16> [[AND]]
1123+
;
1124+
entry:
1125+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 2, i32 3, i32 1, i32 1>
1126+
%and = or <4 x i16> %shuffle, <i16 0, i16 0, i16 -1, i16 -1>
1127+
ret <4 x i16> %and
1128+
}
1129+
1130+
define <4 x i16> @shl_constant_mask_undef(<4 x i16> %in) {
1131+
; CHECK-LABEL: @shl_constant_mask_undef(
1132+
; CHECK-NEXT: entry:
1133+
; CHECK-NEXT: [[TMP0:%.*]] = shl <4 x i16> [[IN:%.*]], <i16 10, i16 0, i16 0, i16 0>
1134+
; CHECK-NEXT: [[SHL:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> undef, <4 x i32> <i32 0, i32 undef, i32 1, i32 1>
1135+
; CHECK-NEXT: ret <4 x i16> [[SHL]]
1136+
;
1137+
entry:
1138+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 0, i32 undef, i32 1, i32 1>
1139+
%shl = shl <4 x i16> %shuffle, <i16 10, i16 3, i16 0, i16 0>
1140+
ret <4 x i16> %shl
1141+
}
1142+
1143+
define <4 x i16> @add_constant_mask_undef(<4 x i16> %in) {
1144+
; CHECK-LABEL: @add_constant_mask_undef(
1145+
; CHECK-NEXT: entry:
1146+
; CHECK-NEXT: [[ADD:%.*]] = shufflevector <4 x i16> [[IN:%.*]], <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1147+
; CHECK-NEXT: ret <4 x i16> [[ADD]]
1148+
;
1149+
entry:
1150+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1151+
%add = add <4 x i16> %shuffle, <i16 10, i16 3, i16 0, i16 0>
1152+
ret <4 x i16> %add
1153+
}
1154+
1155+
define <4 x i16> @add_constant_mask_undef_2(<4 x i16> %in) {
1156+
; CHECK-LABEL: @add_constant_mask_undef_2(
1157+
; CHECK-NEXT: entry:
1158+
; CHECK-NEXT: [[TMP0:%.*]] = add <4 x i16> [[IN:%.*]], <i16 undef, i16 0, i16 3, i16 undef>
1159+
; CHECK-NEXT: [[ADD:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> undef, <4 x i32> <i32 undef, i32 2, i32 1, i32 1>
1160+
; CHECK-NEXT: ret <4 x i16> [[ADD]]
1161+
;
1162+
entry:
1163+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 undef, i32 2, i32 1, i32 1>
1164+
%add = add <4 x i16> %shuffle, <i16 10, i16 3, i16 0, i16 0>
1165+
ret <4 x i16> %add
1166+
}
1167+
1168+
define <4 x i16> @sub_constant_mask_undef(<4 x i16> %in) {
1169+
; CHECK-LABEL: @sub_constant_mask_undef(
1170+
; CHECK-NEXT: entry:
1171+
; CHECK-NEXT: [[SUB:%.*]] = shufflevector <4 x i16> [[IN:%.*]], <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1172+
; CHECK-NEXT: ret <4 x i16> [[SUB]]
1173+
;
1174+
entry:
1175+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 undef, i32 undef, i32 1, i32 1>
1176+
%sub = sub <4 x i16> %shuffle, <i16 10, i16 3, i16 0, i16 0>
1177+
ret <4 x i16> %sub
1178+
}
1179+
1180+
define <4 x i16> @sub_constant_mask_undef_2(<4 x i16> %in) {
1181+
; CHECK-LABEL: @sub_constant_mask_undef_2(
1182+
; CHECK-NEXT: entry:
1183+
; CHECK-NEXT: [[TMP0:%.*]] = add <4 x i16> [[IN:%.*]], <i16 undef, i16 0, i16 -10, i16 undef>
1184+
; CHECK-NEXT: [[SUB:%.*]] = shufflevector <4 x i16> [[TMP0]], <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 undef>
1185+
; CHECK-NEXT: ret <4 x i16> [[SUB]]
1186+
;
1187+
entry:
1188+
%shuffle = shufflevector <4 x i16> %in, <4 x i16> undef, <4 x i32> <i32 1, i32 1, i32 2, i32 undef>
1189+
%sub = sub <4 x i16> %shuffle, <i16 0, i16 0, i16 10, i16 99>
1190+
ret <4 x i16> %sub
1191+
}
1192+
10071193
define <2 x i32> @or_splat_constant(<2 x i32> %x) {
10081194
; CHECK-LABEL: @or_splat_constant(
10091195
; CHECK-NEXT: [[TMP1:%.*]] = or <2 x i32> [[X:%.*]], <i32 42, i32 undef>

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