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[AArch64][GlobalISel] Enable copy elision in the pre-legalizer combine and fix a crash.
This enables the simple copy combine that already exists in the CombinerHelper. However, it exposed a bug in the GISelChangeObserver where it wouldn't clear a set of MIs to process, and so would end up causing a crash when deleted MIs were being added to the combiner worklist again. Differential Revision: https://reviews.llvm.org/D60579 llvm-svn: 358318
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llvm/lib/CodeGen/GlobalISel/GISelChangeObserver.cpp

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@@ -26,6 +26,7 @@ void GISelChangeObserver::changingAllUsesOfReg(
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void GISelChangeObserver::finishedChangingAllUsesOfReg() {
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for (auto *ChangedMI : ChangingAllUsesOfReg)
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changedInstr(*ChangedMI);
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ChangingAllUsesOfReg.clear();
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}
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RAIIDelegateInstaller::RAIIDelegateInstaller(MachineFunction &MF,

llvm/lib/Target/AArch64/AArch64PreLegalizerCombiner.cpp

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@@ -43,6 +43,8 @@ bool AArch64PreLegalizerCombinerInfo::combine(GISelChangeObserver &Observer,
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switch (MI.getOpcode()) {
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default:
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return false;
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case TargetOpcode::COPY:
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return Helper.tryCombineCopy(MI);
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case TargetOpcode::G_LOAD:
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case TargetOpcode::G_SEXTLOAD:
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case TargetOpcode::G_ZEXTLOAD:
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner %s -o - | FileCheck %s
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--- |
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
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target triple = "arm64-apple-ios5.0.0"
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define void @test() {
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ret void
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}
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...
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---
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name: test
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alignment: 2
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tracksRegLiveness: true
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registers:
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- { id: 0, class: _ }
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- { id: 1, class: _ }
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- { id: 2, class: _ }
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frameInfo:
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maxCallFrameSize: 0
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body: |
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bb.0:
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; CHECK-LABEL: name: test
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; CHECK: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
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; CHECK: $x0 = COPY [[DEF]](p0)
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%0:_(p0) = G_IMPLICIT_DEF
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%1:_(p0) = COPY %0(p0)
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%2:_(p0) = COPY %1(p0)
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$x0 = COPY %2(p0)
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...

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