Skip to content

Commit 9c7d21c

Browse files
LebedevRImemfrob
authored andcommitted
[X86][Costmodel] Load/store i8 Stride=4 VF=4 interleaving costs
While we already model this tuple, the store cost is divergent from reality, so fix it. The only sched models that for cpu's that support avx2 but not avx512 are: haswell, broadwell, skylake, zen1-3 For load we have: https://godbolt.org/z/1n4bPh7Tn - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0` So pick cost of `4`. For store we have: https://godbolt.org/z/r8K9sveqo - for intels `Block RThroughput: =4.0`; for ryzens, `Block RThroughput: <=2.0` So pick cost of `4`. I'm directly using the shuffling asm the llc produced, without any manual fixups that may be needed to ensure sequential execution. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D110968
1 parent 4f2a6ae commit 9c7d21c

File tree

2 files changed

+2
-2
lines changed

2 files changed

+2
-2
lines changed

llvm/lib/Target/X86/X86TargetTransformInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5145,7 +5145,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
51455145
{3, MVT::v32i8, 13}, // interleave 3 x 32i8 into 96i8 (and store)
51465146

51475147
{4, MVT::v2i8, 4}, // interleave 4 x 2i8 into 8i8 (and store)
5148-
{4, MVT::v4i8, 9}, // interleave 4 x 4i8 into 16i8 (and store)
5148+
{4, MVT::v4i8, 4}, // interleave 4 x 4i8 into 16i8 (and store)
51495149
{4, MVT::v8i8, 10}, // interleave 4 x 8i8 into 32i8 (and store)
51505150
{4, MVT::v16i8, 10}, // interleave 4 x 16i8 into 64i8 (and store)
51515151
{4, MVT::v32i8, 12}, // interleave 4 x 32i8 into 128i8 (and store)

llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-4.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ target triple = "x86_64-unknown-linux-gnu"
2727
;
2828
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i8 %v3, i8* %out3, align 1
2929
; AVX2: LV: Found an estimated cost of 5 for VF 2 For instruction: store i8 %v3, i8* %out3, align 1
30-
; AVX2: LV: Found an estimated cost of 10 for VF 4 For instruction: store i8 %v3, i8* %out3, align 1
30+
; AVX2: LV: Found an estimated cost of 5 for VF 4 For instruction: store i8 %v3, i8* %out3, align 1
3131
; AVX2: LV: Found an estimated cost of 11 for VF 8 For instruction: store i8 %v3, i8* %out3, align 1
3232
; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction: store i8 %v3, i8* %out3, align 1
3333
; AVX2: LV: Found an estimated cost of 16 for VF 32 For instruction: store i8 %v3, i8* %out3, align 1

0 commit comments

Comments
 (0)