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AMDGPU/GlobalISel: RegBankSelect for WWM/WQM
llvm-svn: 364763
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llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

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@@ -1506,6 +1506,8 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
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case Intrinsic::amdgcn_sdot8:
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case Intrinsic::amdgcn_udot8:
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case Intrinsic::amdgcn_fdiv_fast:
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case Intrinsic::amdgcn_wwm:
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case Intrinsic::amdgcn_wqm:
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return getDefaultMappingVOP(MI);
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case Intrinsic::amdgcn_ds_permute:
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case Intrinsic::amdgcn_ds_bpermute:
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: wqm_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: wqm_s
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wqm), [[COPY]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wqm), %0
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...
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---
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name: wqm_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: wqm_v
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wqm), [[COPY]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wqm), %0
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...
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-fast -verify-machineinstrs -o - %s | FileCheck %s
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# RUN: llc -march=amdgcn -mcpu=fiji -run-pass=regbankselect -regbankselect-greedy -verify-machineinstrs -o - %s | FileCheck %s
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---
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name: wwm_s
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legalized: true
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body: |
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bb.0:
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liveins: $sgpr0
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; CHECK-LABEL: name: wwm_s
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; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wwm), [[COPY]](s32)
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%0:_(s32) = COPY $sgpr0
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%1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wwm), %0
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...
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---
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name: wwm_v
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legalized: true
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: wwm_v
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; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; CHECK: [[INT:%[0-9]+]]:vgpr(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wwm), [[COPY]](s32)
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%0:_(s32) = COPY $vgpr0
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%1:_(s32) = G_INTRINSIC intrinsic(@llvm.amdgcn.wwm), %0
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...

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