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Flakebimemfrob
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[AMDGPU] Remove outdated TODOs. NFC
spillSGPRToVGPR is already respected in these places since D95768. Differential Revision: https://reviews.llvm.org/D99570
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llvm/lib/Target/AMDGPU/SIFrameLowering.cpp

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@@ -951,7 +951,6 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
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assert(Spill.size() == 1);
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// Save FP before setting it up.
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// FIXME: This should respect spillSGPRToVGPR;
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BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR)
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.addReg(FramePtrReg)
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.addImm(Spill[0].Lane)
@@ -969,7 +968,6 @@ void SIFrameLowering::emitPrologue(MachineFunction &MF,
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assert(Spill.size() == 1);
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// Save BP before setting it up.
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// FIXME: This should respect spillSGPRToVGPR;
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BuildMI(MBB, MBBI, DL, TII->get(AMDGPU::V_WRITELANE_B32), Spill[0].VGPR)
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.addReg(BasePtrReg)
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.addImm(Spill[0].Lane)

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