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pre-commit: PR113707 #1540

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b197eb4
pre-commit: PR113707
dtcxzyw Oct 26, 2024
2b4e2b5
pre-commit: Update
github-actions[bot] Oct 26, 2024
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5 changes: 1 addition & 4 deletions bench/abc/optimized/abcAig.c.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -1325,7 +1325,7 @@ define i32 @Abc_AigLevel(ptr noundef %0) local_unnamed_addr #0 {
%19 = getelementptr inbounds i8, ptr %18, i64 20
%20 = load i32, ptr %19, align 4
%21 = lshr i32 %20, 12
%spec.select = tail call i32 @llvm.smax.i32(i32 %.019, i32 %21)
%spec.select = tail call i32 @llvm.umax.i32(i32 %.019, i32 %21)
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
br i1 %exitcond.not, label %.critedge, label %10, !llvm.loop !23
Expand Down Expand Up @@ -5038,9 +5038,6 @@ declare noundef i32 @putchar(i32 noundef) local_unnamed_addr #16
; Function Attrs: nofree nounwind willreturn allockind("alloc,zeroed") allocsize(0,1) memory(inaccessiblemem: readwrite)
declare noalias noundef ptr @calloc(i64 noundef, i64 noundef) local_unnamed_addr #18

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #17

; Function Attrs: nocallback nofree nosync nounwind willreturn memory(argmem: readwrite)
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) #19

Expand Down
45 changes: 15 additions & 30 deletions bench/abc/optimized/llb1Sched.c.ll
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Expand Up @@ -235,7 +235,7 @@ define range(i32 -2147483648, 2147483646) i32 @Llb_MtrFindBestColumn(ptr nocaptu
%86 = icmp sgt i32 %.lcssa164, 0
%87 = getelementptr inbounds i8, ptr %0, i64 40
%88 = getelementptr inbounds i8, ptr %0, i64 64
br i1 %86, label %.preheader.lr.ph.split.us, label %.preheader
br i1 %86, label %.preheader.lr.ph.split.us, label %.loopexit

.preheader.lr.ph.split.us: ; preds = %.preheader.lr.ph
%89 = getelementptr inbounds i8, ptr %0, i64 56
Expand Down Expand Up @@ -307,19 +307,8 @@ define range(i32 -2147483648, 2147483646) i32 @Llb_MtrFindBestColumn(ptr nocaptu
%116 = icmp sgt i32 %.087129.us, %.192.us
br i1 %116, label %95, label %92

.preheader: ; preds = %.preheader.lr.ph, %.preheader
%.2132 = phi i32 [ %spec.select167, %.preheader ], [ %.074.lcssa163, %.preheader.lr.ph ]
%.4131 = phi i32 [ %118, %.preheader ], [ %1, %.preheader.lr.ph ]
%.087129 = phi i32 [ %spec.select166, %.preheader ], [ 1000000000, %.preheader.lr.ph ]
%117 = icmp sgt i32 %.087129, 0
%spec.select166 = tail call i32 @llvm.smin.i32(i32 %.087129, i32 0)
%spec.select167 = select i1 %117, i32 %.4131, i32 %.2132
%118 = add nsw i32 %.4131, 1
%exitcond145.not = icmp eq i32 %118, %84
br i1 %exitcond145.not, label %.loopexit, label %.preheader, !llvm.loop !8

.loopexit: ; preds = %.preheader, %97, %.preheader101, %._crit_edge119
%.093 = phi i32 [ %.175, %._crit_edge119 ], [ %.074.lcssa163, %.preheader101 ], [ %.3.us, %97 ], [ %spec.select167, %.preheader ]
.loopexit: ; preds = %97, %.preheader.lr.ph, %.preheader101, %._crit_edge119
%.093 = phi i32 [ %.175, %._crit_edge119 ], [ %.074.lcssa163, %.preheader101 ], [ %1, %.preheader.lr.ph ], [ %.3.us, %97 ]
ret i32 %.093
}

Expand All @@ -331,7 +320,7 @@ define internal void @Abc_Print(i32 %0, ptr noundef %1, ...) unnamed_addr #1 {
br i1 %.not, label %23, label %5

5: ; preds = %2
%6 = tail call i32 (...) @Abc_FrameIsBridgeMode() #8
%6 = tail call i32 (...) @Abc_FrameIsBridgeMode() #7
%.not8 = icmp eq i32 %6, 0
br i1 %.not8, label %7, label %9

Expand All @@ -341,26 +330,26 @@ define internal void @Abc_Print(i32 %0, ptr noundef %1, ...) unnamed_addr #1 {

9: ; preds = %5
%10 = load ptr, ptr @stdout, align 8
%11 = tail call i32 @Gia_ManToBridgeText(ptr noundef %10, i32 noundef 7, ptr noundef nonnull @.str.3) #8
%11 = tail call i32 @Gia_ManToBridgeText(ptr noundef %10, i32 noundef 7, ptr noundef nonnull @.str.3) #7
br label %12

12: ; preds = %9, %7
call void @llvm.va_start.p0(ptr nonnull %3)
%13 = call i32 (...) @Abc_FrameIsBridgeMode() #8
%13 = call i32 (...) @Abc_FrameIsBridgeMode() #7
%.not9 = icmp eq i32 %13, 0
br i1 %.not9, label %20, label %14

14: ; preds = %12
%15 = call ptr @vnsprintf(ptr noundef %1, ptr noundef nonnull %3) #8
%15 = call ptr @vnsprintf(ptr noundef %1, ptr noundef nonnull %3) #7
%16 = load ptr, ptr @stdout, align 8
%17 = call i64 @strlen(ptr noundef nonnull dereferenceable(1) %15) #9
%17 = call i64 @strlen(ptr noundef nonnull dereferenceable(1) %15) #8
%18 = trunc i64 %17 to i32
%19 = call i32 @Gia_ManToBridgeText(ptr noundef %16, i32 noundef %18, ptr noundef %15) #8
call void @free(ptr noundef %15) #8
%19 = call i32 @Gia_ManToBridgeText(ptr noundef %16, i32 noundef %18, ptr noundef %15) #7
call void @free(ptr noundef %15) #7
br label %22

20: ; preds = %12
%21 = call i32 @vprintf(ptr noundef %1, ptr noundef nonnull %3) #8
%21 = call i32 @vprintf(ptr noundef %1, ptr noundef nonnull %3) #7
br label %22

22: ; preds = %20, %14
Expand Down Expand Up @@ -587,7 +576,7 @@ define void @Llb_MtrSchedule(ptr noundef %0) local_unnamed_addr #1 {
br i1 %35, label %9, label %._crit_edge, !llvm.loop !13

._crit_edge: ; preds = %30, %1
tail call void @Llb_MtrVerifyMatrix(ptr noundef nonnull %0) #8
tail call void @Llb_MtrVerifyMatrix(ptr noundef nonnull %0) #7
%36 = getelementptr inbounds i8, ptr %0, i64 12
%37 = load i32, ptr %36, align 4
%38 = icmp sgt i32 %37, 2
Expand Down Expand Up @@ -783,7 +772,7 @@ Llb_MtrSwapColumns.exit: ; preds = %Llb_MtrUseSelectedC
br i1 %143, label %45, label %._crit_edge43, !llvm.loop !14

._crit_edge43: ; preds = %Llb_MtrSwapColumns.exit, %._crit_edge
tail call void @Llb_MtrVerifyMatrix(ptr noundef nonnull %0) #8
tail call void @Llb_MtrVerifyMatrix(ptr noundef nonnull %0) #7
ret void
}

Expand Down Expand Up @@ -813,19 +802,15 @@ declare void @llvm.va_start.p0(ptr) #6
; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn
declare void @llvm.va_end.p0(ptr) #6

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smin.i32(i32, i32) #7

attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(readwrite, inaccessiblemem: none) uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #1 = { nounwind uwtable "frame-pointer"="all" "min-legal-vector-width"="0" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #2 = { "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #3 = { nofree nounwind "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #4 = { mustprogress nofree nounwind willreturn memory(argmem: read) "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #5 = { mustprogress nounwind willreturn allockind("free") memory(argmem: readwrite, inaccessiblemem: readwrite) "alloc-family"="malloc" "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+cmov,+cx8,+fxsr,+mmx,+sse,+sse2,+x87" "tune-cpu"="generic" }
attributes #6 = { mustprogress nocallback nofree nosync nounwind willreturn }
attributes #7 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
attributes #8 = { nounwind }
attributes #9 = { nounwind willreturn memory(read) }
attributes #7 = { nounwind }
attributes #8 = { nounwind willreturn memory(read) }

!llvm.module.flags = !{!0, !1, !2, !3}

Expand Down
63 changes: 28 additions & 35 deletions bench/abc/optimized/pdrUtil.c.ll
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Expand Up @@ -88,7 +88,7 @@ define noalias noundef ptr @Pdr_SetCreate(ptr nocapture noundef readonly %0, ptr
%.024.i = phi i32 [ %29, %.lr.ph.preheader.i ], [ %spec.select.i, %.lr.ph.i ]
%30 = getelementptr inbounds i32, ptr %27, i64 %indvars.iv29.i
%31 = load i32, ptr %30, align 4
%32 = sext i32 %.024.i to i64
%32 = zext nneg i32 %.024.i to i64
%33 = getelementptr inbounds i32, ptr %27, i64 %32
%34 = load i32, ptr %33, align 4
%35 = icmp slt i32 %31, %34
Expand All @@ -102,49 +102,42 @@ define noalias noundef ptr @Pdr_SetCreate(ptr nocapture noundef readonly %0, ptr
%indvars.iv.next33.i = add nuw nsw i64 %indvars.iv32.i, 1
%37 = getelementptr inbounds i32, ptr %27, i64 %indvars.iv32.i
%38 = load i32, ptr %37, align 4
%39 = sext i32 %spec.select.i to i64
%39 = zext nneg i32 %spec.select.i to i64
%40 = getelementptr inbounds i32, ptr %27, i64 %39
%41 = load i32, ptr %40, align 4
store i32 %41, ptr %37, align 4
store i32 %38, ptr %40, align 4
%indvars.iv.next.i = add nuw nsw i64 %indvars.iv.i, 1
%exitcond36.not.i = icmp eq i64 %indvars.iv.next33.i, %wide.trip.count35.i
br i1 %exitcond36.not.i, label %Vec_IntSelectSort.exit.loopexit, label %.lr.ph.preheader.i, !llvm.loop !7

Vec_IntSelectSort.exit.loopexit: ; preds = %._crit_edge.i
%.pre = load i32, ptr %10, align 8
%.pre45 = load i32, ptr %11, align 4
br label %Vec_IntSelectSort.exit
br i1 %exitcond36.not.i, label %Vec_IntSelectSort.exit, label %.lr.ph.preheader.i, !llvm.loop !7

Vec_IntSelectSort.exit: ; preds = %2, %Vec_IntSelectSort.exit.loopexit, %26
%42 = phi i32 [ %.pre45, %Vec_IntSelectSort.exit.loopexit ], [ %5, %26 ], [ %5, %2 ]
%43 = phi i32 [ %.pre, %Vec_IntSelectSort.exit.loopexit ], [ %.val, %26 ], [ %.val, %2 ]
%44 = icmp slt i32 %43, %42
br i1 %44, label %.lr.ph39, label %._crit_edge40
Vec_IntSelectSort.exit: ; preds = %._crit_edge.i, %2, %26
%42 = icmp sgt i32 %.val31, 0
br i1 %42, label %.lr.ph39, label %._crit_edge40

.lr.ph39: ; preds = %Vec_IntSelectSort.exit
%45 = getelementptr i8, ptr %1, i64 8
%.val36 = load ptr, ptr %45, align 8
%46 = sext i32 %43 to i64
%47 = getelementptr inbounds i8, ptr %9, i64 20
br label %48

48: ; preds = %.lr.ph39, %48
%indvars.iv42 = phi i64 [ %46, %.lr.ph39 ], [ %indvars.iv.next43, %48 ]
%49 = load i32, ptr %10, align 8
%50 = sext i32 %49 to i64
%51 = sub nsw i64 %indvars.iv42, %50
%52 = getelementptr inbounds i32, ptr %.val36, i64 %51
%53 = load i32, ptr %52, align 4
%54 = getelementptr inbounds [0 x i32], ptr %47, i64 0, i64 %indvars.iv42
store i32 %53, ptr %54, align 4
%43 = getelementptr i8, ptr %1, i64 8
%.val36 = load ptr, ptr %43, align 8
%44 = sext i32 %.val to i64
%45 = getelementptr inbounds i8, ptr %9, i64 20
br label %46

46: ; preds = %.lr.ph39, %46
%indvars.iv42 = phi i64 [ %44, %.lr.ph39 ], [ %indvars.iv.next43, %46 ]
%47 = load i32, ptr %10, align 8
%48 = sext i32 %47 to i64
%49 = sub nsw i64 %indvars.iv42, %48
%50 = getelementptr inbounds i32, ptr %.val36, i64 %49
%51 = load i32, ptr %50, align 4
%52 = getelementptr inbounds [0 x i32], ptr %45, i64 0, i64 %indvars.iv42
store i32 %51, ptr %52, align 4
%indvars.iv.next43 = add nsw i64 %indvars.iv42, 1
%55 = load i32, ptr %11, align 4
%56 = sext i32 %55 to i64
%57 = icmp slt i64 %indvars.iv.next43, %56
br i1 %57, label %48, label %._crit_edge40, !llvm.loop !8
%53 = load i32, ptr %11, align 4
%54 = sext i32 %53 to i64
%55 = icmp slt i64 %indvars.iv.next43, %54
br i1 %55, label %46, label %._crit_edge40, !llvm.loop !8

._crit_edge40: ; preds = %48, %Vec_IntSelectSort.exit
._crit_edge40: ; preds = %46, %Vec_IntSelectSort.exit
ret ptr %9
}

Expand Down Expand Up @@ -284,7 +277,7 @@ define noalias noundef ptr @Pdr_SetCreateSubset(ptr nocapture noundef readonly %
%.024.i = phi i32 [ %35, %.lr.ph.preheader.i ], [ %spec.select.i, %.lr.ph.i ]
%36 = getelementptr inbounds i32, ptr %33, i64 %indvars.iv29.i
%37 = load i32, ptr %36, align 4
%38 = sext i32 %.024.i to i64
%38 = zext nneg i32 %.024.i to i64
%39 = getelementptr inbounds i32, ptr %33, i64 %38
%40 = load i32, ptr %39, align 4
%41 = icmp slt i32 %37, %40
Expand All @@ -298,7 +291,7 @@ define noalias noundef ptr @Pdr_SetCreateSubset(ptr nocapture noundef readonly %
%indvars.iv.next33.i = add nuw nsw i64 %indvars.iv32.i, 1
%43 = getelementptr inbounds i32, ptr %33, i64 %indvars.iv32.i
%44 = load i32, ptr %43, align 4
%45 = sext i32 %spec.select.i to i64
%45 = zext nneg i32 %spec.select.i to i64
%46 = getelementptr inbounds i32, ptr %33, i64 %45
%47 = load i32, ptr %46, align 4
store i32 %47, ptr %43, align 4
Expand Down
9 changes: 6 additions & 3 deletions bench/abc/optimized/retDelay.c.ll
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Expand Up @@ -517,7 +517,7 @@ Vec_IntFillExtra.exit: ; preds = %95, %._crit_edge.i
%194 = getelementptr inbounds ptr, ptr %.val180.val.val.i, i64 %193
%195 = load ptr, ptr %194, align 8
%196 = tail call fastcc i32 @Abc_NtkRetimeTiming_rec(ptr noundef %195, i32 noundef 0)
%spec.select146.i = tail call i32 @llvm.smax.i32(i32 %.7306.i, i32 %196)
%spec.select146.i = tail call i32 @llvm.umax.i32(i32 %.7306.i, i32 %196)
%indvars.iv.next345.i = add nuw nsw i64 %indvars.iv344.i, 1
%exitcond348.not.i = icmp eq i64 %indvars.iv.next345.i, %wide.trip.count347.i
br i1 %exitcond348.not.i, label %.critedge10.preheader.i, label %187, !llvm.loop !12
Expand Down Expand Up @@ -1494,7 +1494,7 @@ define internal fastcc range(i32 0, 1048576) i32 @Abc_NtkRetimeTiming_rec(ptr no
%33 = getelementptr inbounds ptr, ptr %.val40.val.val, i64 %32
%34 = load ptr, ptr %33, align 8
%35 = tail call fastcc i32 @Abc_NtkRetimeTiming_rec(ptr noundef %34, i32 noundef %1)
%spec.select = tail call i32 @llvm.smax.i32(i32 %.050, i32 %35)
%spec.select = tail call i32 @llvm.umax.i32(i32 %.050, i32 %35)
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%.val39 = load i32, ptr %21, align 4
%36 = sext i32 %.val39 to i64
Expand All @@ -1516,7 +1516,7 @@ define internal fastcc range(i32 0, 1048576) i32 @Abc_NtkRetimeTiming_rec(ptr no
%44 = getelementptr inbounds ptr, ptr %.val43.val.val, i64 %43
%45 = load ptr, ptr %44, align 8
%46 = tail call fastcc i32 @Abc_NtkRetimeTiming_rec(ptr noundef %45, i32 noundef 0)
%spec.select37 = tail call i32 @llvm.smax.i32(i32 %.353, i32 %46)
%spec.select37 = tail call i32 @llvm.umax.i32(i32 %.353, i32 %46)
%indvars.iv.next59 = add nuw nsw i64 %indvars.iv58, 1
%.val42 = load i32, ptr %24, align 4
%47 = sext i32 %.val42 to i64
Expand Down Expand Up @@ -1644,6 +1644,9 @@ declare void @free(ptr allocptr nocapture noundef) local_unnamed_addr #5
; Function Attrs: nofree nounwind
declare noundef i32 @puts(ptr nocapture noundef readonly) local_unnamed_addr #6

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.umax.i32(i32, i32) #7

; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none)
declare i32 @llvm.smax.i32(i32, i32) #7

Expand Down
4 changes: 2 additions & 2 deletions bench/arrow/optimized/codegen_internal.cc.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -2937,7 +2937,7 @@ for.end58: ; preds = %_ZN5arrowL9bit_widt
br i1 %cmp59, label %if.then60, label %if.end95

if.then60: ; preds = %for.end58
%cmp61 = icmp sgt i32 %spec.select229, 63
%cmp61 = icmp samesign ugt i32 %spec.select229, 63
br i1 %cmp61, label %if.then62, label %if.end67

if.then62: ; preds = %if.then60
Expand Down Expand Up @@ -3115,7 +3115,7 @@ _ZNSt10shared_ptrIN5arrow8DataTypeEEC2ERKS2_.exit128: ; preds = %while.end90, %i
br label %return

if.end95: ; preds = %for.end58
%cmp96.not = icmp sgt i32 %spec.select, %spec.select229
%cmp96.not = icmp samesign ugt i32 %spec.select, %spec.select229
br i1 %cmp96.not, label %if.end100, label %if.then97

if.then97: ; preds = %if.end95
Expand Down
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