pre-commit: PR128741

[dtcxzyw]

Link: llvm/llvm-project#128741
Requested by: @dtcxzyw

[dtcxzyw]

Diff mode

runner: buildkitsandbox
baseline: llvm/llvm-project@01cc1d1
patch: llvm/llvm-project#128741
sha256: 717e914ba3f556d8f0fdb65c193ddc19b2b8f00d5507e74e0f4ddf65dd854dd0
commit: 8675f4e

297 files changed, 130060 insertions(+), 130095 deletions(-)

Improvements:
  instcombine.NumFactor 39473 -> 39482 +0.02%
  instcombine.NumReassoc 253541 -> 253585 +0.02%
  correlated-value-propagation.NumSExt 42419 -> 42420 +0.00%
  instcombine.NumDeadInst 34448484 -> 34448873 +0.00%
  instcombine.NumTwoIterations 16649718 -> 16649858 +0.00%
  instcombine.NumCombined 100997126 -> 100997467 +0.00%
  lcssa.NumLCSSA 13354428 -> 13354441 +0.00%
  correlated-value-propagation.NumPhis 1081401 -> 1081402 +0.00%
  jump-threading.NumThreads 2332589 -> 2332591 +0.00%
  early-cse.NumCSE 3803697 -> 3803699 +0.00%
Regressions:
  correlated-value-propagation.NumAddNUW 202303 -> 202188 -0.06%
  instsimplify.NumExpand 142204 -> 142141 -0.04%
  correlated-value-propagation.NumNUW 407173 -> 407058 -0.03%
  correlated-value-propagation.NumAddNW 434993 -> 434878 -0.03%
  correlated-value-propagation.NumNW 875757 -> 875642 -0.01%
  instsimplify.NumReassoc 336028 -> 335992 -0.01%
  indvars.NumElimIV 215453 -> 215451 -0.00%
  indvars.NumWidened 212318 -> 212317 -0.00%
  indvars.NumElimExt 259419 -> 259418 -0.00%
  indvars.NumLFTR 264121 -> 264120 -0.00%

4 4 bench/actix-rs/optimized/2wg1z1eatrkafji9.ll
2 2 bench/coreutils-rs/optimized/1ks0bjj5pmsh3du4.ll
18 18 bench/coreutils-rs/optimized/if1nymhyh0puht7.ll
106 106 bench/delta-rs/optimized/1rw3q64nilk4jthd.ll
36 36 bench/eastl/optimized/Int128_t.ll
1 2 bench/g2o/optimized/types_seven_dof_expmap.ll
6 6 bench/image-rs/optimized/2mngkegtim1o10y3.ll
30 30 bench/influxdb-rs/optimized/17ptp6pnu4b90vr6.ll
14 14 bench/just-rs/optimized/15iymzte00kmcyqz.ll
105 109 bench/linux/optimized/vgaarb.ll
5 25 bench/llvm/optimized/KnownBits.ll
29 34 bench/llvm/optimized/PtrTypesSemantics.ll
6 15 bench/llvm/optimized/X86FrameLowering.ll
50 50 bench/meilisearch-rs/optimized/2zqq886j9ovgawmv.ll
10 10 bench/meilisearch-rs/optimized/7fmwz6nrtt7kwsj.ll
8 8 bench/mini-lsm-rs/optimized/1mavrvqu7b39yar1.ll
22 22 bench/ockam-rs/optimized/37q648fnmlksdgjw.ll
19 19 bench/opencv/optimized/softfloat.ll
4 4 bench/openjdk/optimized/c2_stubGenerator_x86_64_string.ll
27 26 bench/qemu/optimized/tcg.ll
12 12 bench/rust-analyzer-rs/optimized/1x49zfabvca0zorz.ll
116 116 bench/rust-analyzer-rs/optimized/2025sm42y7i6frv5.ll
338 338 bench/rust-analyzer-rs/optimized/2334ao9w0k9d7973.ll
34 34 bench/rust-analyzer-rs/optimized/2pjlntmpzwg88apl.ll
146 146 bench/rust-analyzer-rs/optimized/3jjg9gby3m7lsfsh.ll
16 16 bench/rust-analyzer-rs/optimized/58xaix613yc6ngmz.ll
26 26 bench/rust-analyzer-rs/optimized/5tc27igfpd8lxn0.ll
2 2 bench/rust-analyzer-rs/optimized/sdlo5r5xb34d3pv.ll
24 24 bench/rust-analyzer-rs/optimized/vccy6rg1lgzb14e.ll
20 20 bench/rustfmt-rs/optimized/2iek5i6kf8wd1vt9.ll
12 12 bench/tls-rs/optimized/4vg8hiu39ndz9uqe.ll
46 46 bench/tokenizers-rs/optimized/10h1ju7dwsvagf79.ll
88 88 bench/tree-sitter-rs/optimized/r2wcjjxpw45z4gt.ll
28 28 bench/typst-rs/optimized/3efk6odw6ecl29p.ll
104 104 bench/typst-rs/optimized/3rk2ctuzbghb17s4.ll
32 32 bench/wasmtime-rs/optimized/18j9bq48s0hpcaoq.ll
38 38 bench/wasmtime-rs/optimized/35t0vcavp8gy3o68.ll
44 44 bench/wasmtime-rs/optimized/45190zkycf5izngt.ll
68 68 bench/wasmtime-rs/optimized/4ab4rlryc5h7bf6z.ll
12 10 bench/yoga/optimized/Node.ll
150 150 bench/zed-rs/optimized/18cjjdq897fwjf59btw7ls4h5.ll
76 76 bench/zed-rs/optimized/3syn8d61makvd8ra76uhpcrmo.ll
24 24 bench/zed-rs/optimized/47dhsg4crd0e549rnj4wgynqw.ll
60 60 bench/zed-rs/optimized/4gafs7cnqueum1wf7b8eca1yl.ll
43 44 bench/zed-rs/optimized/4wlt97p2na7yq96c9gq3wlrfc.ll
64 64 bench/zed-rs/optimized/56i9d5rrx6hrud8ee30t4acpd.ll
48 48 bench/zed-rs/optimized/5mqaql67fk8cb5w1h1xcbyeu9.ll
52 52 bench/zed-rs/optimized/8v1arbgzeu88ynf653tketgap.ll
13 13 bench/zed-rs/optimized/ailsz2jv8iqda6dwl0yyf0y7p.ll
54 54 bench/zed-rs/optimized/b8xkvrb4shexown6t10tlhuh9.ll

[github-actions]

Summary of Changes

This patch modifies LLVM IR across multiple files, primarily focusing on replacing icmp and select instructions with bitwise operations (and, add) in several functions. Below is a high-level overview of the changes:

1. Replacement of icmp and select Instructions:

   • In many instances, the patch replaces icmp samesign ult (unsigned less-than comparison) followed by a select instruction with an and operation and an add instruction.
   • Example:

     %32 = icmp samesign ult i64 %.0.sroa.speculated.i, 4
     %..i.i.i = select i1 %32, i64 4, i64 8

     becomes:

     %32 = and i64 %.0.sroa.speculated.i, 4
     %..i.i.i = add nuw nsw i64 %32, 4

   • This transformation simplifies the logic for determining whether a value is less than a certain threshold (e.g., 4) and then selecting between two constants (e.g., 4 or 8). Instead of using a conditional branch, it leverages bitwise operations to achieve the same result.

2. Optimization in Hashbrown Functions:

   • The changes are concentrated in functions related to the hashbrown crate, particularly in RawTable and RawTableInner implementations.
   • These transformations occur in methods such as reserve_rehash, fallible_with_capacity, and with_capacity_inplace.
   • The optimization reduces the number of instructions and potentially improves performance by avoiding conditional branches in favor of arithmetic operations.

3. Modification of Phi Nodes:

   • Some phi nodes have been updated to reflect the new instruction names or values after the transformation.
   • Example:

     %.sroa.03.0.insert.insert.i = phi i16 [ 256, %13 ], [ %19, %15 ]

     becomes:

     %.sroa.03.0.insert.insert.i = phi i16 [ 256, %13 ], [ %16, %15 ]

4. Removal of Redundant Comparisons:

   • In some cases, redundant comparisons and selections are removed entirely, replacing them with simpler arithmetic operations.
   • Example in KnownBits.ll:

     %.not.inv = icmp samesign ult i16 %3, 256
     %.sroa.2.0.insert.shift = select i1 %.not.inv, i16 0, i16 256
     %4 = and i16 %3, 255
     %5 = or disjoint i16 %.sroa.2.0.insert.shift, %4
     %.sroa.02.0.insert.insert = xor i16 %5, 1

     becomes:

     %.sroa.02.0.insert.insert = xor i16 %3, 1

5. Minor Adjustments in Control Flow:

   • Some control flow adjustments are made to accommodate the new arithmetic-based logic.
   • For example, in vgaarb.ll, block labels are renamed or reordered slightly to reflect the changes in branching conditions.

High-Level Overview

The primary goal of this patch appears to be optimizing integer comparisons and selections by replacing them with equivalent bitwise and arithmetic operations. This approach can lead to more efficient machine code generation, as bitwise operations are often faster and more predictable than conditional branches. Additionally, the removal of redundant instructions simplifies the IR, potentially improving both compile-time performance and runtime efficiency.

The changes are consistent across multiple benchmarks and crates, indicating a systematic optimization applied to similar patterns in the codebase. This could be part of a broader effort to enhance the performance of hash table operations, which are critical in many Rust applications, including those using the hashbrown crate.

Overall, the patch focuses on reducing the complexity of the generated IR while maintaining or improving the correctness and performance of the underlying logic.

model: qwen-plus-latest
CompletionUsage(completion_tokens=906, prompt_tokens=106345, total_tokens=107251, completion_tokens_details=None, prompt_tokens_details=None)