diff --git a/bench/c3c/optimized/c_abi.ll b/bench/c3c/optimized/c_abi.ll index ae15badcebd..62cce4cf916 100644 --- a/bench/c3c/optimized/c_abi.ll +++ b/bench/c3c/optimized/c_abi.ll @@ -161,9 +161,7 @@ define dso_local noundef zeroext i1 @abi_arg_is_indirect(ptr noundef readonly ca unreachable switch.lookup: ; preds = %1 - %switch.cast = zext nneg i8 %4 to i9 - %switch.downshift = lshr i9 128, %switch.cast - %switch.masked = trunc i9 %switch.downshift to i1 + %switch.masked = icmp eq i8 %4, 7 ret i1 %switch.masked } diff --git a/bench/libigl/optimized/closest_facet.ll b/bench/libigl/optimized/closest_facet.ll index 28638875937..76311f6e151 100644 --- a/bench/libigl/optimized/closest_facet.ll +++ b/bench/libigl/optimized/closest_facet.ll @@ -51023,9 +51023,7 @@ _ZN4CGAL6HandleD2Ev.exit29: ; preds = %124, %128, %131, %1 br label %_ZN4CGAL6HandleD2Ev.exit33 _ZN4CGAL6HandleD2Ev.exit33: ; preds = %148, %152, %155, %158, %161, %_ZN4CGAL6HandleD2Ev.exit29 - %switch.cast = trunc nuw i32 %switch.tableidx to i3 - %switch.downshift = lshr exact i3 -4, %switch.cast - %switch.masked = trunc i3 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 2 call void @llvm.lifetime.end.p0(ptr nonnull %14) %165 = load ptr, ptr %13, align 8, !tbaa !1216 call void @free(ptr noundef %165) #23 @@ -56455,9 +56453,7 @@ _ZN4CGAL6HandleD2Ev.exit29: ; preds = %121, %125, %128, %1 br label %_ZN4CGAL6HandleD2Ev.exit33 _ZN4CGAL6HandleD2Ev.exit33: ; preds = %145, %149, %152, %155, %158, %_ZN4CGAL6HandleD2Ev.exit29 - %switch.cast = trunc nuw i32 %switch.tableidx to i3 - %switch.downshift = lshr exact i3 -4, %switch.cast - %switch.masked = trunc i3 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 2 call void @llvm.lifetime.end.p0(ptr nonnull %14) %162 = load ptr, ptr %13, align 8, !tbaa !1216 call void @free(ptr noundef %162) #23 @@ -57715,9 +57711,7 @@ _ZN4CGAL6HandleD2Ev.exit29: ; preds = %124, %128, %131, %1 br label %_ZN4CGAL6HandleD2Ev.exit33 _ZN4CGAL6HandleD2Ev.exit33: ; preds = %148, %152, %155, %158, %161, %_ZN4CGAL6HandleD2Ev.exit29 - %switch.cast = trunc nuw i32 %switch.tableidx to i3 - %switch.downshift = lshr exact i3 -4, %switch.cast - %switch.masked = trunc i3 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 2 call void @llvm.lifetime.end.p0(ptr nonnull %14) %165 = load ptr, ptr %13, align 8, !tbaa !1216 call void @free(ptr noundef %165) #23 @@ -59031,9 +59025,7 @@ _ZN4CGAL6HandleD2Ev.exit29: ; preds = %121, %125, %128, %1 br label %_ZN4CGAL6HandleD2Ev.exit33 _ZN4CGAL6HandleD2Ev.exit33: ; preds = %145, %149, %152, %155, %158, %_ZN4CGAL6HandleD2Ev.exit29 - %switch.cast = trunc nuw i32 %switch.tableidx to i3 - %switch.downshift = lshr exact i3 -4, %switch.cast - %switch.masked = trunc i3 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 2 call void @llvm.lifetime.end.p0(ptr nonnull %14) %162 = load ptr, ptr %13, align 8, !tbaa !1216 call void @free(ptr noundef %162) #23 diff --git a/bench/lightgbm/optimized/c_api.ll b/bench/lightgbm/optimized/c_api.ll index 373a1e38ab3..855845d0611 100644 --- a/bench/lightgbm/optimized/c_api.ll +++ b/bench/lightgbm/optimized/c_api.ll @@ -45465,15 +45465,9 @@ define linkonce_odr void @_ZNK8LightGBM7Booster15CreatePredictorEiiiiRKNS_6Confi 26: ; preds = %19, %11, %7 %27 = icmp ult i32 %4, 4 - %switch.cast = trunc nuw i32 %4 to i4 - %switch.downshift = lshr i4 2, %switch.cast - %switch.masked = trunc i4 %switch.downshift to i1 - %switch.cast17 = trunc nuw i32 %4 to i4 - %switch.downshift19 = lshr exact i4 -8, %switch.cast17 - %switch.masked20 = trunc i4 %switch.downshift19 to i1 - %switch.cast21 = trunc nuw i32 %4 to i4 - %switch.downshift23 = lshr i4 4, %switch.cast21 - %switch.masked24 = trunc i4 %switch.downshift23 to i1 + %switch.masked = icmp eq i32 %4, 1 + %switch.masked20 = icmp eq i32 %4, 3 + %switch.masked24 = icmp eq i32 %4, 2 %.015 = select i1 %27, i1 %switch.masked, i1 false %.014 = select i1 %27, i1 %switch.masked20, i1 false %.0 = select i1 %27, i1 %switch.masked24, i1 false diff --git a/bench/llvm/optimized/CGObjCMac.ll b/bench/llvm/optimized/CGObjCMac.ll index 4b2cefc652f..64da8735bd7 100644 --- a/bench/llvm/optimized/CGObjCMac.ll +++ b/bench/llvm/optimized/CGObjCMac.ll @@ -20594,9 +20594,8 @@ switch.lookup: ; preds = %_ZNK5clang8QualType %switch.tableidx = add nsw i32 %99, -1 %switch.idx.cast = trunc i32 %switch.tableidx to i1 %switch.offset = xor i1 %switch.idx.cast, true - %switch.cast = trunc i32 %switch.tableidx to i3 - %switch.downshift = lshr i3 3, %switch.cast - %switch.masked = trunc i3 %switch.downshift to i1 + %100 = and i32 %switch.tableidx, 6 + %switch.masked = icmp eq i32 %100, 0 br label %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit 100: ; preds = %_ZNK5clang8QualType15getObjCLifetimeEv.exit.i @@ -20611,7 +20610,7 @@ switch.lookup: ; preds = %_ZNK5clang8QualType %105 = load ptr, ptr %104, align 16, !tbaa !971 %106 = getelementptr inbounds nuw i8, ptr %105, i64 16 %107 = load i8, ptr %106, align 16 - switch i8 %107, label %108 [ + switch i8 %107, label %109 [ i8 33, label %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit i8 11, label %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit ] @@ -20640,7 +20639,7 @@ _ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit: ; preds = %116 br i1 %.not14.not.i, label %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit, label %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit.thread24 _ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit.thread24: ; preds = %113, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit - %.1.i27 = phi ptr [ %118, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit ], [ %101, %113 ] + %.1.i27 = phi ptr [ %118, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit ], [ %101, %114 ] %119 = getelementptr inbounds nuw i8, ptr %.1.i27, i64 32 %.sroa.0.0.copyload.i.i = load i64, ptr %119, align 16, !tbaa !394 br label %tailrecurse.i @@ -20649,8 +20648,8 @@ _ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit.loopexit: ; pr br label %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit _ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit: ; preds = %116, %100, %.thread40.i, %.thread40.i, %108, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit, %_ZNK5clang8QualType14isObjCGCStrongEv.exit.i, %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit.loopexit, %switch.lookup - %120 = phi i1 [ %switch.offset, %switch.lookup ], [ true, %_ZNK5clang8QualType14isObjCGCStrongEv.exit.i ], [ true, %116 ], [ true, %100 ], [ false, %.thread40.i ], [ true, %108 ], [ true, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit ], [ false, %.thread40.i ], [ false, %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit.loopexit ] - %121 = phi i1 [ %switch.masked, %switch.lookup ], [ false, %_ZNK5clang8QualType14isObjCGCStrongEv.exit.i ], [ true, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit ], [ true, %108 ], [ true, %.thread40.i ], [ true, %.thread40.i ], [ true, %100 ], [ true, %116 ], [ true, %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit.loopexit ] + %120 = phi i1 [ %switch.offset, %switch.lookup ], [ true, %_ZNK5clang8QualType14isObjCGCStrongEv.exit.i ], [ true, %117 ], [ true, %101 ], [ false, %.thread40.i ], [ true, %109 ], [ true, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit ], [ false, %.thread40.i ], [ false, %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit.loopexit ] + %121 = phi i1 [ %switch.masked, %switch.lookup ], [ false, %_ZNK5clang8QualType14isObjCGCStrongEv.exit.i ], [ true, %_ZNK5clang4Type5getAsINS_11PointerTypeEEEPKT_v.exit ], [ true, %109 ], [ true, %.thread40.i ], [ true, %.thread40.i ], [ true, %101 ], [ true, %117 ], [ true, %_ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit.loopexit ] %122 = getelementptr inbounds nuw i8, ptr %0, i64 24 %123 = load i8, ptr %122, align 8, !tbaa !1413, !range !1011, !noundef !1012 %124 = trunc nuw i8 %123 to i1 @@ -20675,7 +20674,7 @@ _ZL20GetGCAttrTypeForTypeRN5clang10ASTContextENS_8QualTypeEb.exit: ; preds = %11 br label %_ZN4llvm23SmallVectorTemplateBaseIN12_GLOBAL__N_18IvarInfoELb1EE9push_backES2_.exit67 _ZN4llvm23SmallVectorTemplateBaseIN12_GLOBAL__N_18IvarInfoELb1EE9push_backES2_.exit67: ; preds = %125, %131 - %.val2.i64 = phi i32 [ %128, %125 ], [ %.val2.pre.i63, %131 ] + %.val2.i64 = phi i32 [ %128, %126 ], [ %.val2.pre.i63, %132 ] %.val.i65 = load ptr, ptr %126, align 8, !tbaa !352 %135 = zext i32 %.val2.i64 to i64 %136 = getelementptr inbounds nuw %"struct.(anonymous namespace)::IvarInfo", ptr %.val.i65, i64 %135 diff --git a/bench/meshlab/optimized/alignset.ll b/bench/meshlab/optimized/alignset.ll index dc4a2cbc1d6..a46b1150f8f 100644 --- a/bench/meshlab/optimized/alignset.ll +++ b/bench/meshlab/optimized/alignset.ll @@ -3576,12 +3576,8 @@ switch.lookup: ; preds = %58 %switch.cast89 = trunc nuw i32 %61 to i8 %switch.downshift91 = lshr i8 -21, %switch.cast89 %switch.masked92 = trunc i8 %switch.downshift91 to i1 - %switch.cast93 = trunc nuw i32 %61 to i8 - %switch.downshift95 = lshr i8 64, %switch.cast93 - %switch.masked96 = trunc i8 %switch.downshift95 to i1 - %switch.cast97 = trunc nuw i32 %61 to i8 - %switch.downshift99 = lshr exact i8 -128, %switch.cast97 - %switch.masked100 = trunc i8 %switch.downshift99 to i1 + %switch.masked96 = icmp eq i32 %61, 6 + %switch.masked100 = icmp eq i32 %61, 7 br label %66 66: ; preds = %switch.lookup, %58 diff --git a/bench/nix/optimized/primops.ll b/bench/nix/optimized/primops.ll index 9a9d9a67ca3..8334284fa40 100644 --- a/bench/nix/optimized/primops.ll +++ b/bench/nix/optimized/primops.ll @@ -94657,9 +94657,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix15IsIntEqMatcherPIiE10gmock_Impl unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 1, %switch.cast - %switch.masked = trunc nuw i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 0 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load i64, ptr %7, align 8 %9 = getelementptr inbounds nuw i8, ptr %0, i64 8 @@ -105037,9 +105035,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix14IsFalseMatcher10gmock_ImplIRKN unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 2, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 1 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load i8, ptr %7, align 8 %9 = and i8 %8, 1 @@ -105277,9 +105273,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix14IsAttrsMatcher10gmock_ImplIRKN unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 32, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 5 ret i1 %switch.masked } @@ -105512,9 +105506,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix13IsTrueMatcher10gmock_ImplIRKNS unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 2, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 1 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load i8, ptr %7, align 8 %9 = trunc i8 %8 to i1 @@ -108243,9 +108235,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix15IsStringMatcher10gmock_ImplIRK unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 4, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 2 ret i1 %switch.masked } @@ -109215,9 +109205,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix17IsFloatEqMatcherPIdE10gmock_Im unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr exact i16 -32768, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 15 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load double, ptr %7, align 8 %9 = getelementptr inbounds nuw i8, ptr %0, i64 8 @@ -120008,9 +119996,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix13IsNullMatcher10gmock_ImplIRKNS unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 16, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 4 ret i1 %switch.masked } diff --git a/bench/nix/optimized/trivial.ll b/bench/nix/optimized/trivial.ll index d693c7d0320..e77ff237a8c 100644 --- a/bench/nix/optimized/trivial.ll +++ b/bench/nix/optimized/trivial.ll @@ -27914,9 +27914,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix13IsTrueMatcher10gmock_ImplIRKNS unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 2, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 1 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load i8, ptr %7, align 8 %9 = trunc i8 %8 to i1 @@ -28533,9 +28531,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix14IsFalseMatcher10gmock_ImplIRKN unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 2, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 1 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load i8, ptr %7, align 8 %9 = and i8 %8, 1 @@ -28773,9 +28769,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix13IsNullMatcher10gmock_ImplIRKNS unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 16, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 4 ret i1 %switch.masked } @@ -29008,9 +29002,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix15IsIntEqMatcherPIiE10gmock_Impl unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr i16 1, %switch.cast - %switch.masked = trunc nuw i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 0 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load i64, ptr %7, align 8 %9 = getelementptr inbounds nuw i8, ptr %0, i64 8 @@ -38835,9 +38827,7 @@ define linkonce_odr noundef zeroext i1 @_ZNK3nix17IsFloatEqMatcherPIdE10gmock_Im unreachable switch.lookup: ; preds = %3 - %switch.cast = trunc nuw i32 %switch.tableidx to i16 - %switch.downshift = lshr exact i16 -32768, %switch.cast - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i32 %switch.tableidx, 15 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load double, ptr %7, align 8 %9 = getelementptr inbounds nuw i8, ptr %0, i64 8 diff --git a/bench/ocio/optimized/GammaOpData.ll b/bench/ocio/optimized/GammaOpData.ll index 51da245a904..290722d7dbe 100644 --- a/bench/ocio/optimized/GammaOpData.ll +++ b/bench/ocio/optimized/GammaOpData.ll @@ -3106,43 +3106,35 @@ define hidden noundef zeroext i1 @_ZNK19OpenColorIO_v2_5dev11GammaOpData10mayCom 7: ; preds = %2 %8 = icmp ult i32 %6, 10 - br i1 %8, label %switch.lookup, label %15 + %switch.masked = icmp ult i32 %6, 6 + %spec.select = select i1 %8, i1 %switch.masked, i1 false + br label %switch.lookup 9: ; preds = %2 %10 = and i32 %4, -2 - switch i32 %10, label %15 [ + switch i32 %10, label %switch.lookup [ i32 2, label %11 i32 4, label %13 ] 11: ; preds = %9 %12 = icmp ult i32 %6, 10 - br i1 %12, label %switch.lookup18, label %15 + %switch.masked22 = icmp ult i32 %6, 4 + %spec.select28 = select i1 %12, i1 %switch.masked22, i1 false + br label %switch.lookup 13: ; preds = %9 %14 = icmp ult i32 %6, 10 br i1 %14, label %switch.lookup23, label %15 -switch.lookup: ; preds = %7 - %switch.cast = trunc nuw i32 %6 to i10 - %switch.downshift = lshr i10 63, %switch.cast - %switch.masked = trunc i10 %switch.downshift to i1 - br label %15 - -switch.lookup18: ; preds = %11 - %switch.cast19 = trunc nuw i32 %6 to i10 - %switch.downshift21 = lshr i10 15, %switch.cast19 - %switch.masked22 = trunc i10 %switch.downshift21 to i1 - br label %15 - switch.lookup23: ; preds = %13 %switch.cast24 = trunc nuw i32 %6 to i10 %switch.downshift26 = lshr i10 51, %switch.cast24 %switch.masked27 = trunc i10 %switch.downshift26 to i1 br label %15 -15: ; preds = %9, %7, %11, %13, %switch.lookup23, %switch.lookup18, %switch.lookup - %.0 = phi i1 [ %switch.masked, %switch.lookup ], [ %switch.masked22, %switch.lookup18 ], [ %switch.masked27, %switch.lookup23 ], [ false, %13 ], [ false, %11 ], [ false, %7 ], [ false, %9 ] +15: ; preds = %11, %7, %9, %13, %switch.lookup23 + %.0 = phi i1 [ %switch.masked27, %switch.lookup23 ], [ false, %13 ], [ false, %9 ], [ %spec.select, %7 ], [ %spec.select28, %11 ] ret i1 %.0 } diff --git a/bench/wasmedge/optimized/controlInstr.ll b/bench/wasmedge/optimized/controlInstr.ll index d5d2023ec30..049dcc51b46 100644 --- a/bench/wasmedge/optimized/controlInstr.ll +++ b/bench/wasmedge/optimized/controlInstr.ll @@ -1286,9 +1286,8 @@ switch.lookup: ; preds = %40 %46 = getelementptr inbounds nuw i8, ptr %45, i64 32 %47 = load i8, ptr %46, align 8 %switch.tableidx = add nsw i8 %47, -94 - %switch.cast = trunc i8 %switch.tableidx to i3 - %switch.downshift = lshr exact i3 -4, %switch.cast - %switch.masked = trunc i3 %switch.downshift to i1 + %48 = and i8 %switch.tableidx, 7 + %switch.masked = icmp eq i8 %48, 2 %switch.cast83 = zext i8 %switch.tableidx to i24 %switch.shiftamt84 = shl nuw nsw i24 %switch.cast83, 3 %switch.downshift85 = lshr i24 7367530, %switch.shiftamt84 @@ -1297,21 +1296,21 @@ switch.lookup: ; preds = %40 br i1 %48, label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit, label %49 49: ; preds = %switch.lookup - switch i8 %20, label %50 [ + switch i8 %20, label %51 [ i8 115, label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit i8 112, label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit ] -50: ; preds = %49 - br i1 %switch.masked, label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit, label %51 - 51: ; preds = %50 - switch i8 %20, label %52 [ + br i1 %switch.masked, label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit, label %52 + +52: ; preds = %51 + switch i8 %20, label %53 [ i8 114, label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit i8 111, label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit ] -52: ; preds = %51 +52: ; preds = %52 %.off = add i8 %20, -109 %switch = icmp ult i8 %.off, 2 br label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit @@ -1367,8 +1366,8 @@ _ZNK8WasmEdge7ValType13isAbsHeapTypeEv.exit47: ; preds = %_ZNK8WasmEdge7ValTy %69 = tail call noundef zeroext i1 @_ZN8WasmEdge3AST11TypeMatcher9matchTypeEN5cxx204spanIKPKNS0_7SubTypeELm18446744073709551615EEEjS8_j(ptr %0, i64 %1, i32 noundef %66, ptr %3, i64 %4, i32 noundef %68) #19 br label %_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit -_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit: ; preds = %63, %11, %64, %52, %15, %50, %switch.lookup, %49, %49, %51, %51, %39, %37, %35, %34, %33, %33, %31, %29, %29, %27, %24, %14, %_ZNK8WasmEdge3AST13CompositeType6expandEv.exit49, %55, %40, %_ZNK8WasmEdge7ValType13isAbsHeapTypeEv.exit47 - %.0 = phi i1 [ %69, %_ZNK8WasmEdge7ValType13isAbsHeapTypeEv.exit47 ], [ false, %40 ], [ false, %55 ], [ false, %14 ], [ %28, %27 ], [ %32, %31 ], [ false, %39 ], [ %36, %35 ], [ %38, %37 ], [ true, %24 ], [ false, %29 ], [ false, %29 ], [ false, %33 ], [ false, %33 ], [ true, %34 ], [ true, %switch.lookup ], [ false, %50 ], [ false, %49 ], [ false, %49 ], [ false, %51 ], [ false, %51 ], [ false, %15 ], [ %switch, %52 ], [ %switch78, %64 ], [ false, %_ZNK8WasmEdge3AST13CompositeType6expandEv.exit49 ], [ %or.cond, %11 ], [ %not., %63 ] +_ZN8WasmEdge3AST11TypeMatcher13matchTypeCodeENS_8TypeCodeES2_.exit: ; preds = %63, %11, %64, %52, %15, %51, %switch.lookup, %49, %49, %52, %52, %39, %37, %35, %34, %33, %33, %31, %29, %29, %27, %24, %14, %_ZNK8WasmEdge3AST13CompositeType6expandEv.exit49, %55, %40, %_ZNK8WasmEdge7ValType13isAbsHeapTypeEv.exit47 + %.0 = phi i1 [ %69, %_ZNK8WasmEdge7ValType13isAbsHeapTypeEv.exit47 ], [ false, %40 ], [ false, %56 ], [ false, %14 ], [ %28, %27 ], [ %32, %31 ], [ false, %39 ], [ %36, %35 ], [ %38, %37 ], [ true, %24 ], [ false, %29 ], [ false, %29 ], [ false, %33 ], [ false, %33 ], [ true, %34 ], [ true, %switch.lookup ], [ false, %51 ], [ false, %50 ], [ false, %50 ], [ false, %52 ], [ false, %52 ], [ false, %15 ], [ %switch, %53 ], [ %switch78, %65 ], [ false, %_ZNK8WasmEdge3AST13CompositeType6expandEv.exit49 ], [ %or.cond, %11 ], [ %not., %64 ] ret i1 %.0 } diff --git a/bench/wasmtime-rs/optimized/2ly4gzztxx8hlwxv.ll b/bench/wasmtime-rs/optimized/2ly4gzztxx8hlwxv.ll index d71a5a5991d..e5c8b1eab5b 100644 --- a/bench/wasmtime-rs/optimized/2ly4gzztxx8hlwxv.ll +++ b/bench/wasmtime-rs/optimized/2ly4gzztxx8hlwxv.ll @@ -3516,8 +3516,7 @@ define noundef zeroext i1 @_ZN17cranelift_codegen2ir8memflags8MemFlags6notrap17h unreachable switch.lookup: ; preds = %1 - %switch.downshift = lshr exact i16 -32768, %3 - %switch.masked = trunc i16 %switch.downshift to i1 + %switch.masked = icmp eq i16 %3, 15 ret i1 %switch.masked } diff --git a/bench/wireshark/optimized/packet-ehdlc.ll b/bench/wireshark/optimized/packet-ehdlc.ll index a9f05bb0b29..9ba9a974ebe 100644 --- a/bench/wireshark/optimized/packet-ehdlc.ll +++ b/bench/wireshark/optimized/packet-ehdlc.ll @@ -152,15 +152,13 @@ define internal i32 @dissect_ehdlc(ptr noundef %0, ptr noundef %1, ptr noundef % br label %switch.lookup switch.lookup: ; preds = %.lr.ph, %150 - %.0124 = phi i32 [ 4, %.lr.ph ], [ %.1, %150 ] + %.0124 = phi i32 [ 4, %.lr.ph ], [ %.1, %149 ] %10 = tail call zeroext i16 @tvb_get_uint16(ptr noundef %0, i32 noundef %.0124, i32 noundef 0) %11 = and i16 %10, 511 %12 = lshr i16 %10, 13 - %13 = trunc nuw nsw i16 %12 to i8 - %switch.downshift = lshr i8 16, %13 - %switch.masked = trunc i8 %switch.downshift to i1 - %14 = shl nuw nsw i16 %12, 3 - %switch.shiftamt133 = zext nneg i16 %14 to i64 + %switch.masked = icmp eq i16 %12, 4 + %13 = shl nuw nsw i16 %12, 3 + %switch.shiftamt133 = zext nneg i16 %13 to i64 %switch.downshift134 = lshr i64 17519670001795072, %switch.shiftamt133 %switch.masked135 = trunc i64 %switch.downshift134 to i8 %switch.selectcmp.case1.i = icmp eq i16 %12, 1 @@ -191,7 +189,7 @@ switch.lookup: ; preds = %.lr.ph, %150 br label %30 30: ; preds = %23, %28 - %31 = phi i32 [ %29, %28 ], [ %25, %23 ] + %31 = phi i32 [ %29, %27 ], [ %25, %22 ] %32 = tail call ptr (ptr, i32, ptr, i32, i32, ptr, ...) @proto_tree_add_protocol_format(ptr noundef nonnull %2, i32 noundef %24, ptr noundef %0, i32 noundef %.0124, i32 noundef %31, ptr noundef nonnull @.str.56) %33 = load i32, ptr @ett_ehdlc, align 4 %34 = tail call ptr @proto_item_add_subtree(ptr noundef %32, i32 noundef %33) @@ -347,7 +345,7 @@ proto_item_set_generated.exit123: ; preds = %proto_item_set_gene br i1 %127, label %.lr.ph.i, label %dissect_ehdlc_xid.exit .lr.ph.i: ; preds = %109, %144 - %.038.i = phi i32 [ %145, %144 ], [ %125, %109 ] + %.038.i = phi i32 [ %145, %143 ], [ %125, %108 ] %128 = add i32 %.038.i, 1 %129 = tail call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef %.038.i) %130 = add i32 %.038.i, 2 @@ -381,14 +379,14 @@ proto_item_set_generated.exit123: ; preds = %proto_item_set_gene br label %144 144: ; preds = %140, %136, %132, %.lr.ph._crit_edge.i - %.pre-phi.i = phi i32 [ %.pre.i, %.lr.ph._crit_edge.i ], [ %142, %140 ], [ %138, %136 ], [ %134, %132 ] + %.pre-phi.i = phi i32 [ %.pre.i, %.lr.ph._crit_edge.i ], [ %142, %139 ], [ %138, %135 ], [ %134, %131 ] %145 = add i32 %.pre-phi.i, %130 %146 = tail call i32 @tvb_reported_length_remaining(ptr noundef %0, i32 noundef %145) %147 = icmp sgt i32 %146, 1 br i1 %147, label %.lr.ph.i, label %dissect_ehdlc_xid.exit, !llvm.loop !8 dissect_ehdlc_xid.exit.sink.split: ; preds = %98, %105, %103 - %.sink.in = phi ptr [ @sub_handles.0, %103 ], [ @sub_handles.1, %105 ], [ @sub_handles.4, %98 ] + %.sink.in = phi ptr [ @sub_handles.0, %102 ], [ @sub_handles.1, %104 ], [ @sub_handles.4, %97 ] %.sink = load ptr, ptr %.sink.in, align 8 %148 = tail call i32 @call_dissector(ptr noundef %.sink, ptr noundef %102, ptr noundef %1, ptr noundef %2) br label %dissect_ehdlc_xid.exit @@ -399,7 +397,7 @@ dissect_ehdlc_xid.exit: ; preds = %144, %dissect_ehdlc br label %150 150: ; preds = %dissect_ehdlc_xid.exit, %81, %74 - %.pn = phi i32 [ %75, %74 ], [ %82, %81 ], [ %149, %dissect_ehdlc_xid.exit ] + %.pn = phi i32 [ %75, %73 ], [ %82, %80 ], [ %149, %dissect_ehdlc_xid.exit ] %.1 = add i32 %.pn, %.0124 %151 = tail call i32 @tvb_reported_length_remaining(ptr noundef %0, i32 noundef %.1) %152 = icmp sgt i32 %151, 0 diff --git a/bench/wireshark/optimized/packet-ieee1722.ll b/bench/wireshark/optimized/packet-ieee1722.ll index 4d5fe54e235..997c4bd4ee6 100644 --- a/bench/wireshark/optimized/packet-ieee1722.ll +++ b/bench/wireshark/optimized/packet-ieee1722.ll @@ -903,86 +903,81 @@ switch.lookup: ; preds = %.sink.split, %56, % %62 = load i32, ptr @hf_1722_61883_cip_fn, align 4 %63 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %62, ptr noundef %0, i32 noundef 26, i32 noundef 1, i32 noundef 0) %64 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 26) - %65 = lshr i8 %64, 6 - %switch.cast = trunc nuw nsw i8 %65 to i4 - %switch.downshift = lshr exact i4 -8, %switch.cast - %switch.masked = trunc i4 %switch.downshift to i1 - %switch.cast265 = trunc nuw nsw i8 %65 to i4 - %switch.downshift267 = lshr i4 1, %switch.cast265 - %switch.masked268 = trunc nuw i4 %switch.downshift267 to i1 - %66 = load i32, ptr @hf_1722_61883_cip_qpc, align 4 - %67 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %66, ptr noundef %0, i32 noundef 26, i32 noundef 1, i32 noundef 0) - %68 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 26) - %69 = and i8 %68, 56 - %.not231 = icmp eq i8 %69, 0 - br i1 %.not231, label %72, label %70 - -70: ; preds = %switch.lookup - %71 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %67, ptr noundef nonnull @ei_1722_61883_incorrect_qpc) - br label %72 - -72: ; preds = %70, %switch.lookup - %73 = load i32, ptr @hf_1722_61883_cip_sph, align 4 - %74 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %73, ptr noundef %0, i32 noundef 26, i32 noundef 1, i32 noundef 0) - %75 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 26) - %76 = and i8 %75, 4 - %77 = load i32, ptr @hf_1722_61883_cip_dbc, align 4 - %78 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %77, ptr noundef %0, i32 noundef 27, i32 noundef 1, i32 noundef 0) - %79 = load i32, ptr @hf_1722_61883_cip_qi2, align 4 - %80 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %79, ptr noundef %0, i32 noundef 28, i32 noundef 1, i32 noundef 0) - %81 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 28) - %.not232 = icmp slt i8 %81, -64 - br i1 %.not232, label %84, label %82 - -82: ; preds = %72 - %83 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %80, ptr noundef nonnull @ei_1722_61883_incorrect_qi2) - br label %84 - -84: ; preds = %82, %72 - %85 = load i32, ptr @hf_1722_61883_cip_fmt, align 4 - %86 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %85, ptr noundef %0, i32 noundef 28, i32 noundef 1, i32 noundef 0) - %87 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 28) - %88 = and i8 %87, 63 - %89 = icmp samesign ult i8 %88, 32 - br i1 %89, label %90, label %95 - -90: ; preds = %84 - %91 = load i32, ptr @hf_1722_61883_cip_fdf, align 4 - %92 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %91, ptr noundef %0, i32 noundef 29, i32 noundef 1, i32 noundef 0) - %93 = load i32, ptr @hf_1722_61883_cip_syt, align 4 - %94 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %93, ptr noundef %0, i32 noundef 30, i32 noundef 2, i32 noundef 0) - br label %105 - -95: ; preds = %84 - %96 = load i32, ptr @hf_1722_61883_cip_fdf_no_syt, align 4 - %97 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %96, ptr noundef %0, i32 noundef 29, i32 noundef 3, i32 noundef 0) - %98 = call i32 @tvb_get_ntoh24(ptr noundef %0, i32 noundef 29) - %99 = and i32 %98, 8388607 - %.not233 = icmp eq i32 %99, 0 - br i1 %.not233, label %102, label %100 - -100: ; preds = %95 - %101 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %97, ptr noundef nonnull @ei_1722_61883_incorrect_cip_fdf) + %switch.masked = icmp ugt i8 %64, -65 + %switch.masked268 = icmp ult i8 %64, 64 + %65 = load i32, ptr @hf_1722_61883_cip_qpc, align 4 + %66 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %65, ptr noundef %0, i32 noundef 26, i32 noundef 1, i32 noundef 0) + %67 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 26) + %68 = and i8 %67, 56 + %.not231 = icmp eq i8 %68, 0 + br i1 %.not231, label %71, label %69 + +69:; preds = %switch.lookup + %70 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %66, ptr noundef nonnull @ei_1722_61883_incorrect_qpc) + br label %71 + +71: ; preds = %69, %switch.lookup + %72 = load i32, ptr @hf_1722_61883_cip_sph, align 4 + %71 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %72, ptr noundef %0, i32 noundef 26, i32 noundef 1, i32 noundef 0) + %74 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 26) + %75 = and i8 %74, 4 + %76 = load i32, ptr @hf_1722_61883_cip_dbc, align 4 + %77 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %76, ptr noundef %0, i32 noundef 27, i32 noundef 1, i32 noundef 0) + %78 = load i32, ptr @hf_1722_61883_cip_qi2, align 4 + %75 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %78, ptr noundef %0, i32 noundef 28, i32 noundef 1, i32 noundef 0) + %80 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 28) + %.not232 = icmp slt i8 %80, -64 + br i1 %.not232, label %83, label %81 + +81:; preds = %71 + %81 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %79, ptr noundef nonnull @ei_1722_61883_incorrect_qi2) + br label %83 + +83: ; preds = %81, %71 + %84 = load i32, ptr @hf_1722_61883_cip_fmt, align 4 + %83 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %84, ptr noundef %0, i32 noundef 28, i32 noundef 1, i32 noundef 0) + %86 = call zeroext i8 @tvb_get_uint8(ptr noundef %0, i32 noundef 28) + %87 = and i8 %86, 63 + %88 = icmp samesign ult i8 %87, 32 + br i1 %88, label %89, label %94 + +89:; preds = %83 + %90 = load i32, ptr @hf_1722_61883_cip_fdf, align 4 + %91 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %90, ptr noundef %0, i32 noundef 29, i32 noundef 1, i32 noundef 0) + %92 = load i32, ptr @hf_1722_61883_cip_syt, align 4 + %93 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %92, ptr noundef %0, i32 noundef 30, i32 noundef 2, i32 noundef 0) + br label %104 + +94:; preds = %83 + %93 = load i32, ptr @hf_1722_61883_cip_fdf_no_syt, align 4 + %94 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %93, ptr noundef %0, i32 noundef 29, i32 noundef 3, i32 noundef 0) + %97 = call i32 @tvb_get_ntoh24(ptr noundef %0, i32 noundef 29) + %98 = and i32 %97, 8388607 + %.not233 = icmp eq i32 %98, 0 + br i1 %.not233, label %101, label %99 + +99:; preds = %94 + %100 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %96, ptr noundef nonnull @ei_1722_61883_incorrect_cip_fdf) + br label %101 + +101: ; preds = %99, %94 + %102 = load i32, ptr @hf_1722_61883_cip_fdf_tsf, align 4 + %101 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %102, ptr noundef %0, i32 noundef 29, i32 noundef 3, i32 noundef 0) br label %102 -102: ; preds = %100, %95 - %103 = load i32, ptr @hf_1722_61883_cip_fdf_tsf, align 4 - %104 = call ptr @proto_tree_add_item(ptr noundef %9, i32 noundef %103, ptr noundef %0, i32 noundef 29, i32 noundef 3, i32 noundef 0) - br label %105 - -105: ; preds = %102, %90 - %106 = load i32, ptr %5, align 4 - %107 = add i32 %106, -8 - store i32 %107, ptr %5, align 4 - %108 = icmp eq i8 %.fr253, 0 - %109 = zext i8 %.fr253 to i32 - %.0222 = select i1 %108, i32 256, i32 %109 - switch i8 %88, label %179 [ - i8 16, label %110 - i8 32, label %148 +102: ; preds = %101, %89 + %103 = load i32, ptr %5, align 4 + %106 = add i32 %103, -8 + store i32 %106, ptr %5, align 4 + %107 = icmp eq i8 %.fr253, 0 + %108 = zext i8 %.fr253 to i32 + %.0222 = select i1 %107, i32 256, i32 %108 + switch i8 %87, label %178 [ + i8 16, label %109 + i8 32, label %147 ] -110: ; preds = %105 +110: ; preds = %104 br i1 %switch.masked268, label %113, label %111 111: ; preds = %110 @@ -990,11 +985,11 @@ switch.lookup: ; preds = %.sink.split, %56, % br label %113 113: ; preds = %111, %110 - %.not239 = icmp eq i8 %76, 0 + %.not239 = icmp eq i8 %75, 0 br i1 %.not239, label %116, label %114 114: ; preds = %113 - %115 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %74, ptr noundef nonnull @ei_1722_61883_6_incorrect_cip_sph) + %115 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %73, ptr noundef nonnull @ei_1722_61883_6_incorrect_cip_sph) br label %116 116: ; preds = %114, %113 @@ -1016,7 +1011,7 @@ switch.lookup: ; preds = %.sink.split, %56, % br label %128 128: ; preds = %125, %116 - %129 = phi i32 [ %.pre259, %125 ], [ %122, %116 ] + %129 = phi i32 [ %.pre259, %124 ], [ %122, %115 ] %130 = udiv i32 %129, %123 %.not241 = icmp ne ptr %121, null %131 = icmp ule i32 %123, %129 @@ -1036,8 +1031,8 @@ switch.lookup: ; preds = %.sink.split, %56, % br label %135 135: ; preds = %.lr.ph248.us, %135 - %.0221247.us = phi i32 [ 0, %.lr.ph248.us ], [ %142, %135 ] - %.2246.us = phi i32 [ %.1225249.us, %.lr.ph248.us ], [ %141, %135 ] + %.0221247.us = phi i32 [ 0, %.lr.ph248.us ], [ %142, %134 ] + %.2246.us = phi i32 [ %.1225249.us, %.lr.ph248.us ], [ %141, %134 ] %136 = load i32, ptr @hf_1722_61883_label, align 4 %137 = call ptr @proto_tree_add_item(ptr noundef %134, i32 noundef %136, ptr noundef %0, i32 noundef %.2246.us, i32 noundef 1, i32 noundef 0) %138 = add i32 %.2246.us, 1 @@ -1060,7 +1055,7 @@ switch.lookup: ; preds = %.sink.split, %56, % %147 = icmp ult i32 %145, %130 br i1 %147, label %.loopexit, label %.loopexit242, !llvm.loop !8 -148: ; preds = %105 +148: ; preds = %104 %.not234 = icmp eq i32 %.0222, 6 br i1 %.not234, label %151, label %149 @@ -1076,11 +1071,11 @@ switch.lookup: ; preds = %.sink.split, %56, % br label %154 154: ; preds = %152, %151 - %.not236.not = icmp eq i8 %76, 0 + %.not236.not = icmp eq i8 %75, 0 br i1 %.not236.not, label %155, label %157 155: ; preds = %154 - %156 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %74, ptr noundef nonnull @ei_1722_61883_4_incorrect_cip_sph) + %156 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %73, ptr noundef nonnull @ei_1722_61883_4_incorrect_cip_sph) br label %157 157: ; preds = %155, %154 @@ -1101,14 +1096,14 @@ switch.lookup: ; preds = %.sink.split, %56, % br label %168 168: ; preds = %165, %157 - %169 = phi i32 [ %.pre, %165 ], [ %163, %157 ] + %169 = phi i32 [ %.pre, %164 ], [ %163, %156 ] %170 = udiv i32 %169, 192 %.not252 = icmp ult i32 %169, 192 br i1 %.not252, label %.loopexit242, label %.lr.ph .lr.ph: ; preds = %168, %.lr.ph - %.1245 = phi i32 [ %178, %.lr.ph ], [ 0, %168 ] - %.3244 = phi i32 [ %177, %.lr.ph ], [ 32, %168 ] + %.1245 = phi i32 [ %178, %.lr.ph ], [ 0, %167 ] + %.3244 = phi i32 [ %177, %.lr.ph ], [ 32, %167 ] %171 = load i32, ptr @hf_1722_61883_source_packet_header_timestamp, align 4 %172 = call ptr @proto_tree_add_item(ptr noundef %162, i32 noundef %171, ptr noundef %0, i32 noundef %.3244, i32 noundef 4, i32 noundef 0) %173 = or disjoint i32 %.3244, 4 @@ -1120,8 +1115,8 @@ switch.lookup: ; preds = %.sink.split, %56, % %exitcond.not = icmp eq i32 %178, %170 br i1 %exitcond.not, label %.loopexit242, label %.lr.ph, !llvm.loop !9 -179: ; preds = %105 - %180 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %86, ptr noundef nonnull @ei_1722_61883_unknown_format) +179: ; preds = %104 + %180 = call ptr @expert_add_info(ptr noundef %1, ptr noundef %85, ptr noundef nonnull @ei_1722_61883_unknown_format) br label %.loopexit242 .loopexit242: ; preds = %.lr.ph, %..loopexit_crit_edge.us, %.loopexit, %168, %40, %179, %128, %43 diff --git a/scripts/setup_pre_commit_patch.sh b/scripts/setup_pre_commit_patch.sh index c5409e09ef4..7b67f0768a3 100755 --- a/scripts/setup_pre_commit_patch.sh +++ b/scripts/setup_pre_commit_patch.sh @@ -2,7 +2,7 @@ set -euo pipefail shopt -s inherit_errexit -export GITHUB_PATCH_ID="/llvm-project/commit/" +export GITHUB_PATCH_ID=llvm/llvm-project/pull/157030 export COMPTIME_MODE=0 # Please rebase manually