diff --git a/bench/abc/optimized/giaJf.ll b/bench/abc/optimized/giaJf.ll index 0ffef4c4cab..d487e97374b 100644 --- a/bench/abc/optimized/giaJf.ll +++ b/bench/abc/optimized/giaJf.ll @@ -65,10 +65,9 @@ target triple = "x86_64-pc-linux-gnu" define void @Jf_ManGenCnf(i64 noundef %0, i32 noundef %1, ptr noundef readonly captures(none) %2, ptr noundef captures(none) %3, ptr noundef captures(none) %4, ptr noundef %5) local_unnamed_addr #0 { %7 = alloca i64, align 8 store i64 %0, ptr %7, align 8, !tbaa !3 - switch i64 %0, label %.preheader [ - i64 0, label %14 - i64 -1, label %14 - ] + %.off = add i64 %0, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %.preheader, label %14 .preheader: ; preds = %6 %8 = getelementptr i8, ptr %2, i64 4 @@ -81,7 +80,7 @@ define void @Jf_ManGenCnf(i64 noundef %0, i32 noundef %1, ptr noundef readonly c %13 = getelementptr i8, ptr %2, i64 8 br label %80 -14: ; preds = %6, %6 +14: ; preds = %6 %15 = getelementptr i8, ptr %3, i64 4 %.val = load i32, ptr %15, align 4, !tbaa !7 %16 = getelementptr inbounds nuw i8, ptr %4, i64 4 diff --git a/bench/actix-rs/optimized/22x16e3cd4musvfe.ll b/bench/actix-rs/optimized/22x16e3cd4musvfe.ll index 78367b228ff..dde2abc2a0a 100644 --- a/bench/actix-rs/optimized/22x16e3cd4musvfe.ll +++ b/bench/actix-rs/optimized/22x16e3cd4musvfe.ll @@ -2037,7 +2037,10 @@ define hidden noundef range(i32 0, 4) i32 @_ZN19brotli_decompressor6decode22Brot 60: ; preds = %50 %61 = zext i32 %52 to i64 %62 = sub nsw i64 8, %61 - %.0.sroa.speculated.i = tail call noundef range(i64 0, 4294967296) i64 @llvm.umin.i64(i64 range(i64 -4294967287, 8) %62, i64 range(i64 0, 4294967296) %34) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 range(i64 -4294967287, 8) %62, i64 range(i64 0, 4294967296) %34) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %34, i64 %62 %.not = icmp eq i64 %.0.sroa.speculated.i, 0 br i1 %.not, label %120, label %122 @@ -2110,10 +2113,10 @@ define hidden noundef range(i32 0, 4) i32 @_ZN19brotli_decompressor6decode22Brot br label %63 122: ; preds = %60 - %123 = add nuw nsw i64 %.0.sroa.speculated.i, %61 + %123 = add nsw i64 %.0.sroa.speculated.i, %61 %124 = call fastcc { ptr, i64 } @"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17hb4d3929009b4e866E"(i64 noundef %61, i64 noundef %123, ptr noalias noundef nonnull align 1 %27, i64 noundef 8, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.ef1a8dfc954e6e945538d4598650d6d8.41) %125 = extractvalue { ptr, i64 } %124, 1 - %126 = add nuw nsw i64 %.0.sroa.speculated.i, %37 + %126 = add nsw i64 %.0.sroa.speculated.i, %37 %127 = call fastcc { ptr, i64 } @"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hd69ca6984ea4b8f5E"(i64 noundef %37, i64 noundef %126, ptr noalias noundef nonnull readonly align 1 %2, i64 noundef %3, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.ef1a8dfc954e6e945538d4598650d6d8.42) %128 = extractvalue { ptr, i64 } %127, 1 call void @llvm.experimental.noalias.scope.decl(metadata !168) @@ -2131,7 +2134,7 @@ define hidden noundef range(i32 0, 4) i32 @_ZN19brotli_decompressor6decode22Brot call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %131, ptr nonnull readonly align 1 %130, i64 %125, i1 false), !alias.scope !173, !noalias !174 %132 = load i32, ptr %51, align 4, !noundef !12 %133 = zext i32 %132 to i64 - %134 = add nuw nsw i64 %.0.sroa.speculated.i, %133 + %134 = add nsw i64 %.0.sroa.speculated.i, %133 %135 = call fastcc { ptr, i64 } @"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17hb4d3929009b4e866E"(i64 noundef %133, i64 noundef %134, ptr noalias noundef nonnull align 1 %28, i64 noundef 8, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.ef1a8dfc954e6e945538d4598650d6d8.44) %136 = extractvalue { ptr, i64 } %135, 1 %137 = call fastcc { ptr, i64 } @"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hd69ca6984ea4b8f5E"(i64 noundef %37, i64 noundef %126, ptr noalias noundef nonnull readonly align 1 %2, i64 noundef %3, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.ef1a8dfc954e6e945538d4598650d6d8.45) @@ -9419,6 +9422,9 @@ declare i64 @llvm.umin.i64(i64, i64) #23 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #24 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #23 + ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.smin.i32(i32, i32) #23 diff --git a/bench/actix-rs/optimized/42v5lxq3f9icepvb.ll b/bench/actix-rs/optimized/42v5lxq3f9icepvb.ll index 786000d048f..4932e20fe8d 100644 --- a/bench/actix-rs/optimized/42v5lxq3f9icepvb.ll +++ b/bench/actix-rs/optimized/42v5lxq3f9icepvb.ll @@ -3976,10 +3976,8 @@ define internal fastcc void @"_ZN4core3ptr83drop_in_place$LT$actix_web..http..he "_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i", %15 %19 = getelementptr inbounds nuw i8, ptr %0, i64 32 %.val5.i = load i64, ptr %19, align 8, !range !205, !alias.scope !1627, !noundef !5 - switch i64 %.val5.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" - i64 0, label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" - ] + %switch.i = icmp sgt i64 %.val5.i, 0 + br i1 %switch.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i", label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i": ; preds = %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i" %20 = getelementptr inbounds nuw i8, ptr %0, i64 40 @@ -3987,7 +3985,7 @@ define internal fastcc void @"_ZN4core3ptr83drop_in_place$LT$actix_web..http..he tail call void @__rust_dealloc(ptr noundef nonnull %.val6.i, i64 noundef %.val5.i, i64 noundef 1) #20, !noalias !1640 br label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" -"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i", %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i", %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i" +"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i", %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i" %21 = load i64, ptr %3, align 8, !alias.scope !1649, !noalias !1658, !noundef !5 %22 = icmp eq i64 %21, 0 br i1 %22, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit3", label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit3.sink.split" @@ -4008,8 +4006,8 @@ define internal fastcc void @"_ZN4core3ptr83drop_in_place$LT$actix_web..http..he br label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit7" "_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit3.sink.split": ; preds = %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i", %12, %9, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19", %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit7" - %.sink = phi i64 [ 40, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit7" ], [ 40, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19" ], [ 16, %9 ], [ 16, %12 ], [ 16, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" ] - %.sink30 = phi i64 [ %31, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit7" ], [ %39, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19" ], [ %10, %9 ], [ %13, %12 ], [ %21, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" ] + %.sink = phi i64 [ 40, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit7" ], [ 40, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i20" ], [ 16, %9 ], [ 16, %12 ], [ 16, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" ] + %.sink30 = phi i64 [ %31, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit7" ], [ %39, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i20" ], [ %10, %9 ], [ %13, %12 ], [ %21, %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i" ] %28 = getelementptr inbounds nuw i8, ptr %0, i64 %.sink %29 = load ptr, ptr %28, align 8, !noalias !5, !nonnull !5, !noundef !5 tail call void @__rust_dealloc(ptr noundef nonnull %29, i64 noundef %.sink30, i64 noundef 1) #20, !noalias !5 @@ -4043,10 +4041,8 @@ define internal fastcc void @"_ZN4core3ptr83drop_in_place$LT$actix_web..http..he "_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i17": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i15", %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit" %37 = getelementptr inbounds nuw i8, ptr %0, i64 56 %.val5.i18 = load i64, ptr %37, align 8, !range !205, !alias.scope !1691, !noundef !5 - switch i64 %.val5.i18, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i21" [ - i64 -9223372036854775808, label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19" - i64 0, label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19" - ] + %switch.i19 = icmp sgt i64 %.val5.i18, 0 + br i1 %switch.i19, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i22", label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i21": ; preds = %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i17" %38 = getelementptr inbounds nuw i8, ptr %0, i64 64 @@ -4054,7 +4050,7 @@ define internal fastcc void @"_ZN4core3ptr83drop_in_place$LT$actix_web..http..he tail call void @__rust_dealloc(ptr noundef nonnull %.val6.i22, i64 noundef %.val5.i18, i64 noundef 1) #20, !noalias !1703 br label %"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19" -"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i21", %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i17", %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i17" +"_ZN4core3ptr75drop_in_place$LT$core..option..Option$LT$language_tags..LanguageTag$GT$$GT$17h26206ae64b851543E.exit8.i19": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1711877461099840233.exit.i.i1.i.i.i.i7.i21", %"_ZN4core3ptr65drop_in_place$LT$actix_http..header..shared..charset..Charset$GT$17h4981384417a3277fE.exit.i17" %39 = load i64, ptr %33, align 8, !alias.scope !1712, !noalias !1721, !noundef !5 %40 = icmp eq i64 %39, 0 br i1 %40, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit3", label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h8b0b401650d5ef36E.exit3.sink.split" diff --git a/bench/actix-rs/optimized/5b5b50c31lqwwnuq.ll b/bench/actix-rs/optimized/5b5b50c31lqwwnuq.ll index 79ca428ea78..579bcb26cc2 100644 --- a/bench/actix-rs/optimized/5b5b50c31lqwwnuq.ll +++ b/bench/actix-rs/optimized/5b5b50c31lqwwnuq.ll @@ -1194,7 +1194,10 @@ _ZN4core3ops8function6FnOnce9call_once17h1caa876bf058f9dcE.exit.i1.i.i.i: ; pred call void @llvm.lifetime.end.p0(ptr nonnull %.sroa.5) call void @llvm.lifetime.end.p0(ptr nonnull %.sroa.713) %77 = tail call i64 @llvm.uadd.sat.i64(i64 %64, i64 1) - %.0.sroa.speculated.i = tail call noundef range(i64 4, 0) i64 @llvm.umax.i64(i64 range(i64 1, 0) %77, i64 4) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 range(i64 1, 0) %77) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 4, i64 %77 %78 = invoke { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h1fa3be4e1bf8eb64E"(i64 noundef %.0.sroa.speculated.i, i1 noundef zeroext false) to label %79 unwind label %74 @@ -5549,7 +5552,7 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #11 declare void @llvm.experimental.noalias.scope.decl(metadata) #12 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #13 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #13 attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/arrow/optimized/os.ll b/bench/arrow/optimized/os.ll index 9cdaab64a06..98d498ed852 100644 --- a/bench/arrow/optimized/os.ll +++ b/bench/arrow/optimized/os.ll @@ -217,12 +217,11 @@ _mi_os_good_alloc_size.exit.thread: ; preds = %14, %_mi_os_good_al .thread131.i: ; preds = %30, %_mi_os_good_alloc_size.exit.thread %32 = tail call ptr @mmap(ptr noundef null, i64 noundef range(i64 1, 0) %.010.i9, i32 noundef range(i32 0, 4) 3, i32 noundef range(i32 34, 2013528099) %spec.select.i, i32 noundef -1, i64 noundef 0) #10 %magicptr = ptrtoint ptr %32 to i64 - switch i64 %magicptr, label %mi_unix_mmap.exit [ - i64 -1, label %mi_unix_mmap.exit.thread - i64 0, label %mi_unix_mmap.exit.thread - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %mi_unix_mmap.exit, label %mi_unix_mmap.exit.thread -mi_unix_mmap.exit.thread: ; preds = %.thread131.i, %.thread131.i +mi_unix_mmap.exit.thread: ; preds = %.thread131.i %33 = tail call ptr @__errno_location() #11 %34 = load i32, ptr %33, align 4, !tbaa !13 tail call void (ptr, ...) @_mi_warning_message(ptr noundef nonnull @.str.5, i64 noundef range(i64 1, 0) %.010.i9, i32 noundef %34, ptr noundef null, i32 noundef 0, i32 noundef 0) #10 @@ -508,12 +507,11 @@ mi_os_mem_free.exit.i: ; preds = %74, %73 store i8 0, ptr %47, align 1, !tbaa !3 %85 = tail call ptr @mmap(ptr noundef null, i64 noundef range(i64 1, 0) %78, i32 noundef range(i32 0, 4) %spec.select.i.i, i32 noundef range(i32 34, 2013528099) %spec.select.i85.i, i32 noundef -1, i64 noundef 0) #10 %magicptr.i = ptrtoint ptr %85 to i64 - switch i64 %magicptr.i, label %mi_unix_mmap.exit.i [ - i64 -1, label %mi_unix_mmap.exit.thread.i - i64 0, label %mi_unix_mmap.exit.thread.i - ] + %magicptr.off.i = add i64 %magicptr.i, -1 + %switch.i = icmp ult i64 %magicptr.off.i, -2 + br i1 %switch.i, label %mi_unix_mmap.exit.i, label %mi_unix_mmap.exit.thread.i -mi_unix_mmap.exit.thread.i: ; preds = %.thread131.i.i, %.thread131.i.i +mi_unix_mmap.exit.thread.i: ; preds = %.thread131.i.i %86 = tail call ptr @__errno_location() #11 %87 = load i32, ptr %86, align 4, !tbaa !13 tail call void (ptr, ...) @_mi_warning_message(ptr noundef nonnull @.str.5, i64 noundef range(i64 1, 0) %78, i32 noundef %87, ptr noundef null, i32 noundef 0, i32 noundef 0) #10 @@ -1138,22 +1136,20 @@ define hidden ptr @_mi_os_alloc_huge_os_pages(i64 noundef %0, i32 noundef %1, i6 %..i.i = select i1 %.b.i.i, i32 1409548322, i32 2013528098 %39 = call ptr @mmap(ptr noundef nonnull %37, i64 noundef range(i64 1, 0) 1073741824, i32 noundef range(i32 0, 4) 3, i32 noundef range(i32 34, 2013528099) %..i.i, i32 noundef -1, i64 noundef 0) #10 %magicptr.i = ptrtoint ptr %39 to i64 - switch i64 %magicptr.i, label %mi_unix_mmap.exit.thread15.i [ - i64 -1, label %mi_unix_mmapx.exit.thread.i.i - i64 0, label %mi_unix_mmapx.exit.thread.i.i - ] + %magicptr.off.i = add i64 %magicptr.i, -1 + %switch.i = icmp ult i64 %magicptr.off.i, -2 + br i1 %switch.i, label %mi_unix_mmap.exit.thread15.i, label %mi_unix_mmapx.exit.thread.i.i -mi_unix_mmapx.exit.thread.i.i: ; preds = %35, %35 +mi_unix_mmapx.exit.thread.i.i: ; preds = %35 store i1 true, ptr @mi_unix_mmap.mi_huge_pages_available, align 1 %40 = tail call ptr @__errno_location() #11 %41 = load i32, ptr %40, align 4, !tbaa !13 call void (ptr, ...) @_mi_warning_message(ptr noundef nonnull @.str.4, i32 noundef %41) #10 %42 = call ptr @mmap(ptr noundef nonnull %37, i64 noundef range(i64 1, 0) 1073741824, i32 noundef range(i32 0, 4) 3, i32 noundef 1409548322, i32 noundef -1, i64 noundef 0) #10 %magicptr18.i = ptrtoint ptr %42 to i64 - switch i64 %magicptr18.i, label %mi_unix_mmap.exit.thread15.i [ - i64 -1, label %.thread68 - i64 0, label %.thread68 - ] + %magicptr18.off.i = add i64 %magicptr18.i, -1 + %switch19.i = icmp ult i64 %magicptr18.off.i, -2 + br i1 %switch19.i, label %mi_unix_mmap.exit.thread15.i, label %.thread68 mi_unix_mmap.exit.thread15.i: ; preds = %mi_unix_mmapx.exit.thread.i.i, %35 %.3.i17.i = phi ptr [ %39, %35 ], [ %42, %mi_unix_mmapx.exit.thread.i.i ] @@ -1235,8 +1231,8 @@ _mi_os_free_ex.exit: ; preds = %51, %53 %exitcond.not = icmp eq i64 %67, %0 br i1 %exitcond.not, label %.thread68, label %35, !llvm.loop !21 -.thread68: ; preds = %66, %mi_unix_mmapx.exit.thread.i.i, %mi_unix_mmapx.exit.thread.i.i, %27, %.thread66, %50, %_mi_os_free_ex.exit - %.04373 = phi i64 [ %.04376, %.thread66 ], [ %.04376, %50 ], [ %.04376, %_mi_os_free_ex.exit ], [ 0, %27 ], [ %0, %66 ], [ %.04376, %mi_unix_mmapx.exit.thread.i.i ], [ %.04376, %mi_unix_mmapx.exit.thread.i.i ] +.thread68: ; preds = %66, %mi_unix_mmapx.exit.thread.i.i, %27, %.thread66, %50, %_mi_os_free_ex.exit + %.04373 = phi i64 [ %.04376, %.thread66 ], [ %.04376, %50 ], [ %.04376, %_mi_os_free_ex.exit ], [ 0, %27 ], [ %0, %66 ], [ %.04376, %mi_unix_mmapx.exit.thread.i.i ] br i1 %.not53, label %69, label %68 68: ; preds = %.thread68 diff --git a/bench/boost/optimized/async.ll b/bench/boost/optimized/async.ll index 004bfff0112..c6518e06e7a 100644 --- a/bench/boost/optimized/async.ll +++ b/bench/boost/optimized/async.ll @@ -162943,14 +162943,24 @@ _ZN5boost9gregorian8greg_dayC2Et.exit: ; preds = %32, %31, %34 _ZN5boost10posix_time13time_durationC2Ellll.exit: ; preds = %46, %50 %.0.i.i.i = phi i64 [ %.neg30.i.i.i, %46 ], [ %56, %50 ] %.sroa.01.0.copyload = load i32, ptr %5, align 4 - %switch.tableidx = add i32 %.sroa.01.0.copyload, 2 - %57 = icmp ult i32 %switch.tableidx, 3 + %switch.tableidx = add i32 %.sroa.01.0.copyload, -1 + %57 = icmp ult i32 %switch.tableidx, -3 + br i1 %switch.i.i.i.i, label %57, label %.thread.i.i.i.i.i + +.thread.i.i.i.i.i: ; preds = %_ZN5boost10posix_time13time_durationC2Ellll.exit + %switch.tableidx = add nsw i32 %.sroa.01.0.copyload, 2 + %switch.idx.cast = zext i32 %switch.tableidx to i64 + %switch.offset = add nuw i64 %switch.idx.cast, 9223372036854775806 + br label %_ZN5boost10posix_time5ptimeC2ENS_9gregorian4dateENS0_13time_durationE.exit + +57: ; preds = %_ZN5boost10posix_time13time_durationC2Ellll.exit %58 = zext i32 %.sroa.01.0.copyload to i64 %59 = mul nuw nsw i64 %58, 86400000000 %60 = add nsw i64 %59, %.0.i.i.i - %switch.idx.cast = zext i32 %switch.tableidx to i64 - %switch.offset = add nuw i64 %switch.idx.cast, 9223372036854775806 - %storemerge.i.i.i.i = select i1 %57, i64 %switch.offset, i64 %60 + br label %_ZN5boost10posix_time5ptimeC2ENS_9gregorian4dateENS0_13time_durationE.exit + +_ZN5boost10posix_time5ptimeC2ENS_9gregorian4dateENS0_13time_durationE.exit:; preds = %.thread.i.i.i.i.i, %57 + %storemerge.i.i.i.i = phi i64 [ %60, %57 ], [ %switch.offset, %.thread.i.i.i.i.i ] call void @llvm.lifetime.end.p0(ptr nonnull %5) call void @llvm.lifetime.end.p0(ptr nonnull %4) call void @llvm.lifetime.end.p0(ptr nonnull %3) diff --git a/bench/clamav/optimized/hashtab.ll b/bench/clamav/optimized/hashtab.ll index 6b9da3764c0..0588b95ce57 100644 --- a/bench/clamav/optimized/hashtab.ll +++ b/bench/clamav/optimized/hashtab.ll @@ -290,25 +290,24 @@ define noundef ptr @cli_htu32_next(ptr noundef readonly captures(address_is_null .lr.ph: ; preds = %15 %17 = load ptr, ptr %0, align 8, !tbaa !13 %18 = add i64 %5, -1 - br label %19 - -19: ; preds = %.lr.ph, %23 - %.12035 = phi i64 [ %.019, %.lr.ph ], [ %24, %23 ] - %20 = and i64 %.12035, %18 - %21 = getelementptr inbounds nuw %struct.cli_htu32_element, ptr %17, i64 %20 - %22 = load i32, ptr %21, align 8, !tbaa !24 - switch i32 %22, label %.loopexit [ - i32 0, label %23 - i32 -1, label %23 - ] - -23: ; preds = %19, %19 - %24 = add i64 %.12035, 1 - %exitcond.not = icmp eq i64 %24, %5 - br i1 %exitcond.not, label %.loopexit, label %19 + br label %21 -.loopexit: ; preds = %23, %19, %15, %7, %2, %3 - %.0 = phi ptr [ null, %3 ], [ null, %2 ], [ null, %7 ], [ null, %15 ], [ null, %23 ], [ %21, %19 ] +.loopexit: ; preds = %21 + %20 = add i64 %.12033, 1 + %exitcond.not = icmp eq i64 %20, %5 + br i1 %exitcond.not, label %.loopexit, label %21 + +21: ; preds = %.lr.ph, %19 + %.12033 = phi i64 [ %.019, %.lr.ph ], [ %20, %19 ] + %22 = and i64 %.12033, %18 + %23 = getelementptr inbounds nuw %struct.cli_htu32_element, ptr %17, i64 %22 + %24 = load i32, ptr %23, align 8, !tbaa !24 + %25 = add i32 %24, 1 + %switch = icmp ult i32 %25, 2 + br i1 %switch, label %19, label %.loopexit + +.loopexit: ; preds = %21, %19, %15, %7, %2, %3 + %.0 = phi ptr [ null, %3 ], [ null, %2 ], [ null, %7 ], [ null, %15 ], [ %23, %21 ], [ null, %19 ] ret ptr %.0 } @@ -822,10 +821,9 @@ nearest_power.exit: ; preds = %6, %8 %19 = load ptr, ptr %0, align 8, !tbaa !13 %20 = getelementptr inbounds nuw %struct.cli_htu32_element, ptr %19, i64 %.05064 %21 = load i32, ptr %20, align 8, !tbaa !24 - switch i32 %21, label %22 [ - i32 0, label %45 - i32 -1, label %45 - ] + %.off = add i32 %21, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %22, label %45 22: ; preds = %17 %23 = xor i32 %21, -1 @@ -873,9 +871,9 @@ nearest_power.exit: ; preds = %6, %8 %.pre = load i64, ptr %3, align 8, !tbaa !16 br label %45 -45: ; preds = %._crit_edge.thread, %17, %17 - %46 = phi i64 [ %.pre, %._crit_edge.thread ], [ %18, %17 ], [ %18, %17 ] - %.2 = phi i64 [ %44, %._crit_edge.thread ], [ %.04865, %17 ], [ %.04865, %17 ] +45: ; preds = %._crit_edge.thread, %17 + %46 = phi i64 [ %.pre, %._crit_edge.thread ], [ %18, %17 ] + %.2 = phi i64 [ %44, %._crit_edge.thread ], [ %.04865, %17 ] %47 = add nuw i64 %.05064, 1 %48 = icmp ult i64 %47, %46 br i1 %48, label %17, label %._crit_edge67 diff --git a/bench/clap-rs/optimized/1zp92zvstj9lufi9.ll b/bench/clap-rs/optimized/1zp92zvstj9lufi9.ll index f53b0c3b130..f245de96372 100644 --- a/bench/clap-rs/optimized/1zp92zvstj9lufi9.ll +++ b/bench/clap-rs/optimized/1zp92zvstj9lufi9.ll @@ -1918,7 +1918,10 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. %18 = load i64, ptr %5, align 8, !noundef !28 call void @llvm.lifetime.end.p0(ptr nonnull %5) %19 = tail call i64 @llvm.uadd.sat.i64(i64 %18, i64 1) - %.0.sroa.speculated.i = tail call noundef range(i64 4, 0) i64 @llvm.umax.i64(i64 range(i64 1, 0) %19, i64 4) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 range(i64 1, 0) %19) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 4, i64 %19 %20 = tail call { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h3ab97a64aea5dc85E"(i64 noundef %.0.sroa.speculated.i, i1 noundef zeroext false) %21 = extractvalue { i64, ptr } %20, 0 %22 = extractvalue { i64, ptr } %20, 1 @@ -2642,7 +2645,10 @@ common.resume: ; preds = %93, %.body, %21, %" %42 = load i64, ptr %7, align 8, !noundef !28 call void @llvm.lifetime.end.p0(ptr nonnull %7) %43 = tail call i64 @llvm.uadd.sat.i64(i64 %42, i64 1) - %.0.sroa.speculated.i = tail call noundef range(i64 4, 0) i64 @llvm.umax.i64(i64 range(i64 1, 0) %43, i64 4) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 range(i64 1, 0) %43) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 4, i64 %43 %44 = invoke { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5ba5ef0af6e01f84E"(i64 noundef %.0.sroa.speculated.i, i1 noundef zeroext false) to label %45 unwind label %39 @@ -2999,7 +3005,10 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. %20 = load i64, ptr %7, align 8, !noundef !28 call void @llvm.lifetime.end.p0(ptr nonnull %7) %21 = tail call i64 @llvm.uadd.sat.i64(i64 %20, i64 1) - %.0.sroa.speculated.i = tail call noundef range(i64 4, 0) i64 @llvm.umax.i64(i64 range(i64 1, 0) %21, i64 4) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 range(i64 1, 0) %21) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 4, i64 %21 %22 = invoke { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17hf539f13ab3db1912E"(i64 noundef %.0.sroa.speculated.i, i1 noundef zeroext false) to label %23 unwind label %17 @@ -3517,9 +3526,12 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. "_ZN4core6option15Option$LT$T$GT$6map_or17he27fc6aafcde29daE.exit63.i.i.i": ; preds = %55, %49, %46, %45, %"_ZN4core6option15Option$LT$T$GT$6map_or17he27fc6aafcde29daE.exit.i.i.i" %.sroa.767.0.i.i.i = phi i64 [ 0, %"_ZN4core6option15Option$LT$T$GT$6map_or17he27fc6aafcde29daE.exit.i.i.i" ], [ %61, %55 ], [ %54, %49 ], [ %spec.select.i.i.i.i61.i.i.i, %46 ], [ 0, %45 ] - %62 = add nuw nsw i64 %.sroa.767.0.i.i.i, %.sroa.7.0.i.i.i - %63 = tail call i64 @llvm.umax.i64(i64 %62, i64 3) - %.0.sroa.speculated.i = add nuw nsw i64 %63, 1 + %62 = add nuw nsw i64 %.sroa.7.0.i.i.i, 1 + %63 = add nuw nsw i64 %62, %.sroa.767.0.i.i.i + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 range(i64 1, 0) %63) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 4, i64 %63 %64 = invoke { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h2e4b2e061946c7c4E"(i64 noundef %.0.sroa.speculated.i, i1 noundef zeroext false) to label %68 unwind label %66 @@ -6118,8 +6130,11 @@ common.resume: ; preds = %138, %.body, %37 %.sroa.0.0.i.pn.i.i33 = phi ptr [ %.sroa.0.0.i.pn.i.i, %.noexc7 ], [ %.sroa.0.0.i.pn.i.i3438, %46 ], [ %.sroa.0.0.i.pn.i.i, %44 ], [ %.sroa.0.0.i.pn.i.i, %.noexc8 ] %.sroa.3.0.i.pn.i.i31 = phi i64 [ %.sroa.3.0.i.pn.i.i, %.noexc7 ], [ %.sroa.3.0.i.pn.i.i3239, %46 ], [ %.sroa.3.0.i.pn.i.i, %44 ], [ %.sroa.3.0.i.pn.i.i, %.noexc8 ] %.sink.i = phi i64 [ 0, %.noexc7 ], [ %52, %46 ], [ 0, %44 ], [ %60, %.noexc8 ] - %64 = tail call i64 @llvm.umax.i64(i64 %.sink.i, i64 3) - %.0.sroa.speculated.i = add nuw nsw i64 %64, 1 + %64 = add nuw nsw i64 %.sink.i, 1 + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 range(i64 1, 0) %64) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 4, i64 %64 %65 = invoke { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h3ab97a64aea5dc85E"(i64 noundef %.0.sroa.speculated.i, i1 noundef zeroext false) to label %66 unwind label %61 @@ -7307,7 +7322,10 @@ define hidden void @_ZN4core4iter6traits8iterator8Iterator3zip17h9319c83ddf65d3a %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = udiv exact i64 %14, 24 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8, !alias.scope !2231 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8, !alias.scope !2231 @@ -14872,10 +14890,7 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #20 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #21 - -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #21 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #21 attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/clap-rs/optimized/3n9sdy3q5n8p0ad5.ll b/bench/clap-rs/optimized/3n9sdy3q5n8p0ad5.ll index 0e546aa294e..0cb0814aec9 100644 --- a/bench/clap-rs/optimized/3n9sdy3q5n8p0ad5.ll +++ b/bench/clap-rs/optimized/3n9sdy3q5n8p0ad5.ll @@ -5146,16 +5146,11 @@ _ZN12clap_builder6output5usage5Usage17needs_options_tag17he0f20c589d0e4de5E.exit .critedge30.i: ; preds = %"_ZN73_$LT$$u5b$A$u5d$$u20$as$u20$core..slice..cmp..SlicePartialEq$LT$B$GT$$GT$5equal17hda8e9c883b81024cE.exit37.i", %"_ZN73_$LT$$u5b$A$u5d$$u20$as$u20$core..slice..cmp..SlicePartialEq$LT$B$GT$$GT$5equal17hda8e9c883b81024cE.exit.i", %138, %135 %142 = getelementptr inbounds nuw i8, ptr %128, i64 548 %143 = load i8, ptr %142, align 4, !range !1541, !alias.scope !1542, !noundef !17 - switch i8 %143, label %.backedge414 [ - i8 9, label %144 - i8 4, label %144 - i8 3, label %144 - i8 2, label %144 - i8 1, label %144 - i8 0, label %144 - ] + %.off.i = add nsw i8 %143, -5 + %switch.i = icmp ult i8 %.off.i, 4 + br i1 %switch.i, label %.backedge414, label %144 -144: ; preds = %.critedge30.i, %.critedge30.i, %.critedge30.i, %.critedge30.i, %.critedge30.i, %.critedge30.i +144: ; preds = %.critedge30.i %145 = getelementptr inbounds nuw i8, ptr %128, i64 544 %146 = load i32, ptr %145, align 4, !alias.scope !1545, !noundef !17 %147 = and i32 %146, 5 diff --git a/bench/clap-rs/optimized/4bajo035z6e1d4qz.ll b/bench/clap-rs/optimized/4bajo035z6e1d4qz.ll index fb42b07950d..a793cd2af7d 100644 --- a/bench/clap-rs/optimized/4bajo035z6e1d4qz.ll +++ b/bench/clap-rs/optimized/4bajo035z6e1d4qz.ll @@ -1569,7 +1569,10 @@ define hidden void @_ZN4core4iter6traits8iterator8Iterator3zip17h677cc6890c2b765 %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = udiv exact i64 %14, 24 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8, !alias.scope !378 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8, !alias.scope !378 @@ -9378,8 +9381,17 @@ _ZN12clap_builder6parser7matches11matched_arg10MatchedArg7new_arg17ha6c5a010810e %45 = getelementptr inbounds nuw i8, ptr %44, i64 105 %46 = load i8, ptr %45, align 1, !range !142, !alias.scope !2027, !noundef !5 %.not.i = icmp eq i8 %46, 3 - %.0.sroa.speculated.i.i = tail call i8 @llvm.umax.i8(i8 %46, i8 %2) - %storemerge.i = select i1 %.not.i, i8 %2, i8 %.0.sroa.speculated.i.i + br i1 %.not.i, label %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit, label %47 + +47: ; preds = %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg7new_arg17ha6c5a010810eeeeeE.exit + %.0.i.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i8(i8 %46, i8 %2) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i8 %46, i8 %2 + br label %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit + +_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit: ; preds = %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg7new_arg17ha6c5a010810eeeeeE.exit, %47 + %storemerge.i = phi i8 [ %.0.sroa.speculated.i.i, %47 ], [ %2, %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg7new_arg17ha6c5a010810eeeeeE.exit ] store i8 %storemerge.i, ptr %45, align 1, !alias.scope !2027 tail call void @_ZN12clap_builder6parser7matches11matched_arg10MatchedArg13new_val_group17hfa969a504daea6e5E(ptr noalias noundef nonnull align 8 dereferenceable(104) %44) ret void @@ -9418,8 +9430,17 @@ define hidden void @_ZN12clap_builder6parser11arg_matcher10ArgMatcher18start_cus %12 = getelementptr inbounds nuw i8, ptr %11, i64 105 %13 = load i8, ptr %12, align 1, !range !142, !alias.scope !2033, !noundef !5 %.not.i = icmp eq i8 %13, 3 - %.0.sroa.speculated.i.i = tail call i8 @llvm.umax.i8(i8 %13, i8 %3) - %storemerge.i = select i1 %.not.i, i8 %3, i8 %.0.sroa.speculated.i.i + br i1 %.not.i, label %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit, label %14 + +14: ; preds = %4 + %.0.i.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i8(i8 %13, i8 %3) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i8 %13, i8 %3 + br label %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit + +_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit: ; preds = %4, %14 + %storemerge.i = phi i8 [ %.0.sroa.speculated.i.i, %14 ], [ %3, %4 ] store i8 %storemerge.i, ptr %12, align 1, !alias.scope !2033 tail call void @_ZN12clap_builder6parser7matches11matched_arg10MatchedArg13new_val_group17hfa969a504daea6e5E(ptr noalias noundef nonnull align 8 dereferenceable(104) %11) ret void @@ -9542,7 +9563,20 @@ _ZN12clap_builder6parser7matches11matched_arg10MatchedArg12new_external17hd2a812 call void @llvm.lifetime.end.p0(ptr nonnull %4) call void @llvm.lifetime.end.p0(ptr nonnull %5) %45 = getelementptr inbounds nuw i8, ptr %44, i64 105 - store i8 2, ptr %45, align 1, !alias.scope !2058 + %46 = load i8, ptr %45, align 1, !range !142, !alias.scope !2058, !noundef !5 + %.not.i = icmp eq i8 %46, 3 + br i1 %.not.i, label %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit, label %47 + +47: ; preds = %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg12new_external17hd2a8121d1b542cd4E.exit + %.0.i.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i8(i8 %46, i8 2) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i8 %46, i8 2 + br label %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit + +_ZN12clap_builder6parser7matches11matched_arg10MatchedArg10set_source17hd85a9e2506a7266eE.exit: ; preds = %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg12new_external17hd2a8121d1b542cd4E.exit, %47 + %storemerge.i = phi i8 [ %.0.sroa.speculated.i.i, %47 ], [ 2, %_ZN12clap_builder6parser7matches11matched_arg10MatchedArg12new_external17hd2a8121d1b542cd4E.exit ] + store i8 %storemerge.i, ptr %45, align 1, !alias.scope !2058 tail call void @_ZN12clap_builder6parser7matches11matched_arg10MatchedArg13new_val_group17hfa969a504daea6e5E(ptr noalias noundef nonnull align 8 dereferenceable(104) %44) ret void } @@ -10560,10 +10594,10 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #36 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #37 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #37 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i8 @llvm.umax.i8(i8, i8) #37 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i8(i8, i8) #37 attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: read) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/clap-rs/optimized/4r6y4qxwk52m92uh.ll b/bench/clap-rs/optimized/4r6y4qxwk52m92uh.ll index 3b800210532..97ba872265a 100644 --- a/bench/clap-rs/optimized/4r6y4qxwk52m92uh.ll +++ b/bench/clap-rs/optimized/4r6y4qxwk52m92uh.ll @@ -242,7 +242,7 @@ define void @_ZN8clap_lex7RawArgs4seek17h509ee55157aa1c36E(ptr noalias noundef r %4 = load i64, ptr %2, align 8, !range !25, !noundef !4 %5 = getelementptr inbounds nuw i8, ptr %2, i64 8 %6 = load i64, ptr %5, align 8, !noundef !4 - switch i64 %4, label %default.unreachable5 [ + switch i64 %4, label %default.unreachable11 [ i64 0, label %14 i64 1, label %7 i64 2, label %11 @@ -255,21 +255,30 @@ default.unreachable5: ; preds = %3 %8 = getelementptr inbounds nuw i8, ptr %0, i64 16 %9 = load i64, ptr %8, align 8, !noundef !4 %10 = tail call i64 @llvm.sadd.sat.i64(i64 %9, i64 %6) - %.0.sroa.speculated.i = tail call noundef range(i64 0, -9223372036854775808) i64 @llvm.smax.i64(i64 %10, i64 0) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64 %10, i64 0) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %10, i64 0 br label %14 11: ; preds = %3 %12 = load i64, ptr %1, align 8, !noundef !4 %13 = tail call i64 @llvm.sadd.sat.i64(i64 %12, i64 %6) - %.0.sroa.speculated.i3 = tail call noundef range(i64 0, -9223372036854775808) i64 @llvm.smax.i64(i64 %13, i64 0) + %.0.sroa.speculated.i3 = tail call noundef range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64 %13, i64 0) + %.off.i4 = add nsw i8 %.0.i.i.i3, -1 + %switch.i5 = icmp ult i8 %.off.i4, -2 + %.0.sroa.speculated.i6 = select i1 %switch.i5, i64 %13, i64 0 br label %14 14: ; preds = %3, %11, %7 - %.0 = phi i64 [ %.0.sroa.speculated.i, %7 ], [ %.0.sroa.speculated.i3, %11 ], [ %6, %3 ] + %.0 = phi i64 [ %.0.sroa.speculated.i, %7 ], [ %.0.sroa.speculated.i6, %11 ], [ %6, %3 ] %15 = getelementptr inbounds nuw i8, ptr %0, i64 16 %16 = load i64, ptr %15, align 8, !noundef !4 - %.0.sroa.speculated.i4 = tail call noundef i64 @llvm.umin.i64(i64 %.0, i64 %16) - store i64 %.0.sroa.speculated.i4, ptr %1, align 8 + %.0.sroa.speculated.i4 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %.0, i64 %16) + %.off.i8 = add nsw i8 %.0.sroa.speculated.i4, -1 + %switch.i9 = icmp ult i8 %.off.i8, -2 + %.0.sroa.speculated.i10 = select i1 %switch.i9, i64 %16, i64 %.0 + store i64 %.0.sroa.speculated.i10, ptr %1, align 8 ret void } @@ -1293,10 +1302,10 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #21 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.smax.i64(i64, i64) #22 +declare range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64, i64) #22 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #22 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #22 attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/clap-rs/optimized/58cs3pckwcmstm46.ll b/bench/clap-rs/optimized/58cs3pckwcmstm46.ll index 9b0948f247f..287f3d32c66 100644 --- a/bench/clap-rs/optimized/58cs3pckwcmstm46.ll +++ b/bench/clap-rs/optimized/58cs3pckwcmstm46.ll @@ -4738,10 +4738,8 @@ define hidden void @"_ZN4core3ptr60drop_in_place$LT$$u5b$alloc..borrow..Cow$LT$s define hidden void @"_ZN4core3ptr60drop_in_place$LT$clap_builder..builder..command..Command$GT$17h2fda62fc590cd326E"(ptr noalias noundef readonly align 8 dereferenceable(712) %0) unnamed_addr #3 personality ptr @rust_eh_personality { %2 = getelementptr inbounds nuw i8, ptr %0, i64 272 %.val = load i64, ptr %2, align 8, !range !134, !noundef !4 - switch i64 %.val, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit" - i64 0, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit" - ] + %switch = icmp sgt i64 %.val, 0 + br i1 %switch, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i", label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i": ; preds = %1 %3 = getelementptr inbounds nuw i8, ptr %0, i64 280 @@ -4749,13 +4747,11 @@ define hidden void @"_ZN4core3ptr60drop_in_place$LT$clap_builder..builder..comma tail call void @__rust_dealloc(ptr noundef nonnull %.val36, i64 noundef %.val, i64 noundef 1) #28, !noalias !2841 br label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit" -"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i", %1, %1 +"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit": ; preds = %1, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i" %4 = getelementptr inbounds nuw i8, ptr %0, i64 296 %.val39 = load i64, ptr %4, align 8, !range !134, !noundef !4 - switch i64 %.val39, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i47" [ - i64 -9223372036854775808, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit48" - i64 0, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit48" - ] + %switch98 = icmp sgt i64 %.val39, 0 + br i1 %switch98, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i47", label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit48" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i47": ; preds = %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit" %5 = getelementptr inbounds nuw i8, ptr %0, i64 304 @@ -4763,7 +4759,7 @@ define hidden void @"_ZN4core3ptr60drop_in_place$LT$clap_builder..builder..comma tail call void @__rust_dealloc(ptr noundef nonnull %.val40, i64 noundef %.val39, i64 noundef 1) #28, !noalias !2850 br label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit48" -"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit48": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i47", %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit", %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit" +"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit48": ; preds = %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit", %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i47" %6 = getelementptr inbounds nuw i8, ptr %0, i64 320 tail call void @llvm.experimental.noalias.scope.decl(metadata !2859) %7 = load i64, ptr %6, align 8, !range !134, !alias.scope !2859, !noundef !4 @@ -4968,10 +4964,8 @@ define hidden void @"_ZN4core3ptr60drop_in_place$LT$clap_builder..builder..comma "_ZN4core3ptr93drop_in_place$LT$core..option..Option$LT$clap_builder..builder..styled_str..StyledStr$GT$$GT$17h413591363c8236ceE.llvm.13290713768692451428.exit78": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i.i77", %72, %"_ZN4core3ptr90drop_in_place$LT$alloc..vec..Vec$LT$$LP$clap_builder..builder..str..Str$C$bool$RP$$GT$$GT$17h3d4f7caa1b83b7c9E.exit74" %76 = getelementptr inbounds nuw i8, ptr %0, i64 488 %.val43 = load i64, ptr %76, align 8, !range !134, !noundef !4 - switch i64 %.val43, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i81" [ - i64 -9223372036854775808, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit82" - i64 0, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit82" - ] + %switch99 = icmp sgt i64 %.val43, 0 + br i1 %switch99, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i81", label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit82" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i81": ; preds = %"_ZN4core3ptr93drop_in_place$LT$core..option..Option$LT$clap_builder..builder..styled_str..StyledStr$GT$$GT$17h413591363c8236ceE.llvm.13290713768692451428.exit78" %77 = getelementptr inbounds nuw i8, ptr %0, i64 496 @@ -4979,7 +4973,7 @@ define hidden void @"_ZN4core3ptr60drop_in_place$LT$clap_builder..builder..comma tail call void @__rust_dealloc(ptr noundef nonnull %.val44, i64 noundef %.val43, i64 noundef 1) #28, !noalias !3072 br label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit82" -"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit82": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i81", %"_ZN4core3ptr93drop_in_place$LT$core..option..Option$LT$clap_builder..builder..styled_str..StyledStr$GT$$GT$17h413591363c8236ceE.llvm.13290713768692451428.exit78", %"_ZN4core3ptr93drop_in_place$LT$core..option..Option$LT$clap_builder..builder..styled_str..StyledStr$GT$$GT$17h413591363c8236ceE.llvm.13290713768692451428.exit78" +"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17h0507b75a10e27634E.exit82": ; preds = %"_ZN4core3ptr93drop_in_place$LT$core..option..Option$LT$clap_builder..builder..styled_str..StyledStr$GT$$GT$17h413591363c8236ceE.llvm.13290713768692451428.exit78", %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.13290713768692451428.exit.i.i1.i.i.i81" %78 = getelementptr inbounds nuw i8, ptr %0, i64 512 tail call void @llvm.experimental.noalias.scope.decl(metadata !3081) %79 = load i64, ptr %78, align 8, !range !134, !alias.scope !3081, !noundef !4 diff --git a/bench/cmake/optimized/archive_read_support_format_iso9660.ll b/bench/cmake/optimized/archive_read_support_format_iso9660.ll index 999f64e7d29..d9f1b05bf57 100644 --- a/bench/cmake/optimized/archive_read_support_format_iso9660.ll +++ b/bench/cmake/optimized/archive_read_support_format_iso9660.ll @@ -156,15 +156,11 @@ define internal range(i32 -1, 49) i32 @archive_read_format_iso9660_bid(ptr nound %.02665 = phi ptr [ %15, %.lr.ph ], [ %266, %isPVD.exit ] %26 = phi i64 [ %13, %.lr.ph ], [ %265, %isPVD.exit ] %27 = load i8, ptr %.02665, align 1, !tbaa !45 - switch i8 %27, label %.loopexit [ - i8 -1, label %28 - i8 3, label %28 - i8 2, label %28 - i8 1, label %28 - i8 0, label %28 - ] + %.off = add i8 %27, -4 + %switch = icmp ult i8 %.off, -5 + br i1 %switch, label %.loopexit, label %28 -28: ; preds = %25, %25, %25, %25, %25 +28: ; preds = %25 %29 = getelementptr inbounds nuw i8, ptr %.02665, i64 1 %bcmp = call i32 @bcmp(ptr noundef nonnull dereferenceable(5) %29, ptr noundef nonnull dereferenceable(5) @.str.3, i64 5) %.not30 = icmp eq i32 %bcmp, 0 diff --git a/bench/cpython/optimized/socketmodule.ll b/bench/cpython/optimized/socketmodule.ll index e094d91d5cc..15508d6af63 100644 --- a/bench/cpython/optimized/socketmodule.ll +++ b/bench/cpython/optimized/socketmodule.ll @@ -3143,8 +3143,9 @@ define internal fastcc range(i32 -1, 17) i32 @setipaddr(ptr noundef readonly cap br label %set_gaierror.exit .critedge: ; preds = %64 - %cond = icmp eq i32 %4, 0 - br i1 %cond, label %69, label %.thread + %.off = add nsw i32 %4, -1 + %switch = icmp ult i32 %.off, 9 + br i1 %switch, label %.thread, label %69 69: ; preds = %.critedge, %63 %70 = tail call ptr @strchr(ptr noundef nonnull dereferenceable(1) %1, i32 noundef 37) #15 @@ -3162,7 +3163,7 @@ define internal fastcc range(i32 -1, 17) i32 @setipaddr(ptr noundef readonly cap store i16 10, ptr %2, align 4, !tbaa !76 br label %set_gaierror.exit -.thread: ; preds = %.critedge, %71, %63, %69 +.thread: ; preds = %71, %.critedge, %63, %69 call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(48) %6, i8 0, i64 48, i1 false) %76 = getelementptr inbounds nuw i8, ptr %6, i64 4 store i32 %4, ptr %76, align 4, !tbaa !51 diff --git a/bench/cvc5/optimized/bv_gauss.ll b/bench/cvc5/optimized/bv_gauss.ll index a28e5e8a207..586504a3d54 100644 --- a/bench/cvc5/optimized/bv_gauss.ll +++ b/bench/cvc5/optimized/bv_gauss.ll @@ -10886,10 +10886,9 @@ _ZN4cvc58internal7IntegerC2ERKS1_.exit680: ; preds = %_ZN4cvc58internal11 unreachable _ZN4cvc58internal7IntegerD2Ev.exit681: ; preds = %2195 - switch i32 %2194, label %2199 [ - i32 3, label %.loopexit992 - i32 0, label %.loopexit992 - ] + %.off = add nsw i32 %2194, -1 + %switch = icmp ult i32 %.off, 2 + br i1 %switch, label %2199, label %.loopexit992 2199: ; preds = %_ZN4cvc58internal7IntegerD2Ev.exit681 call void @llvm.lifetime.start.p0(ptr nonnull %89) @@ -12392,8 +12391,8 @@ _ZNSt6vectorIN4cvc58internal12NodeTemplateILb1EEESaIS3_EED2Ev.exit804: ; preds = call void @llvm.lifetime.end.p0(ptr nonnull %89) br label %_ZN4cvc58internal7IntegerD2Ev.exit682 -.loopexit992: ; preds = %_ZN4cvc58internal12NodeTemplateILb1EED2Ev.exit660, %.critedge340, %_ZNSt6vectorIN4cvc58internal12NodeTemplateILb1EEESaIS3_EED2Ev.exit804, %_ZN4cvc58internal7IntegerD2Ev.exit681, %_ZN4cvc58internal7IntegerD2Ev.exit681, %._crit_edge1049, %2150 - %.3 = phi i32 [ 0, %.critedge340 ], [ 0, %2150 ], [ 0, %._crit_edge1049 ], [ %2194, %_ZN4cvc58internal7IntegerD2Ev.exit681 ], [ %2194, %_ZN4cvc58internal7IntegerD2Ev.exit681 ], [ %2194, %_ZNSt6vectorIN4cvc58internal12NodeTemplateILb1EEESaIS3_EED2Ev.exit804 ], [ 0, %_ZN4cvc58internal12NodeTemplateILb1EED2Ev.exit660 ] +.loopexit992: ; preds = %_ZN4cvc58internal12NodeTemplateILb1EED2Ev.exit660, %_ZN4cvc58internal7IntegerD2Ev.exit681, %.critedge340, %_ZNSt6vectorIN4cvc58internal12NodeTemplateILb1EEESaIS3_EED2Ev.exit804, %._crit_edge1049, %2150 + %.3 = phi i32 [ 0, %.critedge340 ], [ 0, %2150 ], [ 0, %._crit_edge1049 ], [ %2194, %_ZN4cvc58internal7IntegerD2Ev.exit681 ], [ %2194, %_ZNSt6vectorIN4cvc58internal12NodeTemplateILb1EEESaIS3_EED2Ev.exit804 ], [ 0, %_ZN4cvc58internal12NodeTemplateILb1EED2Ev.exit660 ] %2786 = load ptr, ptr %32, align 8, !tbaa !100 %2787 = getelementptr inbounds nuw i8, ptr %32, i64 8 %2788 = load ptr, ptr %2787, align 8, !tbaa !97 diff --git a/bench/cvc5/optimized/portfolio_driver.ll b/bench/cvc5/optimized/portfolio_driver.ll index f50e7d3050f..9077b395d8f 100644 --- a/bench/cvc5/optimized/portfolio_driver.ll +++ b/bench/cvc5/optimized/portfolio_driver.ll @@ -20611,7 +20611,7 @@ define internal fastcc noundef zeroext i1 @_ZN4cvc54main12_GLOBAL__N_120Portfoli br i1 %.not, label %.lr.ph.split.us, label %.lr.ph.split .lr.ph.split.us: ; preds = %.lr.ph, %.thread128.us - %.sroa.0127.0139.us = phi ptr [ %25, %.thread128.us ], [ %.val49, %.lr.ph ] + %.sroa.0127.0139.us = phi ptr [ %25, %.thread129.us ], [ %.val49, %.lr.ph ] %11 = getelementptr inbounds nuw i8, ptr %.sroa.0127.0139.us, i64 56 %12 = load i32, ptr %11, align 8, !tbaa !142 switch i32 %12, label %13 [ @@ -20625,10 +20625,9 @@ define internal fastcc noundef zeroext i1 @_ZN4cvc54main12_GLOBAL__N_120Portfoli %14 = getelementptr inbounds nuw i8, ptr %.sroa.0127.0139.us, i64 32 %15 = load i32, ptr %14, align 8, !tbaa !95 %16 = call i32 @waitpid(i32 noundef %15, ptr noundef nonnull %4, i32 noundef 1) - switch i32 %16, label %17 [ - i32 0, label %.thread131.us - i32 -1, label %.thread131.us - ] + %.off.us = add i32 %16, -1 + %switch49.us = icmp ult i32 %.off.us, -2 + br i1 %switch49.us, label %17, label %.thread131.us 17: ; preds = %13 store i32 2, ptr %11, align 8, !tbaa !142 @@ -20645,7 +20644,7 @@ define internal fastcc noundef zeroext i1 @_ZN4cvc54main12_GLOBAL__N_120Portfoli %or.cond134.us = and i1 %or.cond.us, %23 br i1 %or.cond134.us, label %._crit_edge.i.i, label %.thread131.us -.thread131.us: ; preds = %17, %13, %13 +.thread131.us: ; preds = %17, %13 call void @llvm.lifetime.end.p0(ptr nonnull %4) br label %.thread128.us @@ -20666,8 +20665,8 @@ define internal fastcc noundef zeroext i1 @_ZN4cvc54main12_GLOBAL__N_120Portfoli br label %30 30: ; preds = %.lr.ph.split, %.thread128 - %31 = phi i64 [ %.promoted, %.lr.ph.split ], [ %119, %.thread128 ] - %.sroa.0127.0139 = phi ptr [ %.val49, %.lr.ph.split ], [ %120, %.thread128 ] + %31 = phi i64 [ %.promoted, %.lr.ph.split ], [ %119, %.thread129 ] + %.sroa.0127.0139 = phi ptr [ %.val49, %.lr.ph.split ], [ %120, %.thread129 ] %32 = getelementptr inbounds nuw i8, ptr %.sroa.0127.0139, i64 56 %33 = load i32, ptr %32, align 8, !tbaa !142 switch i32 %33, label %34 [ @@ -20777,7 +20776,7 @@ _ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit: ; preds = %_ZStlsI 79: ; preds = %_ZStlsISt11char_traitsIcEERSt13basic_ostreamIcT_ES5_PKc.exit invoke void @_ZSt16__throw_bad_castv() #28 - to label %.noexc103 unwind label %109 + to label %.noexc104 unwind label %109 .noexc103: ; preds = %79 unreachable @@ -20795,7 +20794,7 @@ _ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i100: ; preds = %_ZStlsISt11char 85: ; preds = %_ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i100 invoke void @_ZNKSt5ctypeIcE13_M_widen_initEv(ptr noundef nonnull align 8 dereferenceable(570) %78) - to label %.noexc104 unwind label %109 + to label %.noexc105 unwind label %109 .noexc104: ; preds = %85 %86 = load ptr, ptr %78, align 8, !tbaa !17 @@ -20805,9 +20804,9 @@ _ZSt13__check_facetISt5ctypeIcEERKT_PS3_.exit.i.i100: ; preds = %_ZStlsISt11char to label %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i unwind label %109 _ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i: ; preds = %.noexc104, %82 - %.0.i.i.i102 = phi i8 [ %84, %82 ], [ %89, %.noexc104 ] + %.0.i.i.i102 = phi i8 [ %84, %82 ], [ %89, %.noexc105 ] %90 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSo3putEc(ptr noundef nonnull align 8 dereferenceable(8) %71, i8 noundef signext %.0.i.i.i102) - to label %.noexc106 unwind label %109 + to label %.noexc107 unwind label %109 .noexc106: ; preds = %_ZNKSt9basic_iosIcSt11char_traitsIcEE5widenEc.exit.i %91 = invoke noundef nonnull align 8 dereferenceable(8) ptr @_ZNSo5flushEv(ptr noundef nonnull align 8 dereferenceable(8) %90) @@ -20894,18 +20893,18 @@ _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit93: ; preds = %109 br label %.loopexit .thread128: ; preds = %34, %30, %30, %.thread131 - %119 = phi i64 [ %31, %34 ], [ %31, %30 ], [ %31, %30 ], [ %38, %.thread131 ] + %119 = phi i64 [ %31, %34 ], [ %31, %30 ], [ %31, %30 ], [ %38, %.thread132 ] %120 = getelementptr inbounds nuw i8, ptr %.sroa.0127.0139, i64 64 %.not133.not = icmp eq ptr %120, %.val br i1 %.not133.not, label %.loopexit, label %30 121: ; preds = %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit90, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit93, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit87 - %.pn45.pn = phi { ptr, i32 } [ %98, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit87 ], [ %110, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit93 ], [ %104, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit90 ] + %.pn45.pn = phi { ptr, i32 } [ %98, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit88 ], [ %110, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit94 ], [ %104, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit91 ] call void @llvm.lifetime.end.p0(ptr nonnull %4) resume { ptr, i32 } %.pn45.pn .loopexit: ; preds = %.thread128, %.thread128.us, %3, %116 - %.not133136 = phi i1 [ true, %116 ], [ false, %3 ], [ false, %.thread128.us ], [ false, %.thread128 ] + %.not133136 = phi i1 [ true, %116 ], [ false, %3 ], [ false, %.thread129.us ], [ false, %.thread129 ] ret i1 %.not133136 } diff --git a/bench/darktable/optimized/sony.ll b/bench/darktable/optimized/sony.ll index 29d7533d168..c899fa61561 100644 --- a/bench/darktable/optimized/sony.ll +++ b/bench/darktable/optimized/sony.ll @@ -57,7 +57,6 @@ $__clang_call_terminate = comdat any @_ZN6LibRaw16Sony_SRF_wb_listE = external local_unnamed_addr global %class.libraw_static_table_t, align 8 @switch.table._ZN6LibRaw19parseSonyMakernotesEijjjjRPhRtS1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_ = private unnamed_addr constant [5 x i16] [i16 1, i16 1, i16 255, i16 255, i16 2], align 2 @switch.table._ZN6LibRaw19parseSonyMakernotesEijjjjRPhRtS1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_.1 = private unnamed_addr constant [6 x i16] [i16 1, i16 1, i16 12, i16 255, i16 2, i16 2], align 2 -@switch.table._ZN6LibRaw19parseSonyMakernotesEijjjjRPhRtS1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_.2 = private unnamed_addr constant [6 x i16] [i16 1, i16 2, i16 255, i16 255, i16 255, i16 2], align 2 ; Function Attrs: mustprogress nofree norecurse nosync nounwind memory(readwrite, inaccessiblemem: none) uwtable define void @_ZN6LibRaw12sony_decryptEPjiii(ptr noundef nonnull readonly align 8 captures(none) dereferenceable(767680) %0, ptr noundef captures(none) %1, i32 noundef %2, i32 noundef %3, i32 noundef %4) local_unnamed_addr #0 align 2 { @@ -4055,22 +4054,21 @@ switch.lookup995: ; preds = %861 %931 = load i8, ptr %930, align 1, !tbaa !101 %932 = zext i8 %931 to i16 %trunc = or disjoint i16 %929, %932 - %933 = icmp ult i16 %trunc, 6 - br i1 %933, label %switch.lookup998, label %935 - -switch.lookup998: ; preds = %917 - %934 = zext nneg i16 %trunc to i64 - %switch.gep999 = getelementptr inbounds nuw i16, ptr @switch.table._ZN6LibRaw19parseSonyMakernotesEijjjjRPhRtS1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_S1_S2_.2, i64 %934 - %switch.load1000 = load i16, ptr %switch.gep999, align 2 - %switch.cast = zext i8 %931 to i48 - %switch.shiftamt = shl nuw nsw i48 %switch.cast, 3 - %switch.downshift = lshr i48 3298534818305, %switch.shiftamt - %switch.masked = trunc i48 %switch.downshift to i8 + switch i16 %trunc, label %934 [ + i16 0, label %935 + i16 1, label %933 + i16 5, label %933 + ] + +933:; preds = %917, %917 br label %935 -935: ; preds = %917, %switch.lookup998 - %.sink969 = phi i16 [ %switch.load1000, %switch.lookup998 ], [ 255, %917 ] - %trunc953 = phi i8 [ %switch.masked, %switch.lookup998 ], [ -1, %917 ] +935: ; preds = %917 + br label %935 + +935: ; preds = %917, %934, %933 + %.sink969 = phi i16 [ 255, %934 ], [ 2, %933 ], [ 1, %917 ] + %switch = phi i1 [ false, %934 ], [ true, %933 ], [ true, %917 ] %936 = getelementptr inbounds nuw i8, ptr %0, i64 4760 store i16 %.sink969, ptr %936, align 8, !tbaa !158 %937 = getelementptr inbounds nuw i8, ptr %796, i64 154 @@ -4115,12 +4113,9 @@ switch.lookup998: ; preds = %917 %960 = getelementptr inbounds nuw i8, ptr %0, i64 3692 store float %.sink973, ptr %960, align 4, !tbaa !103 %961 = getelementptr inbounds nuw i8, ptr %0, i64 4760 - switch i8 %trunc953, label %1053 [ - i8 0, label %962 - i8 -1, label %962 - ] + br i1 %switch, label %1053, label %962 -962: ; preds = %959, %959 +962: ; preds = %959 %963 = getelementptr inbounds nuw i8, ptr %796, i64 262 %964 = load i8, ptr %963, align 1, !tbaa !101 %965 = zext i8 %964 to i16 @@ -5253,7 +5248,7 @@ switch.lookup1013: ; preds = %1622 br label %1630 1630: ; preds = %1622, %switch.lookup1013, %1612, %1612 - %1631 = phi i16 [ %1621, %1612 ], [ %1621, %1612 ], [ %1621, %1622 ], [ %switch.masked1017, %switch.lookup1013 ] + %1631 = phi i16 [ %1621, %1612 ], [ %1621, %1612 ], [ %1621, %1622 ], [ %switch.masked1017, %switch.lookup1006 ] %1632 = getelementptr inbounds nuw i8, ptr %1583, i64 73 %1633 = load i8, ptr %1632, align 1, !tbaa !101 %1634 = zext i8 %1633 to i64 diff --git a/bench/delta-rs/optimized/4rnu0gt98xtph6lk.ll b/bench/delta-rs/optimized/4rnu0gt98xtph6lk.ll index c10344614a4..b0a86221100 100644 --- a/bench/delta-rs/optimized/4rnu0gt98xtph6lk.ll +++ b/bench/delta-rs/optimized/4rnu0gt98xtph6lk.ll @@ -4263,7 +4263,10 @@ define hidden void @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core. %47 = sub i64 %46, %43 %48 = getelementptr inbounds nuw i8, ptr %41, i64 16 %49 = load i64, ptr %48, align 8, !noalias !882, !noundef !13 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %47, i64 %49) + %.0.sroa.speculated.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %47, i64 %49) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %49, i64 %47 invoke void @_ZN5bytes5bytes5Bytes5slice17hc298e7c9fd9af475E(ptr noalias noundef nonnull sret({ ptr, ptr, i64, { ptr } }) align 8 captures(none) dereferenceable(32) %.sroa.0.i, ptr noundef nonnull align 8 %41, i64 noundef %44, i64 noundef %.0.sroa.speculated.i.i.i) to label %50 unwind label %.loopexit @@ -4557,6 +4560,9 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #21 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #19 + ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #22 diff --git a/bench/delta-rs/optimized/5b1j6qdxp2rr3k3q.ll b/bench/delta-rs/optimized/5b1j6qdxp2rr3k3q.ll index 31982d2906b..5089fbc996d 100644 --- a/bench/delta-rs/optimized/5b1j6qdxp2rr3k3q.ll +++ b/bench/delta-rs/optimized/5b1j6qdxp2rr3k3q.ll @@ -57,10 +57,16 @@ define hidden void @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17h %6 = extractvalue { i64, i1 } %3, 0 %7 = load i64, ptr %0, align 8, !alias.scope !4, !noundef !7 %8 = shl i64 %7, 1 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umax.i64(i64 %8, i64 %6) - %.0.sroa.speculated.i26.i = tail call noundef i64 @llvm.umax.i64(i64 %.0.sroa.speculated.i.i, i64 4) - %9 = icmp ugt i64 %.0.sroa.speculated.i.i, 12009599006321322 - %10 = mul nuw nsw i64 %.0.sroa.speculated.i26.i, 768 + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %8, i64 %6) + %.off.i.i = add nsw i8 %.0.sroa.speculated.i.i, -1 + %9 = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %9, i64 %8, i64 %6 + %.0.i.i.i26.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 %.0.sroa.speculated.i.i) + %.off.i27.i = add nsw i8 %.0.i.i.i26.i, -1 + %switch.i28.i = icmp ult i8 %.off.i27.i, -2 + %.0.sroa.speculated.i29.i = select i1 %switch.i28.i, i64 4, i64 %.0.sroa.speculated.i.i + %9 = icmp ugt i64 %.0.sroa.speculated.i29.i, 12009599006321322 + %10 = mul nuw nsw i64 %.0.sroa.speculated.i29.i, 768 %11 = getelementptr inbounds nuw i8, ptr %0, i64 8 %.val25.i = load ptr, ptr %11, align 8, !alias.scope !4 %12 = icmp eq i64 %7, 0 @@ -76,24 +82,29 @@ define hidden void @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17h 14: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h53247d9ba43ff86bE.exit.thread.i" %15 = mul nuw i64 %7, 768 - %16 = icmp uge i64 %.0.sroa.speculated.i26.i, %7 + %16 = icmp uge i64 %.0.sroa.speculated.i29.i, %7 tail call void @llvm.assume(i1 %16) %17 = tail call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %.val25.i, i64 noundef %15, i64 noundef range(i64 1, 9) 8, i64 noundef %10) #11, !noalias !8 br label %_ZN5alloc7raw_vec11finish_grow17haa9a5749857e92cdE.exit.i 18: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h53247d9ba43ff86bE.exit.i" - %19 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !8 - %20 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %10, i64 noundef range(i64 1, 9) 8) #11, !noalias !8 + %19 = icmp eq i64 %.0.sroa.speculated.i29.i, 0 + br i1 %19, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hd4c0bd40d680d7e4E.exit.thread3", label %20 + +20: ; preds = %18 + %21 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !8 + %22 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %10, i64 noundef range(i64 1, 9) 8) #11, !noalias !8 br label %_ZN5alloc7raw_vec11finish_grow17haa9a5749857e92cdE.exit.i -_ZN5alloc7raw_vec11finish_grow17haa9a5749857e92cdE.exit.i: ; preds = %18, %14 - %.sroa.012.1.i.i.pn.i.i = phi ptr [ %17, %14 ], [ %20, %18 ] +_ZN5alloc7raw_vec11finish_grow17haa9a5749857e92cdE.exit.i: ; preds = %20, %14 + %.sroa.012.1.i.i.pn.i.i = phi ptr [ %17, %14 ], [ %22, %20 ] %.not.i = icmp eq ptr %.sroa.012.1.i.i.pn.i.i, null br i1 %.not.i, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hd4c0bd40d680d7e4E.exit", label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hd4c0bd40d680d7e4E.exit.thread3" -"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hd4c0bd40d680d7e4E.exit.thread3": ; preds = %_ZN5alloc7raw_vec11finish_grow17haa9a5749857e92cdE.exit.i - store ptr %.sroa.012.1.i.i.pn.i.i, ptr %11, align 8, !alias.scope !4 - store i64 %.0.sroa.speculated.i26.i, ptr %0, align 8, !alias.scope !4 +"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hd4c0bd40d680d7e4E.exit.thread3": ; preds = %18, %_ZN5alloc7raw_vec11finish_grow17haa9a5749857e92cdE.exit.i + %.sink1.i.i60.i = phi ptr [ %.sroa.012.1.i.i.pn.i.i, %_ZN5alloc7raw_vec11finish_grow17haa9a5749857e92cdE.exit.i ], [ inttoptr (i64 8 to ptr), %18 ] + store ptr %.sink1.i.i60.i, ptr %11, align 8, !alias.scope !4 + store i64 %.0.sroa.speculated.i29.i, ptr %0, align 8, !alias.scope !4 ret void "_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hd4c0bd40d680d7e4E.exit.thread": ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h53247d9ba43ff86bE.exit.thread.i", %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h53247d9ba43ff86bE.exit.i", %2 @@ -130,7 +141,7 @@ declare void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 nounde declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #7 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #8 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #8 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #9 diff --git a/bench/duckdb/optimized/pages.ll b/bench/duckdb/optimized/pages.ll index db1d5d33994..24b48715ad4 100644 --- a/bench/duckdb/optimized/pages.ll +++ b/bench/duckdb/optimized/pages.ll @@ -99,10 +99,9 @@ os_pages_unmap.exit: ; preds = %15, %25 %39 = load i32, ptr @mmap_flags, align 4, !tbaa !3 %40 = call ptr @mmap(ptr noundef null, i64 noundef %28, i32 noundef %38, i32 noundef %39, i32 noundef -1, i64 noundef 0) #10 %magicptr.i = ptrtoint ptr %40 to i64 - switch i64 %magicptr.i, label %41 [ - i64 -1, label %pages_map_slow.exit - i64 0, label %pages_map_slow.exit - ] + %magicptr.off.i = add i64 %magicptr.i, -1 + %switch.i = icmp ult i64 %magicptr.off.i, -2 + br i1 %switch.i, label %41, label %pages_map_slow.exit 41: ; preds = %37 %42 = add i64 %13, %magicptr.i @@ -173,8 +172,8 @@ os_pages_trim.exit.loopexit.split.loop.exit.i: ; preds = %71 %73 = getelementptr inbounds nuw i8, ptr %40, i64 %44 br label %pages_map_slow.exit -pages_map_slow.exit: ; preds = %37, %37, %os_pages_trim.exit.loopexit.split.loop.exit.i, %70, %57, %os_pages_unmap.exit, %11, %4 - %.0 = phi ptr [ %8, %4 ], [ %8, %11 ], [ null, %os_pages_unmap.exit ], [ %58, %57 ], [ %58, %70 ], [ %73, %os_pages_trim.exit.loopexit.split.loop.exit.i ], [ null, %37 ], [ null, %37 ] +pages_map_slow.exit: ; preds = %37, %os_pages_trim.exit.loopexit.split.loop.exit.i, %70, %57, %os_pages_unmap.exit, %11, %4 + %.0 = phi ptr [ %8, %4 ], [ %8, %11 ], [ null, %os_pages_unmap.exit ], [ %58, %57 ], [ %58, %70 ], [ %73, %os_pages_trim.exit.loopexit.split.loop.exit.i ], [ null, %37 ] ret ptr %.0 } @@ -619,10 +618,9 @@ init_thp_state.exit: ; preds = %55 %66 = load i32, ptr @mmap_flags, align 4, !tbaa !3 %67 = call ptr @mmap(ptr noundef null, i64 noundef 4096, i32 noundef %65, i32 noundef %66, i32 noundef -1, i64 noundef 0) #10 %magicptr = ptrtoint ptr %67 to i64 - switch i64 %magicptr, label %68 [ - i64 -1, label %os_pages_unmap.exit - i64 0, label %os_pages_unmap.exit - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %68, label %os_pages_unmap.exit 68: ; preds = %._crit_edge.i %.b.i = load i1, ptr @pages_can_purge_lazy_runtime, align 1 @@ -660,8 +658,8 @@ duckdb_je_pages_purge_lazy.exit.thread: ; preds = %68, %duckdb_je_page call void @llvm.lifetime.end.p0(ptr nonnull %1) br label %os_pages_unmap.exit -os_pages_unmap.exit: ; preds = %._crit_edge.i, %._crit_edge.i, %70, %80, %6 - %.04 = phi i1 [ true, %6 ], [ false, %70 ], [ false, %80 ], [ true, %._crit_edge.i ], [ true, %._crit_edge.i ] +os_pages_unmap.exit: ; preds = %._crit_edge.i, %70, %80, %6 + %.04 = phi i1 [ true, %6 ], [ false, %70 ], [ false, %80 ], [ true, %._crit_edge.i ] ret i1 %.04 } diff --git a/bench/egg-rs/optimized/2nrym8e40i82m5xa.ll b/bench/egg-rs/optimized/2nrym8e40i82m5xa.ll index 4540ebf26ef..235f9b1353f 100644 --- a/bench/egg-rs/optimized/2nrym8e40i82m5xa.ll +++ b/bench/egg-rs/optimized/2nrym8e40i82m5xa.ll @@ -68,16 +68,19 @@ define noundef i128 @_ZN3egg4test10percentile17h86d6f65026f76f59E(double noundef %9 = fmul double %0, %8 %10 = tail call i64 @llvm.fptoui.sat.i64.f64(double %9) %11 = add i64 %2, -1 - %.sroa.0.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %11) - %12 = icmp ult i64 %.sroa.0.0.sroa.speculated.i, %2 - br i1 %12, label %13, label %16, !prof !7 - -13: ; preds = %7 - %14 = getelementptr inbounds i128, ptr %1, i64 %.sroa.0.0.sroa.speculated.i - %15 = load i128, ptr %14, align 16, !noundef !4 - ret i128 %15 - -16: ; preds = %7 + %.sroa.0.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %11) + %.off.i = add nsw i8 %.sroa.0.0.sroa.speculated.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.sroa.0.0.sroa.speculated.i = select i1 %switch.i, i64 %11, i64 %10 + %13 = icmp ult i64 %.sroa.0.0.sroa.speculated.i, %2 + br i1 %13, label %14, label %17, !prof !7 + +14:; preds = %7 + %15 = getelementptr inbounds i128, ptr %1, i64 %.sroa.0.0.sroa.speculated.i + %16 = load i128, ptr %15, align 16, !noundef !4 + ret i128 %16 + +17: ; preds = %7 tail call void @_ZN4core9panicking18panic_bounds_check17hd7e618b1b39cc1c3E(i64 noundef %.sroa.0.0.sroa.speculated.i, i64 noundef %2, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.6b0be5cd40001bab02b1e37fd09b8e37.5) #12 unreachable } @@ -275,11 +278,11 @@ declare void @llvm.lifetime.start.p0(ptr captures(none)) #9 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(ptr captures(none)) #9 -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) -declare void @llvm.experimental.noalias.scope.decl(metadata) #10 - ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #11 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #11 + +; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) +declare void @llvm.experimental.noalias.scope.decl(metadata) #11 attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(read, inaccessiblemem: none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } @@ -291,8 +294,8 @@ attributes #6 = { mustprogress nocallback nofree nosync nounwind speculatable wi attributes #7 = { cold noreturn nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #8 = { nounwind nonlazybind allockind("free") uwtable "alloc-family"="__rust_alloc" "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #9 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } -attributes #10 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } -attributes #11 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } +attributes #10 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } +attributes #11 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } attributes #12 = { noreturn } attributes #13 = { cold } attributes #14 = { nounwind } diff --git a/bench/elfshaker-rs/optimized/dpdxzpr6vy50qrx8lokb5klbq.ll b/bench/elfshaker-rs/optimized/dpdxzpr6vy50qrx8lokb5klbq.ll index 4ab1f9d5f6f..bf25db98bbc 100644 --- a/bench/elfshaker-rs/optimized/dpdxzpr6vy50qrx8lokb5klbq.ll +++ b/bench/elfshaker-rs/optimized/dpdxzpr6vy50qrx8lokb5klbq.ll @@ -7078,7 +7078,7 @@ _ZN4core3ops8function6FnOnce9call_once17h8ac06c4c8c8c57c6E.exit.i4.i.i.i.i.i: ; _ZN4core3ops8function6FnOnce9call_once17h8ac06c4c8c8c57c6E.exit.thread.i9.i.i.i.i.i: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h8ac06c4c8c8c57c6E.exit.i4.i.i.i.i.i, %104 invoke void @"_ZN4core3ptr136drop_in_place$LT$alloc..vec..into_iter..IntoIter$LT$core..result..Result$LT$$u5b$u8$u3b$$u20$20$u5d$$C$std..io..error..Error$GT$$GT$$GT$17h9c2919cead84fa62E"(ptr noalias noundef nonnull align 8 dereferenceable(32) %83) - to label %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4next17h2f17de8d1e2d61ebE.exit.thread6.i.i.i" unwind label %"_ZN4core3ptr125drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$$u5b$u8$u3b$$u20$20$u5d$$C$std..io..error..Error$GT$$GT$$GT$17he48ae708c3c21fc3E.exit.i7.i.i.i.i.i", !noalias !1711 + to label %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4next17h2f17de8d1e2d61ebE.exit.thread5.i.i.i" unwind label %"_ZN4core3ptr125drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$$u5b$u8$u3b$$u20$20$u5d$$C$std..io..error..Error$GT$$GT$$GT$17he48ae708c3c21fc3E.exit.i7.i.i.i.i.i", !noalias !1711 "_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4next17h2f17de8d1e2d61ebE.exit.thread6.i.i.i": ; preds = %_ZN4core3ops8function6FnOnce9call_once17h8ac06c4c8c8c57c6E.exit.thread.i9.i.i.i.i.i store ptr null, ptr %83, align 8, !alias.scope !1697, !noalias !1698 diff --git a/bench/fish-rs/optimized/1f6psxxy03bde21s751lsgfn2.ll b/bench/fish-rs/optimized/1f6psxxy03bde21s751lsgfn2.ll index 258f16bda85..8b7fe24bd48 100644 --- a/bench/fish-rs/optimized/1f6psxxy03bde21s751lsgfn2.ll +++ b/bench/fish-rs/optimized/1f6psxxy03bde21s751lsgfn2.ll @@ -32670,12 +32670,10 @@ define internal fastcc void @_ZN4fish6reader10ReaderData39update_command_line_fr %12 = getelementptr inbounds nuw i8, ptr %0, i64 2056 %13 = load i8, ptr %12, align 8, !range !701, !noundef !12 store i8 2, ptr %12, align 8 - switch i8 %13, label %15 [ - i8 2, label %_ZN4fish6reader10ReaderData4undo17h9871b0e9ecb827f2E.exit - i8 0, label %_ZN4fish6reader10ReaderData4undo17h9871b0e9ecb827f2E.exit - ] + %switch = icmp eq i8 %13, 1 + br i1 %switch, label %15, label %_ZN4fish6reader10ReaderData4undo17h9871b0e9ecb827f2E.exit -_ZN4fish6reader10ReaderData4undo17h9871b0e9ecb827f2E.exit: ; preds = %_ZN4fish6reader10ReaderData20command_line_changed17hab8cd0d8e9d09f3bE.exit, %15, %11, %11 +_ZN4fish6reader10ReaderData4undo17h9871b0e9ecb827f2E.exit: ; preds = %_ZN4fish6reader10ReaderData20command_line_changed17hab8cd0d8e9d09f3bE.exit, %15, %11 %14 = call noundef zeroext i1 @_ZN4fish21reader_history_search19ReaderHistorySearch13is_at_present17hfd36c929674d6a8fE(ptr noalias noundef nonnull readonly align 8 dereferenceable(296) %8) br i1 %14, label %100, label %34 diff --git a/bench/fish-rs/optimized/5ye1mo2u4ysuvagkwwbw91k2n.ll b/bench/fish-rs/optimized/5ye1mo2u4ysuvagkwwbw91k2n.ll index c877c6fa5d7..35929b12eb6 100644 --- a/bench/fish-rs/optimized/5ye1mo2u4ysuvagkwwbw91k2n.ll +++ b/bench/fish-rs/optimized/5ye1mo2u4ysuvagkwwbw91k2n.ll @@ -8360,8 +8360,9 @@ define hidden void @_ZN4core5slice4sort6stable5drift4sort17hc78928df1a23c431E(pt br i1 %48, label %49, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit51" 49: ; preds = %30 - %switch135 = icmp eq i8 %45, 1 - br i1 %switch135, label %.preheader, label %.preheader71 + %.off135 = add nsw i8 %45, -1 + %switch136 = icmp ult i8 %.off135, -2 + br i1 %switch136, label %.preheader, label %.preheader71 "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit51": ; preds = %30 %50 = icmp eq i8 %45, -1 @@ -8405,7 +8406,8 @@ define hidden void @_ZN4core5slice4sort6stable5drift4sort17hc78928df1a23c431E(pt br i1 %67, label %68, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit46" 68: ; preds = %.lr.ph - %switch = icmp eq i8 %64, 1 + %.off = add nsw i8 %64, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %_ZN4core5slice4sort6shared17find_existing_run17hcba01c2549241d21E.exit.i, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit46.thread" "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit46": ; preds = %.lr.ph @@ -8447,7 +8449,8 @@ define hidden void @_ZN4core5slice4sort6stable5drift4sort17hc78928df1a23c431E(pt br i1 %87, label %88, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit" 88: ; preds = %.lr.ph86 - %switch67 = icmp eq i8 %84, 1 + %.off66 = add nsw i8 %84, -1 + %switch67 = icmp ult i8 %.off66, -2 br i1 %switch67, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit.thread56", label %_ZN4core5slice4sort6shared17find_existing_run17hcba01c2549241d21E.exit.i "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit": ; preds = %.lr.ph86 @@ -9457,8 +9460,9 @@ define hidden void @_ZN4core5slice4sort6stable5drift4sort17hdfd5cacac41c0a25E(pt br i1 %38, label %39, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit49" 39: ; preds = %30 - %switch124 = icmp eq i8 %35, 1 - br i1 %switch124, label %.preheader, label %.preheader69 + %.off124 = add nsw i8 %35, -1 + %switch125 = icmp ult i8 %.off124, -2 + br i1 %switch125, label %.preheader, label %.preheader69 "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit49": ; preds = %30 %40 = icmp eq i8 %35, -1 @@ -9496,7 +9500,8 @@ define hidden void @_ZN4core5slice4sort6stable5drift4sort17hdfd5cacac41c0a25E(pt br i1 %52, label %53, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit45" 53: ; preds = %.lr.ph - %switch = icmp eq i8 %49, 1 + %.off = add nsw i8 %49, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %_ZN4core5slice4sort6shared17find_existing_run17h9086e28cd8b1a6d1E.exit.i, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit45.thread" "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit45": ; preds = %.lr.ph @@ -9532,7 +9537,8 @@ define hidden void @_ZN4core5slice4sort6stable5drift4sort17hdfd5cacac41c0a25E(pt br i1 %67, label %68, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit" 68: ; preds = %.lr.ph84 - %switch65 = icmp eq i8 %64, 1 + %.off64 = add nsw i8 %64, -1 + %switch65 = icmp ult i8 %.off64, -2 br i1 %switch65, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit.thread54", label %_ZN4core5slice4sort6shared17find_existing_run17h9086e28cd8b1a6d1E.exit.i "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit": ; preds = %.lr.ph84 @@ -15236,7 +15242,8 @@ define void @_ZN4core5slice4sort6stable9quicksort9quicksort17hc2120fd1309a4109E( br i1 %38, label %39, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit" 39: ; preds = %22 - %switch = icmp eq i8 %35, 1 + %.off = add nsw i8 %35, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %.critedge, label %.critedge31 "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit": ; preds = %22 @@ -15933,7 +15940,8 @@ define void @_ZN4core5slice4sort6stable9quicksort9quicksort17hd2bad006453cc30eE( br i1 %28, label %29, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit" 29: ; preds = %22 - %switch = icmp eq i8 %25, 1 + %.off = add nsw i8 %25, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %.critedge, label %.critedge31 "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit": ; preds = %22 diff --git a/bench/fish-rs/optimized/87c4l3sw5gd0mi55puarpe5kb.ll b/bench/fish-rs/optimized/87c4l3sw5gd0mi55puarpe5kb.ll index 3f810bf1d36..b1fa0f110fc 100644 --- a/bench/fish-rs/optimized/87c4l3sw5gd0mi55puarpe5kb.ll +++ b/bench/fish-rs/optimized/87c4l3sw5gd0mi55puarpe5kb.ll @@ -2748,7 +2748,8 @@ define internal fastcc noundef nonnull ptr @_ZN4core5slice4sort6shared5pivot11me br i1 %34, label %35, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit26" 35: ; preds = %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit" - %switch = icmp eq i8 %31, 1 + %.off = add nsw i8 %31, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %36, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit26.thr_comm" 36: ; preds = %35 @@ -3548,7 +3549,8 @@ define internal fastcc noundef nonnull ptr @_ZN4core5slice4sort6shared5pivot11me br i1 %54, label %55, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit27" 55: ; preds = %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit" - %switch = icmp eq i8 %51, 1 + %.off = add nsw i8 %51, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %56, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit27.thr_comm" 56: ; preds = %55 @@ -4414,7 +4416,8 @@ define hidden noundef range(i64 0, 768614336404564651) i64 @_ZN4core5slice4sort6 br i1 %27, label %28, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit19" 28: ; preds = %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit" - %switch = icmp eq i8 %24, 1 + %.off = add nsw i8 %24, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %29, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit19.thr_comm" 29: ; preds = %28 @@ -5307,7 +5310,8 @@ define hidden noundef range(i64 0, 768614336404564651) i64 @_ZN4core5slice4sort6 br i1 %46, label %47, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit20" 47: ; preds = %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit" - %switch = icmp eq i8 %43, 1 + %.off = add nsw i8 %43, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %48, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit20.thr_comm" 48: ; preds = %47 @@ -6089,7 +6093,8 @@ define internal fastcc void @_ZN4core5slice4sort6shared9smallsort11insert_tail17 br i1 %23, label %24, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit" 24: ; preds = %2 - %switch = icmp eq i8 %20, 1 + %.off = add nsw i8 %20, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit.thread2", label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit.thread" "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit": ; preds = %2 @@ -6157,7 +6162,8 @@ define internal fastcc void @_ZN4core5slice4sort6shared9smallsort11insert_tail17 br i1 %48, label %49, label %52 49: ; preds = %.noexc22 - %switch6 = icmp eq i8 %45, 1 + %.off5 = add nsw i8 %45, -1 + %switch6 = icmp ult i8 %.off5, -2 br i1 %switch6, label %52, label %.thread 50: ; preds = %.noexc21, %.noexc, %33 @@ -6577,7 +6583,8 @@ define internal fastcc void @_ZN4core5slice4sort6shared9smallsort11insert_tail17 br i1 %13, label %14, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit" 14: ; preds = %2 - %switch = icmp eq i8 %10, 1 + %.off = add nsw i8 %10, -1 + %switch = icmp ult i8 %.off, -2 br i1 %switch, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit.thread2", label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit.thread" "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit": ; preds = %2 @@ -6628,7 +6635,8 @@ define internal fastcc void @_ZN4core5slice4sort6shared9smallsort11insert_tail17 br i1 %29, label %30, label %33 30: ; preds = %.noexc - %switch6 = icmp eq i8 %26, 1 + %.off5 = add nsw i8 %26, -1 + %switch6 = icmp ult i8 %.off5, -2 br i1 %switch6, label %33, label %.thread 31: ; preds = %23 @@ -13491,7 +13499,8 @@ _ZN4core5slice4sort6shared9smallsort19bidirectional_merge17hde81caa990211398E.ex br i1 %139, label %140, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit.i35" 140: ; preds = %.noexc39 - %switch.i = icmp eq i8 %136, 1 + %.off.i = add nsw i8 %136, -1 + %switch.i = icmp ult i8 %.off.i, -2 br i1 %switch.i, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit.thread2.i", label %_ZN4core5slice4sort6shared9smallsort11insert_tail17h5994809514df6c7aE.exit "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hfcb01dcdd360dd94E.exit.i35": ; preds = %.noexc39 @@ -13552,7 +13561,8 @@ _ZN4core5slice4sort6shared9smallsort19bidirectional_merge17hde81caa990211398E.ex br i1 %160, label %161, label %164 161: ; preds = %.noexc22.i - %switch6.i = icmp eq i8 %157, 1 + %.off5.i = add nsw i8 %157, -1 + %switch6.i = icmp ult i8 %.off5.i, -2 br i1 %switch6.i, label %164, label %.thread.i 162: ; preds = %.noexc21.i, %.noexc.i, %145 @@ -13857,7 +13867,8 @@ _ZN4core5slice4sort6shared9smallsort19bidirectional_merge17h118749a928c52695E.ex br i1 %110, label %111, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit.i30" 111: ; preds = %.noexc32 - %switch.i = icmp eq i8 %107, 1 + %.off.i = add nsw i8 %107, -1 + %switch.i = icmp ult i8 %.off.i, -2 br i1 %switch.i, label %"_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit.thread2.i", label %_ZN4core5slice4sort6shared9smallsort11insert_tail17hb072bce9df6fe697E.exit "_ZN5alloc5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$7sort_by28_$u7b$$u7b$closure$u7d$$u7d$17hdde7293461716594E.exit.i30": ; preds = %.noexc32 @@ -13901,7 +13912,8 @@ _ZN4core5slice4sort6shared9smallsort19bidirectional_merge17h118749a928c52695E.ex br i1 %122, label %123, label %126 123: ; preds = %.noexc.i - %switch6.i = icmp eq i8 %119, 1 + %.off5.i = add nsw i8 %119, -1 + %switch6.i = icmp ult i8 %.off5.i, -2 br i1 %switch6.i, label %126, label %.thread.i 124: ; preds = %116 diff --git a/bench/fmt/optimized/format-impl-test.ll b/bench/fmt/optimized/format-impl-test.ll index ff24bc4eb12..371083a5d88 100644 --- a/bench/fmt/optimized/format-impl-test.ll +++ b/bench/fmt/optimized/format-impl-test.ll @@ -44328,13 +44328,11 @@ define linkonce_odr hidden ptr @_ZN3fmt3v116detail5writeIcNS0_14basic_appenderIc %7 = load i32, ptr %2, align 4, !tbaa !337 %8 = trunc i32 %7 to i8 %9 = and i8 %8, 7 - switch i8 %9, label %21 [ - i8 7, label %10 - i8 1, label %10 - i8 0, label %10 - ] + %.off.i = add nsw i8 %9, -2 + %switch.i = icmp ult i8 %.off.i, 5 + br i1 %switch.i, label %20, label %10 -10: ; preds = %4, %4, %4 +10: ; preds = %4 %11 = and i32 %7, 56 %12 = icmp ne i32 %11, 32 %13 = and i32 %7, 11264 @@ -44347,25 +44345,18 @@ define linkonce_odr hidden ptr @_ZN3fmt3v116detail5writeIcNS0_14basic_appenderIc unreachable _ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit: ; preds = %10 - switch i8 %9, label %21 [ - i8 7, label %15 - i8 1, label %15 - i8 0, label %15 - ] - -15: ; preds = %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit - %16 = and i32 %7, 7 - %17 = icmp eq i32 %16, 1 - %18 = zext i1 %17 to i8 + %15 = and i32 %7, 7 + %16 = icmp eq i32 %15, 1 + %17 = zext i1 %16 to i8 call void @llvm.lifetime.start.p0(ptr nonnull %5) - store i8 %18, ptr %5, align 1, !tbaa !372 + store i8 %17, ptr %5, align 1, !tbaa !372 %19 = getelementptr inbounds nuw i8, ptr %5, i64 1 store i8 %1, ptr %19, align 1, !tbaa !374 %20 = call ptr @_ZN3fmt3v116detail12write_paddedIcLNS0_5alignE1ENS0_14basic_appenderIcEERZNS1_10write_charIcS5_EET0_S7_T_RKNS0_12format_specsEEUlS5_E_EET1_SE_SB_mmOT2_(ptr %0, ptr noundef nonnull align 4 dereferenceable(16) %2, i64 noundef 1, i64 noundef 1, ptr noundef nonnull align 1 dereferenceable(2) %5) call void @llvm.lifetime.end.p0(ptr nonnull %5) br label %37 -21: ; preds = %4, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit +21: ; preds = %4 call void @llvm.lifetime.start.p0(ptr nonnull %6) %22 = and i32 %7, 16384 %.not = icmp eq i32 %22, 0 @@ -44384,7 +44375,7 @@ _ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit: ; preds = %10 br label %27 27: ; preds = %._crit_edge, %21 - %28 = phi i32 [ %.pre, %._crit_edge ], [ %7, %21 ] + %28 = phi i32 [ %.pre, %._crit_edge ], [ %7, %20 ] %29 = lshr i32 %28, 10 %30 = and i32 %29, 3 %31 = zext nneg i32 %30 to i64 @@ -44398,12 +44389,12 @@ _ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit: ; preds = %10 br label %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit _ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit: ; preds = %23, %27 - %.sroa.010.0.i = phi ptr [ %36, %27 ], [ %0, %23 ] + %.sroa.010.0.i = phi ptr [ %36, %26 ], [ %0, %22 ] call void @llvm.lifetime.end.p0(ptr nonnull %6) br label %37 -37: ; preds = %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit, %15 - %.sroa.08.0 = phi ptr [ %20, %15 ], [ %.sroa.010.0.i, %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit ] +37: ; preds = %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit + %.sroa.08.0 = phi ptr [ %20, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit ], [ %.sroa.010.0.i, %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit ] ret ptr %.sroa.08.0 } diff --git a/bench/folly/optimized/Compression.ll b/bench/folly/optimized/Compression.ll index 9622f67bb3e..674bd3100b3 100644 --- a/bench/folly/optimized/Compression.ll +++ b/bench/folly/optimized/Compression.ll @@ -3088,12 +3088,9 @@ define internal void @_ZN5folly11compression12_GLOBAL__N_118NoCompressionCodec6c %7 = getelementptr inbounds nuw i8, ptr %6, i64 8 store i32 %2, ptr %7, align 8, !tbaa !73, !noalias !102 store ptr getelementptr inbounds nuw inrange(-16, 96) (i8, ptr @_ZTVN5folly11compression12_GLOBAL__N_118NoCompressionCodecE, i64 16), ptr %6, align 8, !tbaa !7, !noalias !102 - switch i32 %1, label %8 [ - i32 -1, label %_ZNSt10unique_ptrIN5folly11compression12_GLOBAL__N_118NoCompressionCodecESt14default_deleteIS3_EED2Ev.exit - i32 -2, label %_ZNSt10unique_ptrIN5folly11compression12_GLOBAL__N_118NoCompressionCodecESt14default_deleteIS3_EED2Ev.exit - i32 -3, label %_ZNSt10unique_ptrIN5folly11compression12_GLOBAL__N_118NoCompressionCodecESt14default_deleteIS3_EED2Ev.exit - i32 0, label %_ZNSt10unique_ptrIN5folly11compression12_GLOBAL__N_118NoCompressionCodecESt14default_deleteIS3_EED2Ev.exit - ] + %.off.i.i = add i32 %1, -1 + %switch.i.i = icmp ult i32 %.off.i.i, -4 + br i1 %switch.i.i, label %8, label %_ZNSt10unique_ptrIN5folly11compression12_GLOBAL__N_118NoCompressionCodecESt14default_deleteIS3_EED2Ev.exit 8: ; preds = %3 %9 = tail call ptr @__cxa_allocate_exception(i64 16) #31, !noalias !102 @@ -3148,7 +3145,7 @@ _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit.i.i: ; preds = %1 call void @_ZdlPvm(ptr noundef nonnull %6, i64 noundef 16) #32, !noalias !102 resume { ptr, i32 } %eh.lpad-body.i -_ZNSt10unique_ptrIN5folly11compression12_GLOBAL__N_118NoCompressionCodecESt14default_deleteIS3_EED2Ev.exit: ; preds = %3, %3, %3, %3 +_ZNSt10unique_ptrIN5folly11compression12_GLOBAL__N_118NoCompressionCodecESt14default_deleteIS3_EED2Ev.exit: ; preds = %3 call void @llvm.lifetime.end.p0(ptr nonnull %4), !noalias !102 store ptr %6, ptr %0, align 8, !tbaa !107 ret void diff --git a/bench/folly/optimized/HugePages.ll b/bench/folly/optimized/HugePages.ll index 942db8c17e7..12484e0789d 100644 --- a/bench/folly/optimized/HugePages.ll +++ b/bench/folly/optimized/HugePages.ll @@ -67686,31 +67686,24 @@ _ZN5folly16getHugePageSizesEv.exit: ; preds = %1, %4, %7 %.not13 = icmp eq ptr %11, %12 br i1 %.not13, label %._crit_edge, label %.lr.ph -.lr.ph: ; preds = %_ZN5folly16getHugePageSizesEv.exit, %19 - %.015 = phi ptr [ %.2, %19 ], [ undef, %_ZN5folly16getHugePageSizesEv.exit ] - %.sroa.010.014 = phi ptr [ %20, %19 ], [ %11, %_ZN5folly16getHugePageSizesEv.exit ] - %13 = getelementptr inbounds nuw i8, ptr %.sroa.010.014, i64 16 - %14 = load i64, ptr %13, align 8, !tbaa !18 - %15 = icmp eq i64 %14, 0 - %16 = getelementptr inbounds nuw i8, ptr %.sroa.010.014, i64 40 - %17 = load i64, ptr %16, align 8 - %18 = icmp eq i64 %0, %17 - %. = zext i1 %18 to i32 - %..0 = select i1 %18, ptr %.sroa.010.014, ptr %.015 - %.19 = select i1 %15, i32 3, i32 %. - %.2 = select i1 %15, ptr %.015, ptr %..0 - switch i32 %.19, label %._crit_edge [ - i32 0, label %19 - i32 3, label %19 - ] - -19: ; preds = %.lr.ph, %.lr.ph - %20 = getelementptr inbounds nuw i8, ptr %.sroa.010.014, i64 48 +19: ; preds = %.lr.ph + %20 = getelementptr inbounds nuw i8, ptr %.sroa.011.015, i64 48 %.not = icmp eq ptr %20, %12 br i1 %.not, label %._crit_edge, label %.lr.ph -._crit_edge: ; preds = %.lr.ph, %19, %_ZN5folly16getHugePageSizesEv.exit - %spec.select = phi ptr [ null, %_ZN5folly16getHugePageSizesEv.exit ], [ null, %19 ], [ %.2, %.lr.ph ] +._crit_edge: ; preds = %_ZN5folly16getHugePageSizesEv.exit, %13 + %spec.select = phi ptr [ %14, %13 ], [ %11, %_ZN5folly16getHugePageSizesEv.exit ] + %15 = getelementptr inbounds nuw i8, ptr %.sroa.011.015, i64 16 + %16 = load i64, ptr %15, align 8, !tbaa !18 + %17 = icmp ne i64 %16, 0 + %18 = getelementptr inbounds nuw i8, ptr %.sroa.011.015, i64 40 + %19 = load i64, ptr %18, align 8 + %20 = icmp eq i64 %0, %19 + %21 = select i1 %17, i1 %20, i1 false + br i1 %21, label %._crit_edge, label %13 + +._crit_edge: ; preds = %13, %.lr.ph, %_ZN5folly16getHugePageSizesEv.exit + %spec.select = phi ptr [ null, %_ZN5folly16getHugePageSizesEv.exit ], [ %.sroa.011.015, %.lr.ph ], [ null, %13 ] ret ptr %spec.select } diff --git a/bench/foundations-rs/optimized/agembse9dg8uescyvfjii0ohk.ll b/bench/foundations-rs/optimized/agembse9dg8uescyvfjii0ohk.ll index 55b25109402..69177b7acba 100644 --- a/bench/foundations-rs/optimized/agembse9dg8uescyvfjii0ohk.ll +++ b/bench/foundations-rs/optimized/agembse9dg8uescyvfjii0ohk.ll @@ -17048,20 +17048,16 @@ define hidden { i64, ptr } @"_ZN95_$LT$tokio_io_timeout..TimeoutWriter$LT$W$GT$$ %34 = landingpad { ptr, i32 } cleanup %35 = load i64, ptr %5, align 8, !range !29, !alias.scope !2357, !noundef !7 - switch i64 %35, label %36 [ - i64 2, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" - i64 0, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" - ] + %switch.i = icmp eq i64 %35, 1 + br i1 %switch.i, label %36, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" 36: ; preds = %33 invoke void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17h39ce46b790451054E"(ptr noalias noundef nonnull align 8 dereferenceable(8) %10) to label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" unwind label %47 _ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit: ; preds = %.noexc11 - switch i64 %.pre16, label %37 [ - i64 2, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" - i64 0, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" - ] + %switch.i13 = icmp eq i64 %.pre16, 1 + br i1 %switch.i13, label %37, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" 37: ; preds = %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit call void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17h39ce46b790451054E"(ptr noalias noundef nonnull align 8 dereferenceable(8) %10) @@ -17072,9 +17068,9 @@ _ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread: %39 = load ptr, ptr %10, align 8 br label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" -"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13": ; preds = %37, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread - %.sroa.3.0 = phi ptr [ %39, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ inttoptr (i64 94489280515 to ptr), %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ inttoptr (i64 94489280515 to ptr), %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ inttoptr (i64 94489280515 to ptr), %37 ] - %.sroa.0.0 = phi i64 [ %38, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ 1, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ 1, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ 1, %37 ] +"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13": ; preds = %37, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread + %.sroa.3.0 = phi ptr [ %39, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ inttoptr (i64 94489280515 to ptr), %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ inttoptr (i64 94489280515 to ptr), %37 ] + %.sroa.0.0 = phi i64 [ %38, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ 1, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ 1, %37 ] call void @llvm.lifetime.end.p0(ptr nonnull %5) %40 = insertvalue { i64, ptr } poison, i64 %.sroa.0.0, 0 %41 = insertvalue { i64, ptr } %40, ptr %.sroa.3.0, 1 @@ -17101,7 +17097,7 @@ _ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread: call void @_ZN4core9panicking16panic_in_cleanup17hccd47ddd364deb23E() #29 unreachable -"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit": ; preds = %33, %33, %36 +"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit": ; preds = %33, %36 resume { ptr, i32 } %34 } @@ -17290,20 +17286,16 @@ define hidden { i64, ptr } @"_ZN95_$LT$tokio_io_timeout..TimeoutWriter$LT$W$GT$$ %34 = landingpad { ptr, i32 } cleanup %35 = load i64, ptr %5, align 8, !range !29, !alias.scope !2369, !noundef !7 - switch i64 %35, label %36 [ - i64 2, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" - i64 0, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" - ] + %switch.i = icmp eq i64 %35, 1 + br i1 %switch.i, label %36, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" 36: ; preds = %33 invoke void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17h39ce46b790451054E"(ptr noalias noundef nonnull align 8 dereferenceable(8) %10) to label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit" unwind label %47 _ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit: ; preds = %.noexc11 - switch i64 %.pre16, label %37 [ - i64 2, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" - i64 0, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" - ] + %switch.i13 = icmp eq i64 %.pre16, 1 + br i1 %switch.i13, label %37, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" 37: ; preds = %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit call void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17h39ce46b790451054E"(ptr noalias noundef nonnull align 8 dereferenceable(8) %10) @@ -17314,9 +17306,9 @@ _ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread: %39 = load ptr, ptr %10, align 8 br label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13" -"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13": ; preds = %37, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread - %.sroa.3.0 = phi ptr [ %39, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ inttoptr (i64 94489280515 to ptr), %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ inttoptr (i64 94489280515 to ptr), %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ inttoptr (i64 94489280515 to ptr), %37 ] - %.sroa.0.0 = phi i64 [ %38, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ 1, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ 1, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ 1, %37 ] +"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit13": ; preds = %37, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread + %.sroa.3.0 = phi ptr [ %39, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ inttoptr (i64 94489280515 to ptr), %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ inttoptr (i64 94489280515 to ptr), %37 ] + %.sroa.0.0 = phi i64 [ %38, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread ], [ 1, %_ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit ], [ 1, %37 ] call void @llvm.lifetime.end.p0(ptr nonnull %5) %40 = insertvalue { i64, ptr } poison, i64 %.sroa.0.0, 0 %41 = insertvalue { i64, ptr } %40, ptr %.sroa.3.0, 1 @@ -17343,7 +17335,7 @@ _ZN16tokio_io_timeout12TimeoutState10poll_check17h9a410ac6ab0831adE.exit.thread: call void @_ZN4core9panicking16panic_in_cleanup17hccd47ddd364deb23E() #29 unreachable -"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit": ; preds = %33, %33, %36 +"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h757dc58cde96af97E.exit": ; preds = %33, %36 resume { ptr, i32 } %34 } diff --git a/bench/g2o/optimized/filesys_tools.ll b/bench/g2o/optimized/filesys_tools.ll index bb50eb5fa85..0aeb00a26e6 100644 --- a/bench/g2o/optimized/filesys_tools.ll +++ b/bench/g2o/optimized/filesys_tools.ll @@ -2125,16 +2125,12 @@ define noundef zeroext i1 @_ZN3g2o10fileExistsESt17basic_string_viewIcSt11char_t %10 = icmp ne i64 %9, 0 %11 = icmp ne i64 %9, 255 %.not5.not7 = and i1 %10, %11 - br i1 %2, label %switch.early.test, label %16 + %.off = add nsw i64 %9, -1 + %switch = icmp ult i64 %.off, 254 + %or.cond = select i1 %2, i1 %switch, i1 false + br i1 %or.cond, label %12, label %16 switch.early.test: ; preds = %8 - %trunc = trunc i64 %7 to i8 - switch i8 %trunc, label %12 [ - i8 -1, label %16 - i8 0, label %16 - ] - -12: ; preds = %switch.early.test %13 = invoke i64 @_ZNSt10filesystem6statusERKNS_7__cxx114pathE(ptr noundef nonnull align 8 dereferenceable(40) %5) to label %_ZNSt10filesystem15is_regular_fileERKNS_7__cxx114pathE.exit unwind label %26 @@ -2143,8 +2139,8 @@ _ZNSt10filesystem15is_regular_fileERKNS_7__cxx114pathE.exit: ; preds = %12 %15 = icmp eq i64 %14, 1 br label %16 -16: ; preds = %switch.early.test, %switch.early.test, %8, %_ZNSt10filesystem15is_regular_fileERKNS_7__cxx114pathE.exit - %17 = phi i1 [ %.not5.not7, %switch.early.test ], [ %15, %_ZNSt10filesystem15is_regular_fileERKNS_7__cxx114pathE.exit ], [ %.not5.not7, %8 ], [ %.not5.not7, %switch.early.test ] +16: ; preds = %8, %_ZNSt10filesystem15is_regular_fileERKNS_7__cxx114pathE.exit + %17 = phi i1 [ %15, %_ZNSt10filesystem15is_regular_fileERKNS_7__cxx114pathE.exit ], [ %.not5.not7, %8 ] %18 = getelementptr inbounds nuw i8, ptr %5, i64 32 %19 = load ptr, ptr %18, align 8, !tbaa !22 %.not.i.i.i = icmp eq ptr %19, null diff --git a/bench/git/optimized/merge-ort.ll b/bench/git/optimized/merge-ort.ll index 3e2c7d7ba13..d26da6dcf50 100644 --- a/bench/git/optimized/merge-ort.ll +++ b/bench/git/optimized/merge-ort.ll @@ -1640,7 +1640,7 @@ strmap_get_size.exit.i.i: ; preds = %110 br label %129 129: ; preds = %150, %.lr.ph185.i.i - %.0108182.i.i = phi ptr [ %124, %.lr.ph185.i.i ], [ %151, %150 ] + %.0108182.i.i = phi ptr [ %124, %.lr.ph186.i.i ], [ %151, %150 ] %130 = getelementptr inbounds nuw i8, ptr %.0108182.i.i, i64 16 %131 = load ptr, ptr %130, align 8, !tbaa !32 %132 = call i32 @strmap_contains(ptr noundef nonnull %126, ptr noundef %131) #19 @@ -1715,8 +1715,8 @@ strmap_get_size.exit.i.i: ; preds = %110 br label %159 159: ; preds = %264, %.lr.ph198.i.i - %.1109196.i.i = phi ptr [ %157, %.lr.ph198.i.i ], [ %265, %264 ] - %.1117195.i.i = phi i32 [ %.0116207.i.i, %.lr.ph198.i.i ], [ %.2118.ph.i.i, %264 ] + %.1109196.i.i = phi ptr [ %157, %.lr.ph199.i.i ], [ %265, %264 ] + %.1117195.i.i = phi i32 [ %.0116207.i.i, %.lr.ph199.i.i ], [ %.2118.ph.i.i, %264 ] %160 = getelementptr inbounds nuw i8, ptr %.1109196.i.i, i64 16 %161 = load ptr, ptr %160, align 8, !tbaa !32 %162 = getelementptr inbounds nuw i8, ptr %.1109196.i.i, i64 24 @@ -1842,12 +1842,11 @@ strmap_get_size.exit.i.i: ; preds = %110 %225 = and i8 %223, -8 %226 = or disjoint i8 %225, %224 store i8 %226, ptr %122, align 8 - switch i8 %224, label %229 [ - i8 0, label %227 - i8 7, label %227 - ] + %.off.i.i = add nsw i8 %224, -1 + %switch146.i.i = icmp ult i8 %.off.i.i, 6 + br i1 %switch146.i.i, label %229, label %227 -227: ; preds = %215, %215 +227: ; preds = %215 %228 = call i32 @traverse_trees(ptr noundef null, i32 noundef 3, ptr noundef nonnull %27, ptr noundef nonnull %30) #19 br label %traverse_trees_wrapper.exit.i.i @@ -1933,7 +1932,7 @@ traverse_trees_wrapper.exit.i.i: ; preds = %._crit_edge.i.i.i, br i1 %.not141.i.i, label %._crit_edge199.i.i, label %159, !llvm.loop !177 ._crit_edge199.i.i: ; preds = %264, %._crit_edge186.i.i - %.1117.lcssa.i.i = phi i32 [ %.0116207.i.i, %._crit_edge186.i.i ], [ %.2118.ph.i.i, %264 ] + %.1117.lcssa.i.i = phi i32 [ %.0116207.i.i, %._crit_edge187.i.i ], [ %.2118.ph.i.i, %264 ] call void @strmap_clear(ptr noundef nonnull %26, i32 noundef 0) #19 call void @hashmap_iter_init(ptr noundef nonnull %152, ptr noundef nonnull %25) #19 %266 = call ptr @hashmap_iter_next(ptr noundef nonnull %25) #19 @@ -1941,7 +1940,7 @@ traverse_trees_wrapper.exit.i.i: ; preds = %._crit_edge.i.i.i, br i1 %.not142201.i.i, label %._crit_edge205.i.i, label %.lr.ph204.i.i .lr.ph204.i.i: ; preds = %._crit_edge199.i.i, %.lr.ph204.i.i - %.2110202.i.i = phi ptr [ %288, %.lr.ph204.i.i ], [ %266, %._crit_edge199.i.i ] + %.2110202.i.i = phi ptr [ %288, %.lr.ph205.i.i ], [ %266, %._crit_edge200.i.i ] %267 = getelementptr inbounds nuw i8, ptr %.2110202.i.i, i64 16 %268 = load ptr, ptr %267, align 8, !tbaa !32 %269 = load ptr, ptr %56, align 8, !tbaa !118 @@ -5552,12 +5551,11 @@ st_add.exit221: ; preds = %st_add.exit store ptr %77, ptr %13, align 8, !tbaa !148 %361 = load i8, ptr %15, align 8 %362 = and i8 %361, 7 - switch i8 %362, label %365 [ - i8 0, label %363 - i8 7, label %363 - ] + %.off = add nsw i8 %362, -1 + %switch = icmp ult i8 %.off, 6 + br i1 %switch, label %365, label %363 -363: ; preds = %.thread245, %.thread245 +363: ; preds = %.thread245 %364 = call i32 @traverse_trees(ptr noundef null, i32 noundef 3, ptr noundef nonnull %7, ptr noundef nonnull %6) #19 br label %367 diff --git a/bench/git/optimized/xpatience.ll b/bench/git/optimized/xpatience.ll index 45ffc270061..894f13a730e 100644 --- a/bench/git/optimized/xpatience.ll +++ b/bench/git/optimized/xpatience.ll @@ -318,10 +318,9 @@ insert_record.exit.i.thread: ; preds = %.lr.ph.i.i %.04161.i = phi i32 [ %.142.i, %157 ], [ 0, %122 ] %123 = getelementptr inbounds nuw i8, ptr %.03963.i, i64 16 %124 = load i64, ptr %123, align 8, !tbaa !34 - switch i64 %124, label %125 [ - i64 0, label %157 - i64 -1, label %157 - ] + %.off.i = add i64 %124, -1 + %switch.i = icmp ult i64 %.off.i, -2 + br i1 %switch.i, label %125, label %157 125: ; preds = %.lr.ph.i %126 = icmp sgt i32 %.04161.i, 0 @@ -384,9 +383,9 @@ binary_search.exit.thread.i: ; preds = %125, %139, %binary_ %spec.select.i = add nsw i32 %.04161.i, %156 br label %157 -157: ; preds = %154, %152, %binary_search.exit.thread.i, %.lr.ph.i, %.lr.ph.i - %.142.i = phi i32 [ %.04161.i, %binary_search.exit.thread.i ], [ %153, %152 ], [ %.04161.i, %.lr.ph.i ], [ %.04161.i, %.lr.ph.i ], [ %spec.select.i, %154 ] - %.1.i = phi i32 [ %.062.i, %binary_search.exit.thread.i ], [ %145, %152 ], [ %.062.i, %.lr.ph.i ], [ %.062.i, %.lr.ph.i ], [ %.062.i, %154 ] +157: ; preds = %154, %152, %binary_search.exit.thread.i, %.lr.ph.i + %.142.i = phi i32 [ %.04161.i, %binary_search.exit.thread.i ], [ %153, %152 ], [ %.04161.i, %.lr.ph.i ], [ %spec.select.i, %154 ] + %.1.i = phi i32 [ %.062.i, %binary_search.exit.thread.i ], [ %145, %152 ], [ %.062.i, %.lr.ph.i ], [ %.062.i, %154 ] %158 = getelementptr inbounds nuw i8, ptr %.03963.i, i64 24 %.039.i = load ptr, ptr %158, align 8, !tbaa !49 %.not50.i = icmp eq ptr %.039.i, null diff --git a/bench/graphviz/optimized/gvrender_core_svg.ll b/bench/graphviz/optimized/gvrender_core_svg.ll index 975d41ec0dc..9df9493d8cd 100644 --- a/bench/graphviz/optimized/gvrender_core_svg.ll +++ b/bench/graphviz/optimized/gvrender_core_svg.ll @@ -1364,10 +1364,9 @@ define internal fastcc void @svg_grstyle(ptr noundef %0, i32 noundef %1, i32 nou 28: ; preds = %23 %29 = getelementptr inbounds nuw i8, ptr %5, i64 75 %30 = load i8, ptr %29, align 1, !tbaa !46 - switch i8 %30, label %31 [ - i8 0, label %36 - i8 -1, label %36 - ] + %.off = add i8 %30, -1 + %switch = icmp ult i8 %.off, -2 + br i1 %switch, label %31, label %36 31: ; preds = %28 %32 = uitofp i8 %30 to double @@ -1379,7 +1378,7 @@ define internal fastcc void @svg_grstyle(ptr noundef %0, i32 noundef %1, i32 nou %35 = tail call i32 @gvputs(ptr noundef nonnull %0, ptr noundef nonnull @.str.112) #11 br label %36 -36: ; preds = %28, %28, %22, %23, %31, %34, %14 +36: ; preds = %28, %22, %23, %31, %34, %14 %37 = tail call i32 @gvputs(ptr noundef nonnull %0, ptr noundef nonnull @.str.113) #11 %38 = getelementptr inbounds nuw i8, ptr %5, i64 32 tail call fastcc void @svg_print_paint(ptr noundef nonnull %0, ptr noundef nonnull byval(%struct.color_s) align 8 %38) @@ -1421,10 +1420,9 @@ define internal fastcc void @svg_grstyle(ptr noundef %0, i32 noundef %1, i32 nou 55: ; preds = %51 %56 = getelementptr inbounds nuw i8, ptr %5, i64 35 %57 = load i8, ptr %56, align 1, !tbaa !46 - switch i8 %57, label %58 [ - i8 0, label %61 - i8 -1, label %61 - ] + %.off54 = add i8 %57, -1 + %switch55 = icmp ult i8 %.off54, -2 + br i1 %switch55, label %58, label %61 58: ; preds = %55 %59 = uitofp i8 %57 to double @@ -1432,7 +1430,7 @@ define internal fastcc void @svg_grstyle(ptr noundef %0, i32 noundef %1, i32 nou tail call void (ptr, ptr, ...) @gvprintf(ptr noundef nonnull %0, ptr noundef nonnull @.str.116, double noundef %60) #11 br label %61 -61: ; preds = %55, %55, %58, %51 +61: ; preds = %55, %58, %51 %62 = tail call i32 @gvputc(ptr noundef nonnull %0, i32 noundef 34) #11 ret void } diff --git a/bench/graphviz/optimized/node.ll b/bench/graphviz/optimized/node.ll index b69d59365a2..d751e8be2e5 100644 --- a/bench/graphviz/optimized/node.ll +++ b/bench/graphviz/optimized/node.ll @@ -1464,10 +1464,10 @@ node_set_get_capacity.exit: ; preds = %2 unreachable 20: ; preds = %.thread79, %13 - %21 = phi i64 [ 1024, %.thread79 ], [ %16, %13 ] - %22 = phi i64 [ 10, %.thread79 ], [ %15, %13 ] - %23 = phi ptr [ %12, %.thread79 ], [ %8, %13 ] - %24 = phi i64 [ 0, %.thread79 ], [ %14, %13 ] + %21 = phi i64 [ 1024, %.thread80 ], [ %16, %13 ] + %22 = phi i64 [ 10, %.thread80 ], [ %15, %13 ] + %23 = phi ptr [ %12, %.thread80 ], [ %8, %13 ] + %24 = phi i64 [ 0, %.thread80 ], [ %14, %13 ] %25 = tail call noalias ptr @calloc(i64 noundef %21, i64 noundef 8) #20 %26 = icmp eq ptr %25, null br i1 %26, label %27, label %gv_calloc.exit @@ -1508,16 +1508,15 @@ gv_calloc.exit: ; preds = %20 %36 = getelementptr inbounds nuw ptr, ptr %35, i64 %.04960 %37 = load ptr, ptr %36, align 8, !tbaa !30 %magicptr = ptrtoint ptr %37 to i64 - switch i64 %magicptr, label %38 [ - i64 0, label %39 - i64 -1, label %39 - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %38, label %39 38: ; preds = %.lr.ph call void @node_set_add(ptr noundef nonnull %3, ptr noundef nonnull %37) br label %39 -39: ; preds = %.lr.ph, %.lr.ph, %38 +39: ; preds = %.lr.ph, %38 %40 = add nuw i64 %.04960, 1 %exitcond.not = icmp eq i64 %40, %24 br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !67 @@ -1565,33 +1564,32 @@ node_set_get_capacity.exit58: ; preds = %60 %64 = load i64, ptr %63, align 8, !tbaa !29 %65 = shl nuw i64 1, %64 %66 = add i64 %65, -1 - br label %67 - -67: ; preds = %node_set_get_capacity.exit58, %72 - %.04863 = phi i64 [ 0, %node_set_get_capacity.exit58 ], [ %73, %72 ] - %68 = add i64 %.04863, %49 - %69 = and i64 %68, %66 - %70 = getelementptr inbounds nuw ptr, ptr %61, i64 %69 - %71 = load ptr, ptr %70, align 8, !tbaa !30 - %magicptr55 = ptrtoint ptr %71 to i64 - switch i64 %magicptr55, label %72 [ - i64 0, label %76 - i64 -1, label %76 - ] - -72: ; preds = %67 - %73 = add nuw i64 %.04863, 1 - %exitcond67.not = icmp eq i64 %73, %65 - br i1 %exitcond67.not, label %.critedge57, label %67, !llvm.loop !68 - -.critedge57: ; preds = %72, %60 + br label %69 + +67: ; preds = %69 + %68 = add nuw i64 %.04864, 1 + %exitcond68.not = icmp eq i64 %68, %65 + br i1 %exitcond68.not, label %.critedge57, label %69, !llvm.loop !68 + +69:; preds = %node_set_get_capacity.exit59, %67 + %.04864 = phi i64 [ 0, %node_set_get_capacity.exit59 ], [ %68, %67 ] + %70 = add i64 %.04864, %49 + %71 = and i64 %70, %66 + %72 = getelementptr inbounds nuw ptr, ptr %61, i64 %71 + %73 = load ptr, ptr %72, align 8, !tbaa !30 + %magicptr55 = ptrtoint ptr %73 to i64 + %magicptr55.off = add i64 %magicptr55, -1 + %switch58 = icmp ult i64 %magicptr55.off, -2 + br i1 %switch58, label %67, label %76 + +.critedge57: ; preds = %67, %60 %74 = load ptr, ptr @stderr, align 8, !tbaa !46 %75 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %74, ptr noundef nonnull @.str, ptr noundef nonnull @.str.1, i32 noundef 481) #21 tail call void @abort() #23 unreachable -76: ; preds = %67, %67 - %77 = getelementptr inbounds nuw ptr, ptr %61, i64 %69 +76: ; preds = %69 + %77 = getelementptr inbounds nuw ptr, ptr %61, i64 %71 store ptr %1, ptr %77, align 8, !tbaa !30 %78 = load i64, ptr %42, align 8, !tbaa !53 %79 = add i64 %78, 1 diff --git a/bench/graphviz/optimized/refstr.ll b/bench/graphviz/optimized/refstr.ll index 6d55a5e6bf4..01bfba32d2d 100644 --- a/bench/graphviz/optimized/refstr.ll +++ b/bench/graphviz/optimized/refstr.ll @@ -590,16 +590,15 @@ gv_calloc.exit: ; preds = %21 %36 = getelementptr inbounds nuw ptr, ptr %35, i64 %.04151 %37 = load ptr, ptr %36, align 8, !tbaa !20 %magicptr = ptrtoint ptr %37 to i64 - switch i64 %magicptr, label %38 [ - i64 0, label %39 - i64 -1, label %39 - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %38, label %39 38: ; preds = %.lr.ph call fastcc void @strdict_add(ptr noundef nonnull %3, ptr noundef nonnull %37) br label %39 -39: ; preds = %.lr.ph, %.lr.ph, %38 +39: ; preds = %.lr.ph, %38 %40 = add nuw i64 %.04151, 1 %exitcond.not = icmp eq i64 %40, %25 br i1 %exitcond.not, label %._crit_edge.loopexit, label %.lr.ph, !llvm.loop !33 @@ -614,33 +613,32 @@ gv_calloc.exit: ; preds = %21 %48 = tail call fastcc i64 @strdict_hash(ptr noundef nonnull %45, i1 noundef zeroext %47) %49 = add i64 %44, -1 %50 = load ptr, ptr %0, align 8, !tbaa !23 - br label %51 - -51: ; preds = %41, %56 - %.04054 = phi i64 [ 0, %41 ], [ %57, %56 ] - %52 = add i64 %.04054, %48 - %53 = and i64 %52, %49 - %54 = getelementptr inbounds nuw ptr, ptr %50, i64 %53 - %55 = load ptr, ptr %54, align 8, !tbaa !20 - %magicptr46 = ptrtoint ptr %55 to i64 - switch i64 %magicptr46, label %56 [ - i64 0, label %60 - i64 -1, label %60 - ] - -56: ; preds = %51 - %57 = add nuw i64 %.04054, 1 - %exitcond57.not = icmp eq i64 %57, %44 - br i1 %exitcond57.not, label %.critedge48, label %51, !llvm.loop !34 - -.critedge48: ; preds = %56 + br label %53 + +51: ; preds = %53 + %52 = add nuw i64 %.04055, 1 + %exitcond58.not = icmp eq i64 %52, %44 + br i1 %exitcond58.not, label %.critedge48, label %53, !llvm.loop !34 + +53:; preds = %41, %51 + %.04055 = phi i64 [ 0, %41 ], [ %52, %51 ] + %54 = add i64 %.04055, %48 + %55 = and i64 %54, %49 + %56 = getelementptr inbounds nuw ptr, ptr %50, i64 %55 + %57 = load ptr, ptr %56, align 8, !tbaa !20 + %magicptr46 = ptrtoint ptr %57 to i64 + %magicptr46.off = add i64 %magicptr46, -1 + %switch49 = icmp ult i64 %magicptr46.off, -2 + br i1 %switch49, label %51, label %60 + +.critedge48: ; preds = %51 %58 = load ptr, ptr @stderr, align 8, !tbaa !21 %59 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %58, ptr noundef nonnull @.str.2, ptr noundef nonnull @.str.3, i32 noundef 216) #16 tail call void @abort() #22 unreachable -60: ; preds = %51, %51 - %61 = getelementptr inbounds nuw ptr, ptr %50, i64 %53 +60: ; preds = %53 + %61 = getelementptr inbounds nuw ptr, ptr %50, i64 %55 store ptr %1, ptr %61, align 8, !tbaa !20 %62 = load i64, ptr %43, align 8, !tbaa !29 %63 = add i64 %62, 1 diff --git a/bench/gromacs/optimized/tng_io.ll b/bench/gromacs/optimized/tng_io.ll index d966c2d9aaf..b3491ff106a 100644 --- a/bench/gromacs/optimized/tng_io.ll +++ b/bench/gromacs/optimized/tng_io.ll @@ -19611,10 +19611,9 @@ define range(i32 0, 3) i32 @tng_frame_set_new(ptr noundef %0, i64 noundef %1, i6 36: ; preds = %34 %37 = getelementptr inbounds nuw i8, ptr %0, i64 360 %38 = load i64, ptr %37, align 8, !tbaa !261 - switch i64 %38, label %39 [ - i64 -1, label %137 - i64 0, label %137 - ] + %.off = add i64 %38, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %39, label %137 39: ; preds = %36 %40 = tail call noalias dereferenceable_or_null(120) ptr @malloc(i64 noundef 120) #28 @@ -19748,10 +19747,9 @@ tng_block_destroy.exit: ; preds = %86, %89 103: ; preds = %99 %104 = getelementptr inbounds nuw i8, ptr %0, i64 376 %105 = load i64, ptr %104, align 8, !tbaa !259 - switch i64 %105, label %106 [ - i64 -1, label %134 - i64 0, label %134 - ] + %.off101 = add i64 %105, -1 + %switch102 = icmp ult i64 %.off101, -2 + br i1 %switch102, label %106, label %134 106: ; preds = %103 call fastcc void @tng_block_init(ptr noundef %4) @@ -19804,13 +19802,15 @@ tng_block_destroy.exit: ; preds = %86, %89 %133 = tail call i32 (ptr, ptr, ...) @fprintf(ptr noundef %132, ptr noundef nonnull @.str.31, ptr noundef nonnull @.str.1, i32 noundef 11640) #29 br label %134 -134: ; preds = %103, %103, %99, %127, %131, %129, %95 +134: ; preds = %103, %99, %127, %131, %129, %95 store ptr %6, ptr %5, align 8, !tbaa !137 %135 = load ptr, ptr %7, align 8, !tbaa !138 %136 = tail call i32 @fseeko64(ptr noundef %135, i64 noundef %50, i32 noundef 0) + %.pre.pre.pre = load i64, ptr %24, align 8, !tbaa !186 br label %137 -137: ; preds = %36, %36, %34, %134, %30 +137: ; preds = %36, %34, %134, %30 + %.pre.pre = phi i64 [ %23, %36 ], [ %23, %34 ], [ %.pre.pre.pre, %134 ], [ %23, %30 ] %138 = getelementptr inbounds nuw i8, ptr %0, i64 288 store i64 %1, ptr %138, align 8, !tbaa !128 %139 = getelementptr inbounds nuw i8, ptr %0, i64 296 @@ -19821,36 +19821,29 @@ tng_block_destroy.exit: ; preds = %86, %89 store double -1.000000e+00, ptr %141, align 8, !tbaa !133 %142 = getelementptr inbounds nuw i8, ptr %0, i64 248 %143 = load i64, ptr %142, align 8, !tbaa !195 - switch i64 %143, label %146 [ - i64 -1, label %144 - i64 0, label %144 - ] + %.off103 = add i64 %143, -1 + %switch104 = icmp ult i64 %.off103, -2 + br i1 %switch104, label %145, label %144 -144: ; preds = %137, %137 - %145 = load i64, ptr %24, align 8, !tbaa !186 - store i64 %145, ptr %142, align 8, !tbaa !195 - br label %146 - -146: ; preds = %137, %144 - %147 = getelementptr inbounds nuw i8, ptr %0, i64 264 - %148 = load i64, ptr %147, align 8, !tbaa !196 - switch i64 %148, label %149 [ - i64 -1, label %152 - i64 0, label %152 - ] - -149: ; preds = %146 - %150 = load i64, ptr %24, align 8, !tbaa !186 - %151 = icmp slt i64 %148, %150 - br i1 %151, label %152, label %154 +149: ; preds = %137 + store i64 %.pre.pre, ptr %142, align 8, !tbaa !195 + br label %145 -152: ; preds = %146, %146, %149 - %153 = load i64, ptr %24, align 8, !tbaa !186 - store i64 %153, ptr %147, align 8, !tbaa !196 - br label %154 +152: ; preds = %137, %144 + %146 = getelementptr inbounds nuw i8, ptr %0, i64 264 + %147 = load i64, ptr %146, align 8, !tbaa !196 + %148 = add i64 %147, 1 + %switch106 = icmp ult i64 %148, 2 + %149 = icmp slt i64 %147, %.pre.pre + %or.cond = select i1 %switch106, i1 true, i1 %149 + br i1 %or.cond, label %150, label %151 + +150: ; preds = %145 + store i64 %.pre.pre, ptr %146, align 8, !tbaa !196 + br label %151 -154: ; preds = %149, %152, %124, %112, %67, %55 - %.0 = phi i32 [ 2, %55 ], [ 2, %67 ], [ 2, %112 ], [ 2, %124 ], [ 0, %152 ], [ 0, %149 ] +154: ; preds = %145, %150, %124, %112, %67, %55 + %.0 = phi i32 [ 2, %55 ], [ 2, %67 ], [ 2, %112 ], [ 2, %124 ], [ 0, %150 ], [ 0, %145 ] call void @llvm.lifetime.end.p0(ptr nonnull %4) ret i32 %.0 } diff --git a/bench/harfbuzz/optimized/gsubgpos-context.ll b/bench/harfbuzz/optimized/gsubgpos-context.ll index 2efc6904e22..2e6590cfcea 100644 --- a/bench/harfbuzz/optimized/gsubgpos-context.ll +++ b/bench/harfbuzz/optimized/gsubgpos-context.ll @@ -1007,7 +1007,8 @@ define linkonce_odr dso_local noundef zeroext i1 @_ZN12hb_hashmap_tIjPN5graph6Lo _ZL9hb_memsetPvij.exit: ; preds = %24, %26 %28 = getelementptr inbounds nuw i8, ptr %0, i64 28 %29 = load i32, ptr %28, align 4, !tbaa !79 - %30 = add i32 %29, 1 + %.fr = freeze i32 %29 + %30 = add i32 %.fr, 1 %31 = getelementptr inbounds nuw i8, ptr %0, i64 40 %32 = load ptr, ptr %31, align 8, !tbaa !25 %33 = getelementptr inbounds nuw i8, ptr %0, i64 24 @@ -1033,17 +1034,15 @@ _ZN12hb_hashmap_tIjPN5graph6LookupELb0EE9prime_forEj.exit: ; preds = %_ZL9hb_mem %42 = getelementptr inbounds nuw i8, ptr %0, i64 18 store i16 %41, ptr %42, align 2, !tbaa !106 store ptr %22, ptr %31, align 8, !tbaa !25 - switch i32 %29, label %.lr.ph.split.preheader [ - i32 -1, label %._crit_edge - i32 0, label %._crit_edge - ] + %.off = add i32 %.fr, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %.lr.ph.split.preheader, label %._crit_edge .lr.ph.split.preheader: ; preds = %_ZN12hb_hashmap_tIjPN5graph6LookupELb0EE9prime_forEj.exit - %umax = tail call i32 @llvm.umax.i32(i32 %30, i32 1) - %wide.trip.count = zext i32 %umax to i64 + %wide.trip.count = zext i32 %30 to i64 br label %.lr.ph.split -._crit_edge: ; preds = %51, %_ZN12hb_hashmap_tIjPN5graph6LookupELb0EE9prime_forEj.exit, %_ZN12hb_hashmap_tIjPN5graph6LookupELb0EE9prime_forEj.exit +._crit_edge: ; preds = %51, %_ZN12hb_hashmap_tIjPN5graph6LookupELb0EE9prime_forEj.exit tail call void @free(ptr noundef %32) #12 br label %52 @@ -2269,7 +2268,8 @@ define linkonce_odr dso_local noundef zeroext i1 @_ZN12hb_hashmap_tIjjLb0EE5allo _ZL9hb_memsetPvij.exit: ; preds = %23, %25 %26 = getelementptr inbounds nuw i8, ptr %0, i64 28 %27 = load i32, ptr %26, align 4, !tbaa !114 - %28 = add i32 %27, 1 + %.fr = freeze i32 %27 + %28 = add i32 %.fr, 1 %29 = getelementptr inbounds nuw i8, ptr %0, i64 40 %30 = load ptr, ptr %29, align 8, !tbaa !27 %31 = getelementptr inbounds nuw i8, ptr %0, i64 24 @@ -2295,17 +2295,15 @@ _ZN12hb_hashmap_tIjjLb0EE9prime_forEj.exit: ; preds = %_ZL9hb_memsetPvij.e %39 = getelementptr inbounds nuw i8, ptr %0, i64 18 store i16 %38, ptr %39, align 2, !tbaa !155 store ptr %21, ptr %29, align 8, !tbaa !27 - switch i32 %27, label %.lr.ph.split.preheader [ - i32 -1, label %._crit_edge - i32 0, label %._crit_edge - ] + %.off = add i32 %.fr, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %.lr.ph.split.preheader, label %._crit_edge .lr.ph.split.preheader: ; preds = %_ZN12hb_hashmap_tIjjLb0EE9prime_forEj.exit - %umax = tail call i32 @llvm.umax.i32(i32 %28, i32 1) - %wide.trip.count = zext i32 %umax to i64 + %wide.trip.count = zext i32 %28 to i64 br label %.lr.ph.split -._crit_edge: ; preds = %48, %_ZN12hb_hashmap_tIjjLb0EE9prime_forEj.exit, %_ZN12hb_hashmap_tIjjLb0EE9prime_forEj.exit +._crit_edge: ; preds = %48, %_ZN12hb_hashmap_tIjjLb0EE9prime_forEj.exit tail call void @free(ptr noundef %30) #12 br label %49 diff --git a/bench/harfbuzz/optimized/hb-static.ll b/bench/harfbuzz/optimized/hb-static.ll index d6ffbb270b8..a81eb5f9386 100644 --- a/bench/harfbuzz/optimized/hb-static.ll +++ b/bench/harfbuzz/optimized/hb-static.ll @@ -6310,7 +6310,8 @@ define linkonce_odr dso_local noundef zeroext i1 @_ZN12hb_hashmap_tIjjLb1EE5allo _ZL9hb_memsetPvij.exit: ; preds = %23, %25 %26 = getelementptr inbounds nuw i8, ptr %0, i64 28 %27 = load i32, ptr %26, align 4, !tbaa !264 - %28 = add i32 %27, 1 + %.fr = freeze i32 %27 + %28 = add i32 %.fr, 1 %29 = getelementptr inbounds nuw i8, ptr %0, i64 40 %30 = load ptr, ptr %29, align 8, !tbaa !150 %31 = getelementptr inbounds nuw i8, ptr %0, i64 24 @@ -6336,17 +6337,15 @@ _ZN12hb_hashmap_tIjjLb1EE9prime_forEj.exit: ; preds = %_ZL9hb_memsetPvij.e %39 = getelementptr inbounds nuw i8, ptr %0, i64 18 store i16 %38, ptr %39, align 2, !tbaa !269 store ptr %21, ptr %29, align 8, !tbaa !150 - switch i32 %27, label %.lr.ph.split.preheader [ - i32 -1, label %._crit_edge - i32 0, label %._crit_edge - ] + %.off = add i32 %.fr, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %.lr.ph.split.preheader, label %._crit_edge .lr.ph.split.preheader: ; preds = %_ZN12hb_hashmap_tIjjLb1EE9prime_forEj.exit - %umax = tail call i32 @llvm.umax.i32(i32 %28, i32 1) - %wide.trip.count = zext i32 %umax to i64 + %wide.trip.count = zext i32 %28 to i64 br label %.lr.ph.split -._crit_edge: ; preds = %48, %_ZN12hb_hashmap_tIjjLb1EE9prime_forEj.exit, %_ZN12hb_hashmap_tIjjLb1EE9prime_forEj.exit +._crit_edge: ; preds = %48, %_ZN12hb_hashmap_tIjjLb1EE9prime_forEj.exit tail call void @free(ptr noundef %30) #13 br label %49 diff --git a/bench/hdf5/optimized/H5ESint.ll b/bench/hdf5/optimized/H5ESint.ll index 80b1b095555..032bbf7bc45 100644 --- a/bench/hdf5/optimized/H5ESint.ll +++ b/bench/hdf5/optimized/H5ESint.ll @@ -768,19 +768,18 @@ define internal range(i32 -1, 2) i32 @H5ES__wait_cb(ptr noundef %0, ptr noundef 10: ; preds = %2 %11 = getelementptr inbounds nuw i8, ptr %1, i64 8 %12 = load i64, ptr %11, align 8, !tbaa !47 - switch i64 %12, label %13 [ - i64 0, label %15 - i64 -1, label %15 - ] + %.off = add i64 %12, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %13, label %15 13: ; preds = %10 %14 = tail call i64 @H5_now_usec() #5 %.pre = load i64, ptr %11, align 8, !tbaa !47 br label %15 -15: ; preds = %10, %10, %13 - %16 = phi i64 [ %.pre, %13 ], [ %12, %10 ], [ %12, %10 ] - %.027 = phi i64 [ %14, %13 ], [ 0, %10 ], [ 0, %10 ] +15: ; preds = %10, %13 + %16 = phi i64 [ %.pre, %13 ], [ %12, %10 ] + %.027 = phi i64 [ %14, %13 ], [ 0, %10 ] %17 = load ptr, ptr %0, align 8, !tbaa !41 %18 = call i32 @H5VL_request_wait(ptr noundef %17, i64 noundef %16, ptr noundef nonnull %3) #5 %19 = icmp slt i32 %18, 0 @@ -794,10 +793,9 @@ define internal range(i32 -1, 2) i32 @H5ES__wait_cb(ptr noundef %0, ptr noundef 24: ; preds = %15 %25 = load i64, ptr %11, align 8, !tbaa !47 - switch i64 %25, label %26 [ - i64 0, label %30 - i64 -1, label %30 - ] + %.off39 = add i64 %25, -1 + %switch40 = icmp ult i64 %.off39, -2 + br i1 %switch40, label %26, label %30 26: ; preds = %24 %27 = call i64 @H5_now_usec() #5 @@ -805,8 +803,8 @@ define internal range(i32 -1, 2) i32 @H5ES__wait_cb(ptr noundef %0, ptr noundef %29 = mul i64 %28, 1000 br label %30 -30: ; preds = %24, %24, %26 - %.026 = phi i64 [ %29, %26 ], [ 0, %24 ], [ 0, %24 ] +30: ; preds = %24, %26 + %.026 = phi i64 [ %29, %26 ], [ 0, %24 ] %31 = load i32, ptr %3, align 4, !tbaa !20 switch i32 %31, label %55 [ i32 2, label %32 @@ -862,10 +860,9 @@ define internal range(i32 -1, 2) i32 @H5ES__wait_cb(ptr noundef %0, ptr noundef 60: ; preds = %55, %43, %40 %.1 = phi i32 [ 1, %40 ], [ 0, %43 ], [ 0, %55 ] %61 = load i64, ptr %11, align 8, !tbaa !47 - switch i64 %61, label %62 [ - i64 0, label %67 - i64 -1, label %67 - ] + %.off41 = add i64 %61, -1 + %switch42 = icmp ult i64 %.off41, -2 + br i1 %switch42, label %62, label %67 62: ; preds = %60 %63 = icmp ugt i64 %.026, %61 @@ -880,8 +877,8 @@ define internal range(i32 -1, 2) i32 @H5ES__wait_cb(ptr noundef %0, ptr noundef store i64 %66, ptr %11, align 8, !tbaa !47 br label %67 -67: ; preds = %60, %60, %20, %36, %47, %51, %64, %65, %2 - %.0 = phi i32 [ -1, %20 ], [ -1, %36 ], [ %.1, %64 ], [ %.1, %65 ], [ %.1, %60 ], [ -1, %47 ], [ -1, %51 ], [ 0, %2 ], [ %.1, %60 ] +67: ; preds = %60, %20, %36, %47, %51, %64, %65, %2 + %.0 = phi i32 [ -1, %20 ], [ -1, %36 ], [ %.1, %64 ], [ %.1, %65 ], [ -1, %47 ], [ -1, %51 ], [ 0, %2 ], [ %.1, %60 ] call void @llvm.lifetime.end.p0(ptr nonnull %3) ret i32 %.0 } diff --git a/bench/hdf5/optimized/H5MF.ll b/bench/hdf5/optimized/H5MF.ll index 04ce5614f25..d07509c889b 100644 --- a/bench/hdf5/optimized/H5MF.ll +++ b/bench/hdf5/optimized/H5MF.ll @@ -1516,10 +1516,9 @@ H5MF__alloc_to_fs_type.exit42.thread: ; preds = %102, %H5MF__alloc_t 132: ; preds = %H5MF__alloc_to_fs_type.exit42.thread %133 = add i64 %126, %2 - switch i64 %133, label %134 [ - i64 -1, label %142 - i64 0, label %142 - ] + %.off.i = add i64 %133, -1 + %switch.i = icmp ult i64 %.off.i, -2 + br i1 %switch.i, label %134, label %142 134: ; preds = %132 %135 = call i64 @H5F_get_base_addr(ptr noundef nonnull %0) #7 @@ -1533,8 +1532,8 @@ H5MF__alloc_to_fs_type.exit42.thread: ; preds = %102, %H5MF__alloc_t %spec.select.i = select i1 %.not84.i, i64 0, i64 %141 br label %142 -142: ; preds = %134, %132, %132 - %.067.i = phi i64 [ 0, %132 ], [ 0, %132 ], [ %spec.select.i, %134 ] +142: ; preds = %134, %132 + %.067.i = phi i64 [ 0, %132 ], [ %spec.select.i, %134 ] %143 = add i64 %.067.i, %2 %144 = call i64 @H5F__alloc(ptr noundef nonnull %0, i32 noundef %1, i64 noundef %143, ptr noundef null, ptr noundef null) #7 %145 = icmp eq i64 %144, -1 @@ -2376,10 +2375,13 @@ define range(i32 -1, -2147483648) i32 @H5MF_try_extend(ptr noundef %0, i32 nound 39: ; preds = %36 %40 = add i64 %37, %4 - switch i64 %40, label %41 [ - i64 -1, label %.thread156 - i64 0, label %.thread156 - ] + %.off = add i64 %40, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %41, label %..thread156_crit_edge + +..thread156_crit_edge: ; preds = %39 + %.pre = load ptr, ptr %21, align 8, !tbaa !42 + br label %.thread156 41: ; preds = %39 %42 = call i64 @H5F_get_base_addr(ptr noundef nonnull %0) #7 @@ -2399,10 +2401,10 @@ define range(i32 -1, -2147483648) i32 @H5MF_try_extend(ptr noundef %0, i32 nound %52 = call i32 (ptr, ptr, i32, i64, i64, ptr, ...) @H5E_printf_stack(ptr noundef nonnull @.str, ptr noundef nonnull @__func__.H5MF_try_extend, i32 noundef 1279, i64 noundef %50, i64 noundef %51, ptr noundef nonnull @.str.18) #7 br label %.thread161 -.thread156: ; preds = %41, %39, %39, %31, %26, %17 - %.0111 = phi i64 [ 0, %26 ], [ 0, %17 ], [ 0, %31 ], [ %spec.select148, %41 ], [ 0, %39 ], [ 0, %39 ] - %.not137 = phi i1 [ false, %26 ], [ false, %17 ], [ %.not136, %31 ], [ false, %41 ], [ false, %39 ], [ false, %39 ] - %53 = load ptr, ptr %21, align 8, !tbaa !42 +.thread156: ; preds = %..thread156_crit_edge, %41, %31, %26, %17 + %.0111 = phi ptr [ %22, %26 ], [ %22, %17 ], [ %22, %31 ], [ %44, %41 ], [ %.pre, %..thread156_crit_edge ] + %.not137 = phi i64 [ 0, %26 ], [ 0, %17 ], [ 0, %31 ], [ %spec.select148, %41 ], [ 0, %..thread156_crit_edge ] + %.not137 = phi i1 [ false, %26 ], [ false, %17 ], [ %.not136, %31 ], [ false, %41 ], [ false, %..thread156_crit_edge ] %54 = load i8, ptr @H5MF_init_g, align 1, !tbaa !3, !range !7, !noundef !8 %55 = trunc nuw i8 %54 to i1 %56 = load i8, ptr @H5_libterm_g, align 1, !range !7 diff --git a/bench/hdf5/optimized/H5Ocopy_ref.ll b/bench/hdf5/optimized/H5Ocopy_ref.ll index ce51634ee25..e5aa9ae4f54 100644 --- a/bench/hdf5/optimized/H5Ocopy_ref.ll +++ b/bench/hdf5/optimized/H5Ocopy_ref.ll @@ -240,12 +240,11 @@ define range(i32 -1, 1) i32 @H5O_copy_expand_ref(ptr noundef %0, ptr noundef %1, 99: ; preds = %89 %100 = load i64, ptr %73, align 8, !tbaa !22 - switch i64 %100, label %105 [ - i64 -1, label %101 - i64 0, label %101 - ] + %.off.i = add i64 %100, -1 + %switch.i = icmp ult i64 %.off.i, -2 + br i1 %switch.i, label %105, label %101 -101: ; preds = %99, %99 +101: ; preds = %99 %102 = load i64, ptr @H5E_ARGS_g, align 8, !tbaa !10 %103 = load i64, ptr @H5E_BADVALUE_g, align 8, !tbaa !10 %104 = call i32 (ptr, ptr, i32, i64, i64, ptr, ...) @H5E_printf_stack(ptr noundef nonnull @.str, ptr noundef nonnull @__func__.H5O__copy_expand_ref_object1, i32 noundef 185, i64 noundef %102, i64 noundef %103, ptr noundef nonnull @.str.10) #8 @@ -363,12 +362,11 @@ H5O__copy_expand_ref_object1.exit.thread: ; preds = %128, %62 %160 = load ptr, ptr %22, align 8, !tbaa !12 call void @H5F_addr_decode(ptr noundef %160, ptr noundef nonnull %16, ptr noundef nonnull %142) #8 %161 = load i64, ptr %142, align 8, !tbaa !22 - switch i64 %161, label %167 [ - i64 -1, label %162 - i64 0, label %162 - ] + %.off.i31 = add i64 %161, -1 + %switch.i32 = icmp ult i64 %.off.i31, -2 + br i1 %switch.i32, label %167, label %162 -162: ; preds = %158, %158 +162: ; preds = %158 %163 = load ptr, ptr %14, align 8, !tbaa !25 call void @free(ptr noundef %163) #8 %164 = load i64, ptr @H5E_ARGS_g, align 8, !tbaa !10 @@ -570,7 +568,7 @@ H5O__copy_expand_ref_object2.exit.thread39: ; preds = %194 br label %.thread150.i 271: ; preds = %323, %.lr.ph.i33 - %.0104206.i = phi i64 [ 0, %.lr.ph.i33 ], [ %324, %323 ] + %.0104206.i = phi i64 [ 0, %.lr.ph.i35 ], [ %324, %323 ] %272 = getelementptr inbounds nuw %struct.H5R_ref_t, ptr %247, i64 %.0104206.i %bcmp.i34 = call i32 @bcmp(ptr noundef nonnull dereferenceable(64) %272, ptr noundef nonnull dereferenceable(64) %10, i64 64) %.not.i = icmp eq i32 %bcmp.i34, 0 @@ -809,7 +807,7 @@ H5O__copy_expand_ref_object2.exit: ; preds = %379, %380 br label %396 396: ; preds = %H5O__copy_expand_ref_object2.exit.thread39, %H5O__copy_expand_ref_region1.exit.thread, %H5O__copy_expand_ref_object1.exit.thread, %32, %45, %54, %130, %190, %388, %392, %H5O__copy_expand_ref_object2.exit, %36 - %.0 = phi i32 [ -1, %32 ], [ -1, %45 ], [ -1, %54 ], [ -1, %392 ], [ -1, %130 ], [ -1, %190 ], [ -1, %388 ], [ 0, %H5O__copy_expand_ref_object2.exit ], [ 0, %36 ], [ 0, %H5O__copy_expand_ref_object1.exit.thread ], [ 0, %H5O__copy_expand_ref_region1.exit.thread ], [ 0, %H5O__copy_expand_ref_object2.exit.thread39 ] + %.0 = phi i32 [ -1, %32 ], [ -1, %45 ], [ -1, %54 ], [ -1, %392 ], [ -1, %130 ], [ -1, %190 ], [ -1, %388 ], [ 0, %H5O__copy_expand_ref_object2.exit ], [ 0, %36 ], [ 0, %H5O__copy_expand_ref_object1.exit.thread ], [ 0, %H5O__copy_expand_ref_region1.exit.thread ], [ 0, %H5O__copy_expand_ref_object2.exit.thread41 ] call void @llvm.lifetime.end.p0(ptr nonnull %23) call void @llvm.lifetime.end.p0(ptr nonnull %22) call void @llvm.lifetime.end.p0(ptr nonnull %21) diff --git a/bench/html5ever-rs/optimized/2p0p1zz6gwjy9c4w.ll b/bench/html5ever-rs/optimized/2p0p1zz6gwjy9c4w.ll index 16cce90ce70..b67b140b90e 100644 --- a/bench/html5ever-rs/optimized/2p0p1zz6gwjy9c4w.ll +++ b/bench/html5ever-rs/optimized/2p0p1zz6gwjy9c4w.ll @@ -651,10 +651,9 @@ define hidden void @"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..o tail call void @llvm.experimental.noalias.scope.decl(metadata !220) %2 = load ptr, ptr %0, align 8, !alias.scope !223, !noundef !4 %magicptr.i.i = ptrtoint ptr %2 to i64 - switch i64 %magicptr.i.i, label %3 [ - i64 0, label %"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17h4c881dd0ae7cf0caE.llvm.10022686776672290337.exit" - i64 -1, label %"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17h4c881dd0ae7cf0caE.llvm.10022686776672290337.exit" - ] + %magicptr.off.i.i = add i64 %magicptr.i.i, -1 + %switch.i.i = icmp ult i64 %magicptr.off.i.i, -2 + br i1 %switch.i.i, label %3, label %"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17h4c881dd0ae7cf0caE.llvm.10022686776672290337.exit" 3: ; preds = %1 %4 = getelementptr inbounds nuw i8, ptr %2, i64 8 @@ -668,7 +667,7 @@ define hidden void @"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..o tail call void @__rust_dealloc(ptr noundef nonnull %2, i64 noundef 136, i64 noundef 8) #22, !noalias !224 br label %"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17h4c881dd0ae7cf0caE.llvm.10022686776672290337.exit" -"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17h4c881dd0ae7cf0caE.llvm.10022686776672290337.exit": ; preds = %1, %1, %3, %8 +"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17h4c881dd0ae7cf0caE.llvm.10022686776672290337.exit": ; preds = %1, %3, %8 ret void } @@ -741,10 +740,9 @@ define hidden void @"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$c tail call void @llvm.experimental.noalias.scope.decl(metadata !250) %2 = load ptr, ptr %0, align 8, !alias.scope !250, !noundef !4 %magicptr.i = ptrtoint ptr %2 to i64 - switch i64 %magicptr.i, label %3 [ - i64 0, label %"_ZN4core3ptr95drop_in_place$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$17he56a477076105f75E.llvm.10022686776672290337.exit" - i64 -1, label %"_ZN4core3ptr95drop_in_place$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$17he56a477076105f75E.llvm.10022686776672290337.exit" - ] + %magicptr.off.i = add i64 %magicptr.i, -1 + %switch.i = icmp ult i64 %magicptr.off.i, -2 + br i1 %switch.i, label %3, label %"_ZN4core3ptr95drop_in_place$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$17he56a477076105f75E.llvm.10022686776672290337.exit" 3: ; preds = %1 %4 = getelementptr inbounds nuw i8, ptr %2, i64 8 @@ -758,7 +756,7 @@ define hidden void @"_ZN4core3ptr125drop_in_place$LT$core..cell..UnsafeCell$LT$c tail call void @__rust_dealloc(ptr noundef nonnull %2, i64 noundef 136, i64 noundef 8) #22, !noalias !253 br label %"_ZN4core3ptr95drop_in_place$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$17he56a477076105f75E.llvm.10022686776672290337.exit" -"_ZN4core3ptr95drop_in_place$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$17he56a477076105f75E.llvm.10022686776672290337.exit": ; preds = %1, %1, %3, %8 +"_ZN4core3ptr95drop_in_place$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$17he56a477076105f75E.llvm.10022686776672290337.exit": ; preds = %1, %3, %8 ret void } @@ -1149,10 +1147,9 @@ define hidden void @"_ZN4core3ptr44drop_in_place$LT$markup5ever_rcdom..Node$GT$1 tail call void @llvm.experimental.noalias.scope.decl(metadata !398) %8 = load ptr, ptr %7, align 8, !alias.scope !401, !noundef !4 %magicptr.i.i.i = ptrtoint ptr %8 to i64 - switch i64 %magicptr.i.i.i, label %9 [ - i64 0, label %"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17hf1b98de9b91f2366E.llvm.10022686776672290337.exit" - i64 -1, label %"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17hf1b98de9b91f2366E.llvm.10022686776672290337.exit" - ] + %magicptr.off.i.i.i = add i64 %magicptr.i.i.i, -1 + %switch.i.i.i = icmp ult i64 %magicptr.off.i.i.i, -2 + br i1 %switch.i.i.i, label %9, label %"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17hf1b98de9b91f2366E.llvm.10022686776672290337.exit" 9: ; preds = %6 %10 = getelementptr inbounds nuw i8, ptr %8, i64 8 @@ -1166,7 +1163,7 @@ define hidden void @"_ZN4core3ptr44drop_in_place$LT$markup5ever_rcdom..Node$GT$1 tail call void @__rust_dealloc(ptr noundef nonnull %8, i64 noundef 136, i64 noundef 8) #22, !noalias !402 br label %"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17hf1b98de9b91f2366E.llvm.10022686776672290337.exit" -"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17hf1b98de9b91f2366E.llvm.10022686776672290337.exit": ; preds = %14, %9, %6, %6 +"_ZN4core3ptr119drop_in_place$LT$core..cell..Cell$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$$GT$17hf1b98de9b91f2366E.llvm.10022686776672290337.exit": ; preds = %14, %9, %6 %15 = getelementptr inbounds nuw i8, ptr %0, i64 96 tail call void @llvm.experimental.noalias.scope.decl(metadata !407) %16 = getelementptr inbounds nuw i8, ptr %0, i64 104 @@ -2741,12 +2738,11 @@ define hidden void @"_ZN4core3ptr95drop_in_place$LT$core..cell..Ref$LT$tendril.. define hidden void @"_ZN4core3ptr95drop_in_place$LT$core..option..Option$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$$GT$17he56a477076105f75E.llvm.10022686776672290337"(ptr noalias noundef readonly align 8 captures(none) dereferenceable(8) %0) unnamed_addr #0 { %2 = load ptr, ptr %0, align 8, !noundef !4 %magicptr = ptrtoint ptr %2 to i64 - switch i64 %magicptr, label %3 [ - i64 0, label %"_ZN4core3ptr67drop_in_place$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$17h614a7f44b369244bE.exit" - i64 -1, label %"_ZN4core3ptr67drop_in_place$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$17h614a7f44b369244bE.exit" - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %3, label %"_ZN4core3ptr67drop_in_place$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$17h614a7f44b369244bE.exit" -"_ZN4core3ptr67drop_in_place$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$17h614a7f44b369244bE.exit": ; preds = %1, %1, %8, %3 +"_ZN4core3ptr67drop_in_place$LT$alloc..rc..Weak$LT$markup5ever_rcdom..Node$GT$$GT$17h614a7f44b369244bE.exit": ; preds = %1, %8, %3 ret void 3: ; preds = %1 diff --git a/bench/image-rs/optimized/5ez7udly19o3uj1p.ll b/bench/image-rs/optimized/5ez7udly19o3uj1p.ll index d41ad772919..aa1ff313122 100644 --- a/bench/image-rs/optimized/5ez7udly19o3uj1p.ll +++ b/bench/image-rs/optimized/5ez7udly19o3uj1p.ll @@ -10305,8 +10305,10 @@ switch.lookup: ; preds = %214, %195, %255 call void @llvm.experimental.noalias.scope.decl(metadata !1617) call void @llvm.experimental.noalias.scope.decl(metadata !1618) %343 = load i64, ptr %342, align 8, !alias.scope !1619, !noalias !1620, !noundef !19 - %switch.i.i.i.i.i = icmp ugt i64 %341, %343 - %344 = call i64 @llvm.umax.i64(i64 %341, i64 %343) + %.0.i.i.i.i.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %341, i64 %343) + %.off.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i, -2 + %344 = select i1 %switch.i.i.i.i.i, i64 %341, i64 %343 %.0.sroa.speculated.i.i.i.i.i = select i1 %switch.i.i.i.i.i, ptr %.018.i.i.i, ptr %342 %345 = add nuw i64 %.017.i.i.i, 1 %346 = icmp eq i64 %345, %339 @@ -11510,8 +11512,10 @@ switch.lookup: ; preds = %204, %185, %245 call void @llvm.experimental.noalias.scope.decl(metadata !1834) call void @llvm.experimental.noalias.scope.decl(metadata !1835) %333 = load i64, ptr %332, align 8, !alias.scope !1836, !noalias !1837, !noundef !19 - %switch.i.i.i.i.i = icmp ugt i64 %331, %333 - %334 = call i64 @llvm.umax.i64(i64 %331, i64 %333) + %.0.i.i.i.i.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %331, i64 %333) + %.off.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i, -2 + %334 = select i1 %switch.i.i.i.i.i, i64 %331, i64 %333 %.0.sroa.speculated.i.i.i.i.i = select i1 %switch.i.i.i.i.i, ptr %.018.i.i.i, ptr %332 %335 = add nuw i64 %.017.i.i.i, 1 %336 = icmp eq i64 %335, %329 @@ -12712,8 +12716,10 @@ switch.lookup: ; preds = %219, %200, %260 call void @llvm.experimental.noalias.scope.decl(metadata !2038) call void @llvm.experimental.noalias.scope.decl(metadata !2039) %349 = load i64, ptr %348, align 8, !alias.scope !2040, !noalias !2041, !noundef !19 - %switch.i.i.i.i.i = icmp ugt i64 %347, %349 - %350 = call i64 @llvm.umax.i64(i64 %347, i64 %349) + %.0.i.i.i.i.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %347, i64 %349) + %.off.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i, -2 + %350 = select i1 %switch.i.i.i.i.i, i64 %347, i64 %349 %.0.sroa.speculated.i.i.i.i.i = select i1 %switch.i.i.i.i.i, ptr %.018.i.i.i, ptr %348 %351 = add nuw i64 %.017.i.i.i, 1 %352 = icmp eq i64 %351, %345 @@ -13690,7 +13696,11 @@ switch.lookup: ; preds = %188 store i64 %217, ptr %204, align 8, !noalias !2204 store i64 0, ptr %205, align 8, !noalias !2204 %218 = load i64, ptr %207, align 8, !alias.scope !2197, !noalias !2200, !noundef !19 - store i64 %218, ptr %206, align 8, !noalias !2204 + %.0.i.i.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 0, i64 %218) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 0, i64 %218 + store i64 %.0.sroa.speculated.i.i.i, ptr %206, align 8, !noalias !2204 %219 = call noundef ptr @"_ZN66_$LT$std..io..cursor..Cursor$LT$T$GT$$u20$as$u20$std..io..Read$GT$8read_buf17h8dea1e44d684a36aE"(ptr noalias noundef nonnull align 8 dereferenceable(24) %202, ptr noalias noundef nonnull align 8 dereferenceable(32) %7, i64 noundef 0), !noalias !2205 %220 = icmp eq ptr %219, null br i1 %220, label %221, label %_ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17h52794bf5723a12c7E.exit.thread.i @@ -13772,7 +13782,10 @@ _ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17h52794bf5723a12c7E.exit.i: %243 = load i64, ptr %200, align 8, !alias.scope !2192, !noalias !2195, !noundef !19 %244 = add i64 %243, %.sroa.027.0.copyload.i %245 = load i64, ptr %201, align 8, !alias.scope !2192, !noalias !2195, !noundef !19 - %.0.sroa.speculated.i.i = call noundef i64 @llvm.umin.i64(i64 %244, i64 %245) + %.0.sroa.speculated.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %244, i64 %245) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %245, i64 %244 store i64 %.0.sroa.speculated.i.i, ptr %200, align 8, !alias.scope !2192, !noalias !2195 switch i8 %236, label %253 [ i8 2, label %259 @@ -14488,7 +14501,11 @@ switch.lookup: ; preds = %188 store i64 %217, ptr %204, align 8, !noalias !2319 store i64 0, ptr %205, align 8, !noalias !2319 %218 = load i64, ptr %207, align 8, !alias.scope !2312, !noalias !2315, !noundef !19 - store i64 %218, ptr %206, align 8, !noalias !2319 + %.0.i.i.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 0, i64 %218) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 0, i64 %218 + store i64 %.0.sroa.speculated.i.i.i, ptr %206, align 8, !noalias !2319 %219 = call noundef ptr @"_ZN82_$LT$std..io..buffered..bufreader..BufReader$LT$R$GT$$u20$as$u20$std..io..Read$GT$8read_buf17h93e0ba42834caaa8E"(ptr noalias noundef nonnull align 8 dereferenceable(48) %202, ptr noalias noundef nonnull align 8 dereferenceable(32) %7, i64 noundef 0), !noalias !2320 %220 = icmp eq ptr %219, null br i1 %220, label %221, label %_ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17hfdb8927b23dc05d6E.exit.thread.i @@ -14570,7 +14587,10 @@ _ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17hfdb8927b23dc05d6E.exit.i: %243 = load i64, ptr %200, align 8, !alias.scope !2307, !noalias !2310, !noundef !19 %244 = add i64 %243, %.sroa.027.0.copyload.i %245 = load i64, ptr %201, align 8, !alias.scope !2307, !noalias !2310, !noundef !19 - %.0.sroa.speculated.i.i = call noundef i64 @llvm.umin.i64(i64 %244, i64 %245) + %.0.sroa.speculated.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %244, i64 %245) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %245, i64 %244 store i64 %.0.sroa.speculated.i.i, ptr %200, align 8, !alias.scope !2307, !noalias !2310 switch i8 %236, label %253 [ i8 2, label %259 @@ -17116,7 +17136,11 @@ define internal fastcc void @"_ZN3png7decoder20ReadDecoder$LT$R$GT$11decode_next store i64 %23, ptr %14, align 8, !noalias !2536 store i64 0, ptr %15, align 8, !noalias !2536 %24 = load i64, ptr %17, align 8, !alias.scope !2530, !noalias !2533, !noundef !19 - store i64 %24, ptr %16, align 8, !noalias !2536 + %.0.sroa.speculated.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 0, i64 %24) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 0, i64 %24 + store i64 %.0.sroa.speculated.i.i, ptr %16, align 8, !noalias !2536 %25 = call noundef ptr @"_ZN66_$LT$std..io..cursor..Cursor$LT$T$GT$$u20$as$u20$std..io..Read$GT$8read_buf17h8dea1e44d684a36aE"(ptr noalias noundef nonnull align 8 dereferenceable(24) %12, ptr noalias noundef nonnull align 8 dereferenceable(32) %4, i64 noundef 0), !noalias !2537 %26 = icmp eq ptr %25, null br i1 %26, label %27, label %_ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17h52794bf5723a12c7E.exit.thread @@ -17191,7 +17215,10 @@ _ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17h52794bf5723a12c7E.exit: ; %47 = load i64, ptr %10, align 8, !noundef !19 %48 = add i64 %47, %.sroa.023.0.copyload %49 = load i64, ptr %11, align 8, !noundef !19 - %.0.sroa.speculated.i = call noundef i64 @llvm.umin.i64(i64 %48, i64 %49) + %.0.sroa.speculated.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %48, i64 %49) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %49, i64 %48 store i64 %.0.sroa.speculated.i, ptr %10, align 8 switch i8 %44, label %52 [ i8 2, label %54 @@ -17275,7 +17302,11 @@ define internal fastcc void @"_ZN3png7decoder20ReadDecoder$LT$R$GT$11decode_next store i64 %23, ptr %14, align 8, !noalias !2544 store i64 0, ptr %15, align 8, !noalias !2544 %24 = load i64, ptr %17, align 8, !alias.scope !2538, !noalias !2541, !noundef !19 - store i64 %24, ptr %16, align 8, !noalias !2544 + %.0.sroa.speculated.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 0, i64 %24) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 0, i64 %24 + store i64 %.0.sroa.speculated.i.i, ptr %16, align 8, !noalias !2544 %25 = call noundef ptr @"_ZN82_$LT$std..io..buffered..bufreader..BufReader$LT$R$GT$$u20$as$u20$std..io..Read$GT$8read_buf17h93e0ba42834caaa8E"(ptr noalias noundef nonnull align 8 dereferenceable(48) %12, ptr noalias noundef nonnull align 8 dereferenceable(32) %4, i64 noundef 0), !noalias !2545 %26 = icmp eq ptr %25, null br i1 %26, label %27, label %_ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17hfdb8927b23dc05d6E.exit.thread @@ -17350,7 +17381,10 @@ _ZN3std2io8buffered9bufreader6buffer6Buffer8fill_buf17hfdb8927b23dc05d6E.exit: ; %47 = load i64, ptr %10, align 8, !noundef !19 %48 = add i64 %47, %.sroa.023.0.copyload %49 = load i64, ptr %11, align 8, !noundef !19 - %.0.sroa.speculated.i = call noundef i64 @llvm.umin.i64(i64 %48, i64 %49) + %.0.sroa.speculated.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %48, i64 %49) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %49, i64 %48 store i64 %.0.sroa.speculated.i, ptr %10, align 8 switch i8 %44, label %52 [ i8 2, label %54 @@ -25072,7 +25106,10 @@ _ZN5alloc5alloc15exchange_malloc17hbe31f2048284b3faE.exit: ; preds = %23 call void @llvm.lifetime.start.p0(ptr nonnull %21) tail call void @llvm.experimental.noalias.scope.decl(metadata !3040) call void @llvm.lifetime.start.p0(ptr nonnull %12), !noalias !3043 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %5, i64 32768) + %.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 32768, i64 %5) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %5, i64 32768 tail call void @llvm.experimental.noalias.scope.decl(metadata !3045) %29 = tail call { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h0685f8b8d660cb99E"(i64 noundef %.0.sroa.speculated.i.i, i1 noundef zeroext false), !noalias !3048 %30 = extractvalue { i64, ptr } %29, 1 @@ -25490,7 +25527,10 @@ _ZN5alloc5alloc15exchange_malloc17hbe31f2048284b3faE.exit: ; preds = %23 call void @llvm.lifetime.start.p0(ptr nonnull %21) tail call void @llvm.experimental.noalias.scope.decl(metadata !3093) call void @llvm.lifetime.start.p0(ptr nonnull %12), !noalias !3096 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %5, i64 32768) + %.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 32768, i64 %5) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %5, i64 32768 tail call void @llvm.experimental.noalias.scope.decl(metadata !3098) %29 = tail call { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h0685f8b8d660cb99E"(i64 noundef %.0.sroa.speculated.i.i, i1 noundef zeroext false), !noalias !3101 %30 = extractvalue { i64, ptr } %29, 1 @@ -35776,9 +35816,6 @@ declare i8 @llvm.cttz.i8(i8, i1 immarg) #18 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.umin.i64(i64, i64) #18 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #18 - ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.usub.sat.i64(i64, i64) #18 @@ -35788,6 +35825,9 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #20 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #18 + ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i16 @llvm.umin.i16(i16, i16) #18 diff --git a/bench/just-rs/optimized/52uhuxfcop8n85cu.ll b/bench/just-rs/optimized/52uhuxfcop8n85cu.ll index 2c693583b8b..d133bcec437 100644 --- a/bench/just-rs/optimized/52uhuxfcop8n85cu.ll +++ b/bench/just-rs/optimized/52uhuxfcop8n85cu.ll @@ -14694,10 +14694,8 @@ define hidden void @"_ZN4core3ptr48drop_in_place$LT$env_filter..filter..Builder$ %8 = add nuw i64 %.012.i.i.i, 1 %9 = getelementptr i8, ptr %7, i64 8 %.val8.i.i.i = load i64, ptr %9, align 8, !range !322, !alias.scope !6322, !noalias !6318, !noundef !4 - switch i64 %.val8.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i" - i64 0, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i" - ] + %switch.i.i.i = icmp sgt i64 %.val8.i.i.i, 0 + br i1 %switch.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i", label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i": ; preds = %.lr.ph.i.i.i %10 = getelementptr i8, ptr %7, i64 16 @@ -14705,7 +14703,7 @@ define hidden void @"_ZN4core3ptr48drop_in_place$LT$env_filter..filter..Builder$ tail call void @__rust_dealloc(ptr noundef nonnull %.val9.i.i.i, i64 noundef %.val8.i.i.i, i64 noundef 1) #29, !noalias !6325 br label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i" -"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i", %.lr.ph.i.i.i, %.lr.ph.i.i.i +"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i", %.lr.ph.i.i.i %11 = icmp eq i64 %8, %5 br i1 %11, label %"_ZN70_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops..drop..Drop$GT$4drop17ha5a5357a9fde62e1E.llvm.1798434116971987782.exit.i", label %.lr.ph.i.i.i @@ -14755,10 +14753,8 @@ define hidden void @"_ZN4core3ptr48drop_in_place$LT$env_logger..logger..Builder$ %9 = add nuw i64 %.012.i.i.i.i, 1 %10 = getelementptr i8, ptr %8, i64 8 %.val8.i.i.i.i = load i64, ptr %10, align 8, !range !322, !alias.scope !6364, !noalias !6360, !noundef !4 - switch i64 %.val8.i.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i.i" - i64 0, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i.i" - ] + %switch.i.i.i.i = icmp sgt i64 %.val8.i.i.i.i, 0 + br i1 %switch.i.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i.i", label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i.i": ; preds = %.lr.ph.i.i.i.i %11 = getelementptr i8, ptr %8, i64 16 @@ -14766,7 +14762,7 @@ define hidden void @"_ZN4core3ptr48drop_in_place$LT$env_logger..logger..Builder$ tail call void @__rust_dealloc(ptr noundef nonnull %.val9.i.i.i.i, i64 noundef %.val8.i.i.i.i, i64 noundef 1) #29, !noalias !6367 br label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i.i" -"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i.i", %.lr.ph.i.i.i.i, %.lr.ph.i.i.i.i +"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i.i.i", %.lr.ph.i.i.i.i %12 = icmp eq i64 %9, %6 br i1 %12, label %"_ZN70_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops..drop..Drop$GT$4drop17ha5a5357a9fde62e1E.llvm.1798434116971987782.exit.i.i", label %.lr.ph.i.i.i.i @@ -16075,10 +16071,8 @@ define internal fastcc void @"_ZN4core3ptr49drop_in_place$LT$just..subcommand..S cleanup %57 = getelementptr inbounds nuw i8, ptr %0, i64 32 %58 = load i64, ptr %57, align 8, !range !322, !alias.scope !6931, !noundef !4 - switch i64 %58, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split" [ - i64 -9223372036854775808, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit" - i64 0, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit" - ] + %switch = icmp sgt i64 %58, 0 + br i1 %switch, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split", label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit" "_ZN4core3ptr114drop_in_place$LT$alloc..collections..btree..map..BTreeMap$LT$alloc..string..String$C$alloc..string..String$GT$$GT$17h4a5c775fb41caa0cE.exit": ; preds = %3 %59 = getelementptr inbounds nuw i8, ptr %0, i64 32 @@ -16109,8 +16103,8 @@ define internal fastcc void @"_ZN4core3ptr49drop_in_place$LT$just..subcommand..S tail call void @__rust_dealloc(ptr noundef nonnull %67, i64 noundef %.sink34, i64 noundef 1) #29, !noalias !4 br label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit" -"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit": ; preds = %74, %74, %55, %55, %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split" - %.pn2 = phi { ptr, i32 } [ %56, %55 ], [ %75, %74 ], [ %.pn2.ph, %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split" ], [ %56, %55 ], [ %75, %74 ] +"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit": ; preds = %74, %55, %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split" + %.pn2 = phi { ptr, i32 } [ %.pn2.ph, %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split" ], [ %56, %55 ], [ %75, %74 ] resume { ptr, i32 } %.pn2 "_ZN4core3ptr70drop_in_place$LT$alloc..vec..Vec$LT$std..ffi..os_str..OsString$GT$$GT$17h135700e0181df6a4E.exit": ; preds = %21, %"_ZN70_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops..drop..Drop$GT$4drop17hb2d4015f35fa67d9E.llvm.1798434116971987782.exit.i" @@ -16140,10 +16134,8 @@ define internal fastcc void @"_ZN4core3ptr49drop_in_place$LT$just..subcommand..S cleanup %76 = getelementptr inbounds nuw i8, ptr %0, i64 32 %77 = load i64, ptr %76, align 8, !range !322, !alias.scope !6976, !noundef !4 - switch i64 %77, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split" [ - i64 -9223372036854775808, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit" - i64 0, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit" - ] + %switch37 = icmp sgt i64 %77, 0 + br i1 %switch37, label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit.sink.split", label %"_ZN4core3ptr70drop_in_place$LT$core..option..Option$LT$alloc..string..String$GT$$GT$17ha18d79e382ebf206E.llvm.1798434116971987782.exit" "_ZN4core3ptr114drop_in_place$LT$alloc..collections..btree..map..BTreeMap$LT$alloc..string..String$C$alloc..string..String$GT$$GT$17h4a5c775fb41caa0cE.exit4": ; preds = %29 %78 = getelementptr inbounds nuw i8, ptr %0, i64 32 @@ -20611,10 +20603,8 @@ define hidden void @"_ZN4core3ptr63drop_in_place$LT$$u5b$env_filter..directive.. %5 = add nuw i64 %.012, 1 %6 = getelementptr i8, ptr %4, i64 8 %.val8 = load i64, ptr %6, align 8, !range !322, !alias.scope !9037, !noundef !4 - switch i64 %.val8, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit" - i64 0, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit" - ] + %switch = icmp sgt i64 %.val8, 0 + br i1 %switch, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i", label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i": ; preds = %.lr.ph %7 = getelementptr i8, ptr %4, i64 16 @@ -20622,7 +20612,7 @@ define hidden void @"_ZN4core3ptr63drop_in_place$LT$$u5b$env_filter..directive.. tail call void @__rust_dealloc(ptr noundef nonnull %.val9, i64 noundef %.val8, i64 noundef 1) #29, !noalias !9040 br label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit" -"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit": ; preds = %.lr.ph, %.lr.ph, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i" +"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit": ; preds = %.lr.ph, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i" %8 = icmp eq i64 %5, %1 br i1 %8, label %._crit_edge, label %.lr.ph @@ -25573,10 +25563,8 @@ define hidden void @"_ZN4core3ptr76drop_in_place$LT$alloc..vec..Vec$LT$env_filte %8 = add nuw i64 %.012.i.i, 1 %9 = getelementptr i8, ptr %7, i64 8 %.val8.i.i = load i64, ptr %9, align 8, !range !322, !alias.scope !11545, !noalias !11539, !noundef !4 - switch i64 %.val8.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i" - i64 0, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i" - ] + %switch.i.i = icmp sgt i64 %.val8.i.i, 0 + br i1 %switch.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i", label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i": ; preds = %.lr.ph.i.i %10 = getelementptr i8, ptr %7, i64 16 @@ -25584,7 +25572,7 @@ define hidden void @"_ZN4core3ptr76drop_in_place$LT$alloc..vec..Vec$LT$env_filte tail call void @__rust_dealloc(ptr noundef nonnull %.val9.i.i, i64 noundef %.val8.i.i, i64 noundef 1) #29, !noalias !11548 br label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i" -"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i", %.lr.ph.i.i, %.lr.ph.i.i +"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i.i", %.lr.ph.i.i %11 = icmp eq i64 %8, %5 br i1 %11, label %"_ZN70_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops..drop..Drop$GT$4drop17ha5a5357a9fde62e1E.llvm.1798434116971987782.exit", label %.lr.ph.i.i @@ -33027,10 +33015,8 @@ define hidden void @"_ZN70_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops %8 = add nuw i64 %.012.i, 1 %9 = getelementptr i8, ptr %7, i64 8 %.val8.i = load i64, ptr %9, align 8, !range !322, !alias.scope !13808, !noundef !4 - switch i64 %.val8.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i" - i64 0, label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i" - ] + %switch.i = icmp sgt i64 %.val8.i, 0 + br i1 %switch.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i", label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i": ; preds = %.lr.ph.i %10 = getelementptr i8, ptr %7, i64 16 @@ -33038,7 +33024,7 @@ define hidden void @"_ZN70_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops tail call void @__rust_dealloc(ptr noundef nonnull %.val9.i, i64 noundef %.val8.i, i64 noundef 1) #29, !noalias !13811 br label %"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i" -"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i", %.lr.ph.i, %.lr.ph.i +"_ZN4core3ptr53drop_in_place$LT$env_filter..directive..Directive$GT$17hc3ba07be5cb58020E.exit.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h611556c63980c062E.llvm.1798434116971987782.exit.i.i1.i.i.i.i.i", %.lr.ph.i %11 = icmp eq i64 %8, %5 br i1 %11, label %"_ZN4core3ptr63drop_in_place$LT$$u5b$env_filter..directive..Directive$u5d$$GT$17h7f778759f98803baE.llvm.1798434116971987782.exit", label %.lr.ph.i diff --git a/bench/just-rs/optimized/53slus9exfz9w045.ll b/bench/just-rs/optimized/53slus9exfz9w045.ll index e0101c6b0ab..83748bc914b 100644 --- a/bench/just-rs/optimized/53slus9exfz9w045.ll +++ b/bench/just-rs/optimized/53slus9exfz9w045.ll @@ -380,7 +380,10 @@ define hidden noundef i64 @"_ZN104_$LT$core..iter..adapters..copied..Copied$LT$I call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %15, ptr noundef nonnull align 8 dereferenceable(24) %6, i64 24, i1 false) call void @llvm.lifetime.end.p0(ptr nonnull %6) %25 = load i64, ptr %24, align 8, !alias.scope !40, !noundef !4 - %.0.sroa.speculated.i.i.i.i = call noundef i64 @llvm.umax.i64(i64 %.011.i, i64 %25) + %.0.sroa.speculated.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %.011.i, i64 %25) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i = select i1 %switch.i.i.i.i, i64 %.011.i, i64 %25 %26 = load i64, ptr %8, align 8, !alias.scope !43, !noundef !4 %27 = icmp eq i64 %26, 0 br i1 %27, label %_ZN4core4iter6traits8iterator8Iterator4fold17h0dfdb559e38c8b95E.llvm.16801050463324468979.exit, label %12 @@ -980,8 +983,11 @@ define hidden noundef zeroext i1 @"_ZN13generic_array3hex91_$LT$impl$u20$core..f call void @llvm.lifetime.start.p0(ptr nonnull %3) call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(64) %3, i8 0, i64 64, i1 false), !alias.scope !191 tail call void @llvm.experimental.noalias.scope.decl(metadata !194) - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 32) - %.not.i = icmp eq i64 %10, 0 + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 32) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 32, i64 %10 + %.not.i = icmp eq i64 %.0.sroa.speculated.i.i, 0 br i1 %.not.i, label %"_ZN98_$LT$core..iter..adapters..take..Take$LT$I$GT$$u20$as$u20$core..iter..adapters..take..SpecTake$GT$9spec_fold17h3972cab476063c54E.exit", label %.lr.ph.i .lr.ph.i: ; preds = %2 @@ -1033,7 +1039,10 @@ define hidden noundef zeroext i1 @"_ZN13generic_array3hex91_$LT$impl$u20$core..f ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6max_by17hdd99d1fc37df8cfcE.llvm.16801050463324468979(i64 noundef %0, i64 noundef %1, ptr noalias noundef nonnull readnone align 1 captures(none) %2) unnamed_addr #9 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umax.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %0, i64 %1 ret i64 %.0.sroa.speculated } @@ -3314,7 +3323,10 @@ define hidden noundef i64 @_ZN4core4iter6traits8iterator8Iterator4fold17h0dfdb55 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %14, ptr noundef nonnull align 8 dereferenceable(24) %6, i64 24, i1 false) call void @llvm.lifetime.end.p0(ptr nonnull %6) %24 = load i64, ptr %23, align 8, !alias.scope !951, !noundef !4 - %.0.sroa.speculated.i.i.i = tail call noundef i64 @llvm.umax.i64(i64 %.011, i64 %24) + %.0.sroa.speculated.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %.011, i64 %24) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %.011, i64 %24 %25 = load i64, ptr %7, align 8, !alias.scope !954, !noundef !4 %26 = icmp eq i64 %25, 0 br i1 %26, label %._crit_edge, label %11 @@ -3326,7 +3338,10 @@ define hidden noundef i64 @_ZN4core4iter6traits8iterator8Iterator4fold17h0dfdb55 ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @"_ZN4core4iter6traits8iterator8Iterator6max_by4fold28_$u7b$$u7b$closure$u7d$$u7d$17hc7ff9b5ddbb15e24E.llvm.16801050463324468979"(ptr noalias noundef nonnull readnone align 1 captures(none) %0, i64 noundef %1, i64 noundef %2) unnamed_addr #9 personality ptr @rust_eh_personality { - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %1, i64 %2) + %.0.sroa.speculated.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %1, i64 %2) + %.off.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %1, i64 %2 ret i64 %.0.sroa.speculated.i } @@ -3370,7 +3385,10 @@ define hidden noundef range(i8 0, 35) i8 @_ZN4core4iter6traits8iterator8Iterator ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: read) uwtable define hidden noundef i64 @"_ZN4core4iter8adapters6copied9copy_fold28_$u7b$$u7b$closure$u7d$$u7d$17h0866d153b93d7296E.llvm.16801050463324468979"(ptr noalias noundef nonnull readnone align 1 captures(none) %0, i64 noundef %1, ptr noalias noundef readonly align 8 captures(none) dereferenceable(8) %2) unnamed_addr #10 personality ptr @rust_eh_personality { %4 = load i64, ptr %2, align 8, !noundef !4 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umax.i64(i64 %1, i64 %4) + %.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %1, i64 %4) + %.off.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %1, i64 %4 ret i64 %.0.sroa.speculated.i.i } @@ -14898,8 +14916,12 @@ define hidden void @_ZN4just10positional10Positional19override_from_value17h7b73 %113 = getelementptr inbounds nuw i8, ptr @anon.caf4ea2b214629a3b5d633b8bc0e9fab.56, i64 %112 %114 = load i8, ptr %113, align 1, !noalias !2615, !noundef !4 %115 = zext i8 %114 to i64 - %116 = getelementptr inbounds nuw i8, ptr %.sroa.015.0.i, i64 %115 - %117 = icmp uge i64 %110, %115 + %.0.i.i.i.i32.i.i.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %110, i64 %115) + %.off.i.i33.i.i.i.i = add nsw i8 %.0.i.i.i.i32.i.i.i.i, -1 + %switch.i.i34.i.i.i.i = icmp ult i8 %.off.i.i33.i.i.i.i, -2 + %.0.sroa.speculated.i.i35.i.i.i.i = select i1 %switch.i.i34.i.i.i.i, i64 %115, i64 %110 + %116 = getelementptr inbounds i8, ptr %.sroa.015.0.i, i64 %.0.sroa.speculated.i.i35.i.i.i.i + %117 = icmp eq i64 %.0.sroa.speculated.i.i35.i.i.i.i, %115 tail call void @llvm.assume(i1 %117) %118 = icmp eq ptr %116, %27 br i1 %118, label %159, label %119 @@ -19624,7 +19646,7 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #27 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #25 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #25 attributes #0 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nofree norecurse nosync nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/libpng/optimized/pngwrite.ll b/bench/libpng/optimized/pngwrite.ll index 458499e313f..117513fef64 100644 --- a/bench/libpng/optimized/pngwrite.ll +++ b/bench/libpng/optimized/pngwrite.ll @@ -2954,10 +2954,9 @@ default.unreachable: ; preds = %.lr.ph.split.us.spl %211 = lshr i32 %210, 16 %212 = trunc nuw i32 %211 to i8 %.not1.us.i = icmp eq i32 %211, 255 - switch i32 %211, label %213 [ - i32 255, label %217 - i32 0, label %217 - ] + %.off.us.i = add nsw i32 %211, -1 + %switch.us.i = icmp ult i32 %.off.us.i, 254 + br i1 %switch.us.i, label %213, label %217 213: ; preds = %.lr.ph.split.split.split.us.i %214 = lshr i32 %208, 1 @@ -2965,8 +2964,8 @@ default.unreachable: ; preds = %.lr.ph.split.us.spl %216 = udiv i32 %215, %208 br label %217 -217: ; preds = %213, %.lr.ph.split.split.split.us.i, %.lr.ph.split.split.split.us.i - %.0.us.i = phi i32 [ %216, %213 ], [ 0, %.lr.ph.split.split.split.us.i ], [ 0, %.lr.ph.split.split.split.us.i ] +217: ; preds = %213, %.lr.ph.split.split.split.us.i + %.0.us.i = phi i32 [ %216, %213 ], [ 0, %.lr.ph.split.split.split.us.i ] %218 = getelementptr inbounds nuw i8, ptr %3, i64 %indvars.iv21.i store i8 %212, ptr %218, align 1, !tbaa !45 %indvars.iv.next22.i = add nuw nsw i64 %indvars.iv21.i, 1 @@ -3103,10 +3102,9 @@ png_unpremultiply.exit140.us.i: ; preds = %279, %278, %png_unp %306 = lshr i32 %305, 16 %307 = trunc nuw i32 %306 to i8 %.not1.i = icmp eq i32 %306, 255 - switch i32 %306, label %308 [ - i32 255, label %312 - i32 0, label %312 - ] + %.off.i = add nsw i32 %306, -1 + %switch.i = icmp ult i32 %.off.i, 254 + br i1 %switch.i, label %308, label %312 308: ; preds = %.lr.ph.split.split.split.i %309 = lshr i32 %303, 1 @@ -3114,8 +3112,8 @@ png_unpremultiply.exit140.us.i: ; preds = %279, %278, %png_unp %311 = udiv i32 %310, %303 br label %312 -312: ; preds = %308, %.lr.ph.split.split.split.i, %.lr.ph.split.split.split.i - %.0.i = phi i32 [ %311, %308 ], [ 0, %.lr.ph.split.split.split.i ], [ 0, %.lr.ph.split.split.split.i ] +312: ; preds = %308, %.lr.ph.split.split.split.i + %.0.i = phi i32 [ %311, %308 ], [ 0, %.lr.ph.split.split.split.i ] %313 = getelementptr inbounds nuw i8, ptr %3, i64 %indvars.iv.i store i8 %307, ptr %313, align 1, !tbaa !45 %indvars.iv.next.i = add nuw nsw i64 %indvars.iv.i, 1 @@ -3888,10 +3886,9 @@ define internal noundef i32 @png_write_image_8bit(ptr noundef readonly captures( %38 = trunc nuw i32 %37 to i8 %39 = getelementptr inbounds i8, ptr %.07184.us, i64 %.070 store i8 %38, ptr %39, align 1, !tbaa !45 - switch i32 %37, label %40 [ - i32 255, label %44 - i32 0, label %44 - ] + %.off.us = add nsw i32 %37, -1 + %switch.us = icmp ult i32 %.off.us, 254 + br i1 %switch.us, label %40, label %44 40: ; preds = %31 %41 = lshr i32 %34, 1 @@ -3899,8 +3896,8 @@ define internal noundef i32 @png_write_image_8bit(ptr noundef readonly captures( %43 = udiv i32 %42, %34 br label %44 -44: ; preds = %40, %31, %31 - %.067.us = phi i32 [ %43, %40 ], [ 0, %31 ], [ 0, %31 ] +44: ; preds = %40, %31 + %.067.us = phi i32 [ %43, %40 ], [ 0, %31 ] %45 = icmp ult i16 %.fr, 128 %46 = icmp ult i16 %.fr, -129 br i1 %45, label %png_unpremultiply.exit.us.us.preheader, label %.split.us95 diff --git a/bench/libuv/optimized/fs.ll b/bench/libuv/optimized/fs.ll index bd10f143ff8..863a35b8c24 100644 --- a/bench/libuv/optimized/fs.ll +++ b/bench/libuv/optimized/fs.ll @@ -1464,10 +1464,7 @@ thread-pre-split.i: ; preds = %uv__is_cifs_or_smb. br i1 %670, label %.outer.split.i.i, label %.outer68.i.i .split122.us.i.i: ; preds = %.split102.us109.i.i - switch i64 %.048104.us.i.i, label %.loopexit.thread.i.i [ - i64 -1, label %uv__fs_sendfile_emul.exit.i - i64 0, label %uv__fs_sendfile_emul.exit.i - ] + br i1 %665, label %uv__fs_sendfile_emul.exit.i, label %.loopexit.thread.i.i .preheader.i.i: ; preds = %.preheader.i.i.backedge, %.outer.split.i.i %671 = call i64 @write(i32 noundef %654, ptr noundef nonnull %678, i64 noundef %677) #15 @@ -1540,8 +1537,8 @@ thread-pre-split.i: ; preds = %uv__is_cifs_or_smb. store i64 %.047.ph95.i.i, ptr %29, align 8 br label %uv__fs_sendfile_emul.exit.i -uv__fs_sendfile_emul.exit.i: ; preds = %663, %672, %.loopexit.thread.i.i, %.loopexit.i.i, %.critedge6.i.i, %.split122.us.i.i, %.split122.us.i.i - %.161.i.i = phi i64 [ %.04881.i.i, %.loopexit.thread.i.i ], [ -1, %.loopexit.i.i ], [ -1, %.critedge6.i.i ], [ -1, %.split122.us.i.i ], [ -1, %.split122.us.i.i ], [ -1, %672 ], [ -1, %663 ] +uv__fs_sendfile_emul.exit.i: ; preds = %663, %672, %.loopexit.thread.i.i, %.loopexit.i.i, %.critedge6.i.i, %.split122.us.i.i + %.161.i.i = phi i64 [ %.04881.i.i, %.loopexit.thread.i.i ], [ -1, %.loopexit.i.i ], [ -1, %.critedge6.i.i ], [ -1, %.split122.us.i.i ], [ -1, %672 ], [ -1, %663 ] call void @llvm.lifetime.end.p0(ptr nonnull %7) call void @llvm.lifetime.end.p0(ptr nonnull %6) br label %uv__fs_sendfile.exit diff --git a/bench/libwebp/optimized/histogram_enc.ll b/bench/libwebp/optimized/histogram_enc.ll index 8a854d2f9dc..4072bcff048 100644 --- a/bench/libwebp/optimized/histogram_enc.ll +++ b/bench/libwebp/optimized/histogram_enc.ll @@ -2956,31 +2956,25 @@ define internal fastcc range(i32 0, 2) i32 @GetCombinedHistogramEntropy(ptr noun %36 = getelementptr inbounds nuw i8, ptr %1, i64 3244 %37 = load i32, ptr %36, align 4, !tbaa !53 %38 = icmp eq i32 %34, %37 - br i1 %38, label %39, label %46 - -39: ; preds = %35 - %40 = and i32 %34, 255 - %41 = add i32 %34, 16777216 - %or.cond = icmp ult i32 %41, 33554432 - br i1 %or.cond, label %42, label %46 - -42: ; preds = %39 - %43 = lshr i32 %34, 16 - %trunc = trunc i32 %43 to i8 - switch i8 %trunc, label %46 [ - i8 -1, label %44 - i8 0, label %44 - ] - -44: ; preds = %42, %42 - %switch.selectcmp.case1 = icmp eq i32 %40, 255 - %switch.selectcmp.case2 = icmp eq i32 %40, 0 - %switch.selectcmp = or i1 %switch.selectcmp.case1, %switch.selectcmp.case2 - %45 = zext i1 %switch.selectcmp to i32 + %39 = add i32 %34, 16777216 + %or.cond = icmp ult i32 %39, 33554432 + %or.cond76 = and i1 %or.cond, %38 + br i1 %or.cond76, label %40, label %46 + +40:; preds = %35 + %41 = and i32 %34, 255 + %42 = lshr i32 %34, 16 + %43 = and i32 %42, 255 + %44 = add nsw i32 %43, -255 + %switch = icmp ult i32 %44, -254 + %45 = add nsw i32 %41, -255 + %switch74 = icmp ult i32 %45, -254 + %or.cond75.not = and i1 %switch74, %switch + %spec.select = zext i1 %or.cond75.not to i32 br label %46 -46: ; preds = %44, %39, %42, %35, %32 - %.065 = phi i32 [ 0, %35 ], [ 0, %32 ], [ 0, %42 ], [ 0, %39 ], [ %45, %44 ] +46: ; preds = %40, %35, %32 + %.065 = phi i32 [ 0, %35 ], [ 0, %32 ], [ %spec.select, %40 ] %47 = getelementptr inbounds nuw i8, ptr %0, i64 8 %48 = getelementptr inbounds nuw i8, ptr %1, i64 8 %49 = getelementptr inbounds nuw i8, ptr %0, i64 3281 diff --git a/bench/lief/optimized/DyldChainedFixupsCreator.ll b/bench/lief/optimized/DyldChainedFixupsCreator.ll index 252ea760213..c6a86910aff 100644 --- a/bench/lief/optimized/DyldChainedFixupsCreator.ll +++ b/bench/lief/optimized/DyldChainedFixupsCreator.ll @@ -739,21 +739,17 @@ define hidden { i64, i8 } @_ZN4LIEF5MachO24DyldChainedFixupsCreator7lib2ordERKNS %9 = getelementptr inbounds nuw i8, ptr %2, i64 58 %10 = load i16, ptr %9, align 2, !tbaa !23 %11 = lshr i16 %10, 8 - %12 = zext nneg i16 %11 to i32 + %12 = zext nneg i16 %11 to i64 %trunc = trunc nuw i16 %11 to i8 - switch i8 %trunc, label %.thread [ - i8 -1, label %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit - i8 0, label %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit - i8 -2, label %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit - ] - -_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit: ; preds = %4, %4, %4 + %trunc.off = add i8 %trunc, -1 + %switch = icmp ult i8 %trunc.off, -3 %13 = getelementptr inbounds nuw i8, ptr %3, i64 8 - %14 = load i64, ptr %13, align 8, !tbaa !35 + %14 = load i64, ptr %13, align 8 %15 = icmp eq i64 %14, 0 - br i1 %15, label %.thread, label %16 + %or.cond = select i1 %switch, i1 true, i1 %15 + br i1 %or.cond, label %.thread, label %16 -16: ; preds = %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit +16: ; preds = %4 %17 = getelementptr inbounds nuw i8, ptr %0, i64 112 %18 = tail call ptr @_ZNSt10_HashtableINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEESt4pairIKS5_mESaIS8_ENSt8__detail10_Select1stESt8equal_toIS5_ESt4hashIS5_ENSA_18_Mod_range_hashingENSA_20_Default_ranged_hashENSA_20_Prime_rehash_policyENSA_17_Hashtable_traitsILb1ELb0ELb1EEEE4findERS7_(ptr noundef nonnull align 8 dereferenceable(56) %17, ptr noundef nonnull align 8 dereferenceable(32) %3) %.not = icmp eq ptr %18, null @@ -762,7 +758,6 @@ _ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit: ; preds = %4, %4, %4 19: ; preds = %16 %20 = getelementptr inbounds nuw i8, ptr %18, i64 40 %21 = load i64, ptr %20, align 8, !tbaa !8 - %.sroa.045.0.extract.trunc47 = trunc i64 %21 to i32 %.sroa.749.0.extract.shift52 = and i64 %21, -4294967296 br label %.thread @@ -885,15 +880,14 @@ _ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i _ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit: ; preds = %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmEC2IRS6_RmTnNSt9enable_ifIXaaclsr5_PCCPE22_MoveConstructiblePairIT_T0_EEclsr5_PCCPE30_ImplicitlyMoveConvertiblePairISC_SD_EEEbE4typeELb1EEEOSC_OSD_.exit, %_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE11_M_is_localEv.exit.i.i.i call void @llvm.lifetime.end.p0(ptr nonnull %8) - %.sroa.045.0.extract.trunc48 = trunc i64 %.lcssa.i.i.i to i32 %.sroa.749.0.extract.shift54 = and i64 %.lcssa.i.i.i, 9223372032559808512 br label %.thread -.thread: ; preds = %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit, %4, %.critedge.i.i.i.thread, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit, %19, %25 - %.sroa.045.1 = phi i32 [ 2, %25 ], [ %.sroa.045.0.extract.trunc47, %19 ], [ 2, %.critedge.i.i.i.thread ], [ %.sroa.045.0.extract.trunc48, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit ], [ %12, %4 ], [ %12, %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit ] - %.sroa.749.sroa.0.1 = phi i64 [ 0, %25 ], [ %.sroa.749.0.extract.shift52, %19 ], [ 0, %.critedge.i.i.i.thread ], [ %.sroa.749.0.extract.shift54, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit ], [ 0, %4 ], [ 0, %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit ] - %.sroa.749.sroa.5.1 = phi i8 [ 0, %25 ], [ 1, %19 ], [ 0, %.critedge.i.i.i.thread ], [ 1, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit ], [ 1, %4 ], [ 1, %_ZN4LIEF5MachO6Symbol22is_valid_index_ordinalEi.exit ] - %.sroa.045.0.insert.ext = zext i32 %.sroa.045.1 to i64 +.thread: ; preds = %4, %.critedge.i.i.i.thread, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit, %19, %25 + %.sroa.045.1 = phi i64 [ 2, %25 ], [ %21, %19 ], [ 2, %.critedge.i.i.i.thread ], [ %.lcssa.i.i.i, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit ], [ %12, %4 ] + %.sroa.749.sroa.0.1 = phi i64 [ 0, %25 ], [ %.sroa.749.0.extract.shift52, %19 ], [ 0, %.critedge.i.i.i.thread ], [ %.sroa.749.0.extract.shift54, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit ], [ 0, %4 ] + %.sroa.749.sroa.5.1 = phi i8 [ 0, %25 ], [ 1, %19 ], [ 0, %.critedge.i.i.i.thread ], [ 1, %_ZNSt4pairIKNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEEmED2Ev.exit ], [ 1, %4 ] + %.sroa.045.0.insert.ext = and i64 %.sroa.045.1, 4294967295 %.sroa.045.0.insert.insert = or disjoint i64 %.sroa.749.sroa.0.1, %.sroa.045.0.insert.ext %.fca.0.insert = insertvalue { i64, i8 } poison, i64 %.sroa.045.0.insert.insert, 0 %.fca.1.insert = insertvalue { i64, i8 } %.fca.0.insert, i8 %.sroa.749.sroa.5.1, 1 diff --git a/bench/lightgbm/optimized/tree.ll b/bench/lightgbm/optimized/tree.ll index 7a4da2fde9a..da68861304a 100644 --- a/bench/lightgbm/optimized/tree.ll +++ b/bench/lightgbm/optimized/tree.ll @@ -38955,13 +38955,11 @@ define linkonce_odr ptr @_ZN3fmt3v116detail5writeIcNS0_14basic_appenderIcEEEET0_ %7 = load i64, ptr %2, align 8, !tbaa !500 %8 = trunc i64 %7 to i8 %9 = and i8 %8, 7 - switch i8 %9, label %25 [ - i8 7, label %10 - i8 1, label %10 - i8 0, label %10 - ] + %.off.i = add nsw i8 %9, -2 + %switch.i = icmp ult i8 %.off.i, 5 + br i1 %switch.i, label %24, label %10 -10: ; preds = %4, %4, %4 +10: ; preds = %4 %11 = trunc i64 %7 to i32 %12 = and i32 %11, 56 %13 = icmp eq i32 %12, 32 @@ -38980,25 +38978,18 @@ define linkonce_odr ptr @_ZN3fmt3v116detail5writeIcNS0_14basic_appenderIcEEEET0_ unreachable _ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit: ; preds = %14 - switch i8 %9, label %25 [ - i8 7, label %19 - i8 1, label %19 - i8 0, label %19 - ] - -19: ; preds = %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit - %20 = and i64 %7, 7 - %21 = icmp eq i64 %20, 1 - %22 = zext i1 %21 to i8 + %19 = and i64 %7, 7 + %20 = icmp eq i64 %19, 1 + %21 = zext i1 %20 to i8 call void @llvm.lifetime.start.p0(ptr nonnull %5) - store i8 %22, ptr %5, align 1, !tbaa !530 + store i8 %21, ptr %5, align 1, !tbaa !530 %23 = getelementptr inbounds nuw i8, ptr %5, i64 1 store i8 %1, ptr %23, align 1, !tbaa !532 %24 = call ptr @_ZN3fmt3v116detail12write_paddedIcLNS0_5alignE1ENS0_14basic_appenderIcEERZNS1_10write_charIcS5_EET0_S7_T_RKNS0_12format_specsEEUlS5_E_EET1_SE_SB_mmOT2_(ptr %0, ptr noundef nonnull align 8 dereferenceable(20) %2, i64 noundef 1, i64 noundef 1, ptr noundef nonnull align 1 dereferenceable(2) %5) call void @llvm.lifetime.end.p0(ptr nonnull %5) br label %39 -25: ; preds = %4, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit +25: ; preds = %4 call void @llvm.lifetime.start.p0(ptr nonnull %6) %26 = and i64 %7, 16384 %.not = icmp eq i64 %26, 0 @@ -39017,7 +39008,7 @@ _ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit: ; preds = %14 br label %.critedge.i .critedge.i: ; preds = %..critedge.i_crit_edge, %25 - %31 = phi i64 [ %.pre, %..critedge.i_crit_edge ], [ %7, %25 ] + %31 = phi i64 [ %.pre, %..critedge.i_crit_edge ], [ %7, %24 ] %32 = lshr i64 %31, 10 %33 = and i64 %32, 3 %34 = getelementptr inbounds nuw i32, ptr @__const._ZN3fmt3v116detail18make_write_int_argIhEENS1_13write_int_argINSt11conditionalIXaalecl8num_bitsIT_EELi32EntLi0EEjNS4_IXlecl8num_bitsIS5_EELi64EEmoE4typeEE4typeEEES5_NS0_4signE.prefixes, i64 %33 @@ -39030,12 +39021,12 @@ _ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit: ; preds = %14 br label %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit _ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit: ; preds = %27, %.critedge.i - %.sroa.010.0.i = phi ptr [ %38, %.critedge.i ], [ %0, %27 ] + %.sroa.010.0.i = phi ptr [ %38, %.critedge.i ], [ %0, %26 ] call void @llvm.lifetime.end.p0(ptr nonnull %6) br label %39 -39: ; preds = %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit, %19 - %.sroa.08.0 = phi ptr [ %24, %19 ], [ %.sroa.010.0.i, %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit ] +39: ; preds = %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit + %.sroa.08.0 = phi ptr [ %24, %_ZN3fmt3v116detail16check_char_specsERKNS0_12format_specsE.exit ], [ %.sroa.010.0.i, %_ZN3fmt3v116detail5writeIchTnNSt9enable_ifIXaaaasr11is_integralIT0_EE5valuentsr3std7is_sameIS4_bEE5valuentsr3std7is_sameIS4_T_EE5valueEiE4typeELi0EEENS0_14basic_appenderIS5_EES9_S4_RKNS0_12format_specsENS1_10locale_refE.exit ] ret ptr %.sroa.08.0 } diff --git a/bench/llvm/optimized/MicrosoftMangle.ll b/bench/llvm/optimized/MicrosoftMangle.ll index 190b79a229f..628c0dcb162 100644 --- a/bench/llvm/optimized/MicrosoftMangle.ll +++ b/bench/llvm/optimized/MicrosoftMangle.ll @@ -19809,7 +19809,8 @@ _ZNK5clang8QualType18getLocalQualifiersEv.exit30.i: ; preds = %527, %.lr.ph.i410 %.sroa.0.0.i29.i = phi i64 [ %.sroa.0.0.copyload.i.i28.i, %527 ], [ 0, %.lr.ph.i410 ] %531 = and i64 %525, 7 %532 = or i64 %.sroa.0.0.i29.i, %531 - %switch.i = icmp eq i32 %.tr109129.i, 1 + %.off.i = add nsw i32 %.tr109129.i, -1 + %switch.i = icmp ult i32 %.off.i, 2 br i1 %switch.i, label %533, label %_ZN12_GLOBAL__N_123MicrosoftCXXNameMangler16mangleQualifiersEN5clang10QualifiersEb.exit35.i 533: ; preds = %_ZNK5clang8QualType18getLocalQualifiersEv.exit30.i diff --git a/bench/lvgl/optimized/lv_fs.ll b/bench/lvgl/optimized/lv_fs.ll index ccb01926ee5..c84fc1aa3de 100644 --- a/bench/lvgl/optimized/lv_fs.ll +++ b/bench/lvgl/optimized/lv_fs.ll @@ -156,10 +156,9 @@ lv_fs_get_drv.exit: ; preds = %.lr.ph.i 31: ; preds = %26 %32 = tail call ptr %24(ptr noundef nonnull %13, ptr noundef %.0.i, i32 noundef %2) #6 %magicptr49 = ptrtoint ptr %32 to i64 - switch i64 %magicptr49, label %33 [ - i64 -1, label %lv_fs_get_drv.exit.thread - i64 0, label %lv_fs_get_drv.exit.thread - ] + %magicptr.off = add i64 %magicptr49, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %33, label %lv_fs_get_drv.exit.thread 33: ; preds = %31 store ptr %32, ptr %0, align 8, !tbaa !20 @@ -204,8 +203,8 @@ lv_fs_get_drv.exit.thread.sink.split: ; preds = %47, %40 store i32 %.sink, ptr %48, align 4, !tbaa !29 br label %lv_fs_get_drv.exit.thread -lv_fs_get_drv.exit.thread: ; preds = %16, %lv_fs_get_drv.exit.thread.sink.split, %31, %31, %lv_fs_resolve_path.exit, %20, %22, %33, %3 - %.0 = phi i32 [ 11, %3 ], [ 1, %20 ], [ 9, %22 ], [ 0, %33 ], [ 3, %lv_fs_resolve_path.exit ], [ 12, %31 ], [ 12, %31 ], [ 0, %lv_fs_get_drv.exit.thread.sink.split ], [ 3, %16 ] +lv_fs_get_drv.exit.thread: ; preds = %16, %lv_fs_get_drv.exit.thread.sink.split, %lv_fs_resolve_path.exit, %31, %20, %22, %33, %3 + %.0 = phi i32 [ 11, %3 ], [ 1, %20 ], [ 9, %22 ], [ 0, %33 ], [ 12, %31 ], [ 3, %lv_fs_resolve_path.exit ], [ 0, %lv_fs_get_drv.exit.thread.sink.split ], [ 3, %16 ] ret i32 %.0 } @@ -865,10 +864,9 @@ lv_fs_get_drv.exit: ; preds = %.lr.ph.i 25: ; preds = %21 %26 = tail call ptr %23(ptr noundef nonnull %12, ptr noundef %.0.i) #6 %magicptr = ptrtoint ptr %26 to i64 - switch i64 %magicptr, label %27 [ - i64 -1, label %lv_fs_get_drv.exit.thread - i64 0, label %lv_fs_get_drv.exit.thread - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %27, label %lv_fs_get_drv.exit.thread 27: ; preds = %25 %28 = getelementptr inbounds nuw i8, ptr %0, i64 8 @@ -876,8 +874,8 @@ lv_fs_get_drv.exit: ; preds = %.lr.ph.i store ptr %26, ptr %0, align 8, !tbaa !39 br label %lv_fs_get_drv.exit.thread -lv_fs_get_drv.exit.thread: ; preds = %15, %lv_fs_resolve_path.exit, %19, %21, %25, %25, %27, %2 - %.0 = phi i32 [ 11, %2 ], [ 1, %19 ], [ 9, %21 ], [ 0, %27 ], [ 12, %25 ], [ 12, %25 ], [ 3, %lv_fs_resolve_path.exit ], [ 3, %15 ] +lv_fs_get_drv.exit.thread: ; preds = %15, %lv_fs_resolve_path.exit, %25, %19, %21, %27, %2 + %.0 = phi i32 [ 11, %2 ], [ 1, %19 ], [ 9, %21 ], [ 0, %27 ], [ 12, %25 ], [ 3, %lv_fs_resolve_path.exit ], [ 3, %15 ] ret i32 %.0 } diff --git a/bench/meilisearch-rs/optimized/7ttx3vegu0k1psi.ll b/bench/meilisearch-rs/optimized/7ttx3vegu0k1psi.ll index 4cdc85e0436..2a0c44ee117 100644 --- a/bench/meilisearch-rs/optimized/7ttx3vegu0k1psi.ll +++ b/bench/meilisearch-rs/optimized/7ttx3vegu0k1psi.ll @@ -615,8 +615,11 @@ define hidden noundef zeroext i1 @"_ZN13generic_array3hex91_$LT$impl$u20$core..f call void @llvm.lifetime.start.p0(ptr nonnull %3) call void @llvm.memset.p0.i64(ptr noundef nonnull align 1 dereferenceable(64) %3, i8 0, i64 64, i1 false), !alias.scope !60 tail call void @llvm.experimental.noalias.scope.decl(metadata !63) - %.sroa.0.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 32) - %.not.i = icmp eq i64 %10, 0 + %.sroa.0.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 32) + %.off.i.i = add nsw i8 %11, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.sroa.0.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 32, i64 %10 + %.not.i = icmp eq i64 %.sroa.0.0.sroa.speculated.i.i, 0 br i1 %.not.i, label %"_ZN98_$LT$core..iter..adapters..take..Take$LT$I$GT$$u20$as$u20$core..iter..adapters..take..SpecTake$GT$9spec_fold17hb04d8091f54687caE.exit", label %.lr.ph.i .lr.ph.i: ; preds = %2 @@ -3754,6 +3757,9 @@ declare void @llvm.lifetime.start.p0(ptr captures(none)) #12 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(ptr captures(none)) #12 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #13 + ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.umin.i64(i64, i64) #13 diff --git a/bench/mitsuba3/optimized/diffuse.ll b/bench/mitsuba3/optimized/diffuse.ll index bbbbb108f35..fbc3a4777d6 100644 --- a/bench/mitsuba3/optimized/diffuse.ll +++ b/bench/mitsuba3/optimized/diffuse.ll @@ -768,10 +768,9 @@ define weak_odr void @_ZNK7mitsuba13SmoothDiffuseIfN5drjit6MatrixINS_8SpectrumIf _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit: ; preds = %6 %17 = getelementptr inbounds nuw i8, ptr %2, i64 8 %18 = load i32, ptr %17, align 4 - switch i32 %18, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread [ - i32 -1, label %33 - i32 0, label %33 - ] + %.off = add i32 %18, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %33 _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %6 store <4 x float> zeroinitializer, ptr %10, align 16 @@ -814,7 +813,7 @@ _ZN5drjit15StaticArrayImplINS_5ArrayIN7mitsuba8SpectrumIfLm4EEELm4EEELm4ELb0ENS_ %exitcond95.not = icmp eq i64 %32, 4 br i1 %exitcond95.not, label %.loopexit, label %29, !llvm.loop !10 -33: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit +33: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit %34 = getelementptr inbounds nuw i8, ptr %3, i64 216 %35 = load float, ptr %34, align 8 %36 = getelementptr inbounds nuw i8, ptr %4, i64 8 @@ -939,12 +938,11 @@ define weak_odr noundef float @_ZNK7mitsuba13SmoothDiffuseIfN5drjit6MatrixINS_8S _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit: ; preds = %5 %9 = getelementptr inbounds nuw i8, ptr %1, i64 8 %10 = load i32, ptr %9, align 4 - switch i32 %10, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread [ - i32 -1, label %11 - i32 0, label %11 - ] + %.off = add i32 %10, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %11 -11: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit +11: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit %12 = getelementptr inbounds nuw i8, ptr %2, i64 216 %13 = load float, ptr %12, align 8 %14 = getelementptr inbounds nuw i8, ptr %3, i64 8 @@ -981,10 +979,9 @@ define weak_odr void @_ZNK7mitsuba13SmoothDiffuseIfN5drjit6MatrixINS_8SpectrumIf _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit: ; preds = %6 %18 = getelementptr inbounds nuw i8, ptr %2, i64 8 %19 = load i32, ptr %18, align 4 - switch i32 %19, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread [ - i32 -1, label %35 - i32 0, label %35 - ] + %.off = add i32 %19, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %35 _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %6 call void @llvm.lifetime.start.p0(ptr nonnull %10) @@ -1034,7 +1031,7 @@ _ZNSt3__14pairIN5drjit6MatrixIN7mitsuba8SpectrumIfLm4EEELm4EEEfEC2B8ne190000IffT call void @llvm.lifetime.end.p0(ptr nonnull %10) br label %89 -35: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit +35: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit %36 = getelementptr inbounds nuw i8, ptr %3, i64 216 %37 = load float, ptr %36, align 8 %38 = getelementptr inbounds nuw i8, ptr %4, i64 8 diff --git a/bench/mitsuba3/optimized/measured.ll b/bench/mitsuba3/optimized/measured.ll index 2fb37c7c617..278a4743544 100644 --- a/bench/mitsuba3/optimized/measured.ll +++ b/bench/mitsuba3/optimized/measured.ll @@ -4562,25 +4562,22 @@ define weak_odr void @_ZNK7mitsuba8MeasuredIfN5drjit6MatrixINS_8SpectrumIfLm4EEE %25 = getelementptr inbounds nuw i8, ptr %3, i64 208 %.sroa.0318.0.copyload = load <4 x float>, ptr %25, align 16 %.sroa.0318.8.vec.extract = extractelement <4 x float> %.sroa.0318.0.copyload, i64 2 - %26 = fcmp contract ogt float %.sroa.0318.8.vec.extract, 0.000000e+00 - %27 = getelementptr inbounds nuw i8, ptr %2, i64 4 - %28 = load i32, ptr %27, align 4 - %29 = and i32 %28, 8 - %.not = icmp eq i32 %29, 0 + %26 = getelementptr inbounds nuw i8, ptr %2, i64 4 + %27 = load i32, ptr %26, align 4 + %28 = and i32 %27, 8 + %.not = icmp eq i32 %28, 0 br i1 %.not, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit: ; preds = %7 + %29 = fcmp contract ogt float %.sroa.0318.8.vec.extract, 0.000000e+00 %30 = getelementptr inbounds nuw i8, ptr %2, i64 8 %31 = load i32, ptr %30, align 4 - switch i32 %31, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread [ - i32 -1, label %32 - i32 0, label %32 - ] - -32: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit - br i1 %26, label %48, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread + %32 = add i32 %31, 1 + %switch = icmp ult i32 %32, 2 + %or.cond.not = select i1 %switch, i1 %29, i1 false + br i1 %or.cond.not, label %48, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread -_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %7, %32 +_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %7 call void @llvm.lifetime.start.p0(ptr nonnull %15) %33 = getelementptr inbounds nuw i8, ptr %0, i64 32 tail call void @llvm.memset.p0.i64(ptr noundef nonnull align 16 dereferenceable(32) %0, i8 0, i64 32, i1 false) @@ -4628,7 +4625,7 @@ _ZNSt3__14pairIN7mitsuba11BSDFSample3IfN5drjit6MatrixINS1_8SpectrumIfLm4EEELm4EE call void @llvm.lifetime.end.p0(ptr nonnull %15) br label %325 -48: ; preds = %32 +48: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit %49 = getelementptr inbounds nuw i8, ptr %1, i64 852 %50 = load i32, ptr %49, align 4 %51 = icmp sgt i32 %50, 1 @@ -6277,30 +6274,27 @@ define weak_odr void @_ZNK7mitsuba8MeasuredIfN5drjit6MatrixINS_8SpectrumIfLm4EEE %18 = getelementptr inbounds nuw i8, ptr %3, i64 208 %.sroa.0313.0.copyload = load <4 x float>, ptr %18, align 16 %.sroa.0309.0.copyload = load <4 x float>, ptr %4, align 16 - %.sroa.0313.8.vec.extract = extractelement <4 x float> %.sroa.0313.0.copyload, i64 2 - %19 = fcmp contract ogt float %.sroa.0313.8.vec.extract, 0.000000e+00 %.012.i.i.sroa.gep285 = getelementptr inbounds nuw i8, ptr %14, i64 4 - %.sroa.0309.8.vec.extract = extractelement <4 x float> %.sroa.0309.0.copyload, i64 2 - %20 = fcmp contract ogt float %.sroa.0309.8.vec.extract, 0.000000e+00 - %narrow = select i1 %19, i1 %20, i1 false - %21 = getelementptr inbounds nuw i8, ptr %2, i64 4 - %22 = load i32, ptr %21, align 4 - %23 = and i32 %22, 8 - %.not = icmp eq i32 %23, 0 + %19 = getelementptr inbounds nuw i8, ptr %2, i64 4 + %20 = load i32, ptr %19, align 4 + %21 = and i32 %20, 8 + %.not = icmp eq i32 %21, 0 br i1 %.not, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit: ; preds = %6 + %.sroa.0313.8.vec.extract = extractelement <4 x float> %.sroa.0313.0.copyload, i64 2 + %22 = fcmp contract ule float %.sroa.0313.8.vec.extract, 0.000000e+00 + %.sroa.0309.8.vec.extract = extractelement <4 x float> %.sroa.0309.0.copyload, i64 2 + %23 = fcmp contract ule float %.sroa.0309.8.vec.extract, 0.000000e+00 %24 = getelementptr inbounds nuw i8, ptr %2, i64 8 %25 = load i32, ptr %24, align 4 - switch i32 %25, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread [ - i32 -1, label %26 - i32 0, label %26 - ] + %.off = add i32 %25, -1 + %switch = icmp ult i32 %.off, -2 + %26 = select i1 %switch, i1 true, i1 %22 + %brmerge = select i1 %26, i1 true, i1 %23 + br i1 %brmerge, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %41 -26: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit - br i1 %narrow, label %41, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread - -_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %6, %26 +26: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %6 store <4 x float> zeroinitializer, ptr %10, align 16 call void @llvm.lifetime.start.p0(ptr nonnull %9) br label %27 @@ -6341,7 +6335,7 @@ _ZN5drjit15StaticArrayImplINS_5ArrayIN7mitsuba8SpectrumIfLm4EEELm4EEELm4ELb0ENS_ %exitcond351.not = icmp eq i64 %40, 4 br i1 %exitcond351.not, label %.loopexit, label %37, !llvm.loop !73 -41: ; preds = %26 +41: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit %42 = getelementptr inbounds nuw i8, ptr %1, i64 852 %43 = load i32, ptr %42, align 4 %44 = icmp sgt i32 %43, 1 @@ -7194,30 +7188,27 @@ define weak_odr noundef float @_ZNK7mitsuba8MeasuredIfN5drjit6MatrixINS_8Spectru %8 = getelementptr inbounds nuw i8, ptr %2, i64 208 %.sroa.0240.0.copyload = load <4 x float>, ptr %8, align 16 %.sroa.0236.0.copyload = load <4 x float>, ptr %3, align 16 - %.sroa.0240.8.vec.extract = extractelement <4 x float> %.sroa.0240.0.copyload, i64 2 - %9 = fcmp contract ogt float %.sroa.0240.8.vec.extract, 0.000000e+00 %.012.i.i.sroa.gep215 = getelementptr inbounds nuw i8, ptr %7, i64 4 - %.sroa.0236.8.vec.extract = extractelement <4 x float> %.sroa.0236.0.copyload, i64 2 - %10 = fcmp contract ogt float %.sroa.0236.8.vec.extract, 0.000000e+00 - %narrow = select i1 %9, i1 %10, i1 false - %11 = getelementptr inbounds nuw i8, ptr %1, i64 4 - %12 = load i32, ptr %11, align 4 - %13 = and i32 %12, 8 - %.not = icmp eq i32 %13, 0 + %9 = getelementptr inbounds nuw i8, ptr %1, i64 4 + %10 = load i32, ptr %9, align 4 + %11 = and i32 %10, 8 + %.not = icmp eq i32 %11, 0 br i1 %.not, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit: ; preds = %5 + %.sroa.0240.8.vec.extract = extractelement <4 x float> %.sroa.0240.0.copyload, i64 2 + %12 = fcmp contract ule float %.sroa.0240.8.vec.extract, 0.000000e+00 + %.sroa.0236.8.vec.extract = extractelement <4 x float> %.sroa.0236.0.copyload, i64 2 + %13 = fcmp contract ule float %.sroa.0236.8.vec.extract, 0.000000e+00 %14 = getelementptr inbounds nuw i8, ptr %1, i64 8 %15 = load i32, ptr %14, align 4 - switch i32 %15, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread [ - i32 -1, label %16 - i32 0, label %16 - ] + %.off = add i32 %15, -1 + %switch = icmp ult i32 %.off, -2 + %16 = select i1 %switch, i1 true, i1 %12 + %brmerge = select i1 %16, i1 true, i1 %13 + br i1 %brmerge, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread, label %17 -16: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit - br i1 %narrow, label %17, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread - -17: ; preds = %16 +16: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit %18 = getelementptr inbounds nuw i8, ptr %0, i64 852 %19 = load i32, ptr %18, align 4 %20 = icmp sgt i32 %19, 1 @@ -7424,8 +7415,8 @@ _ZN7mitsuba5PointIfLm2EECI2N5drjit15StaticArrayImplIfLm2ELb0ES1_iEEIfNS_6VectorI %178 = fdiv contract float %173, %177 br label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread -_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %5, %_ZN7mitsuba5PointIfLm2EECI2N5drjit15StaticArrayImplIfLm2ELb0ES1_iEEIfNS_6VectorIfLm2EEES1_TnNSt3__19enable_ifIXaaeqsrT1_4SizesrT0_4SizeeqsrS8_5DepthsrS9_5DepthEiE4typeELi0EEERKNS2_9ArrayBaseIT_Lb0ES9_EE.exit.critedge, %16 - %.0 = phi float [ 0.000000e+00, %16 ], [ 0.000000e+00, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit ], [ %178, %_ZN7mitsuba5PointIfLm2EECI2N5drjit15StaticArrayImplIfLm2ELb0ES1_iEEIfNS_6VectorIfLm2EEES1_TnNSt3__19enable_ifIXaaeqsrT1_4SizesrT0_4SizeeqsrS8_5DepthsrS9_5DepthEiE4typeELi0EEERKNS2_9ArrayBaseIT_Lb0ES9_EE.exit.critedge ], [ 0.000000e+00, %5 ] +_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit, %5, %_ZN7mitsuba5PointIfLm2EECI2N5drjit15StaticArrayImplIfLm2ELb0ES1_iEEIfNS_6VectorIfLm2EEES1_TnNSt3__19enable_ifIXaaeqsrT1_4SizesrT0_4SizeeqsrS8_5DepthsrS9_5DepthEiE4typeELi0EEERKNS2_9ArrayBaseIT_Lb0ES9_EE.exit.critedge + %.0 = phi float [ 0.000000e+00, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit ], [ %178, %_ZN7mitsuba5PointIfLm2EECI2N5drjit15StaticArrayImplIfLm2ELb0ES1_iEEIfNS_6VectorIfLm2EEES1_TnNSt3__19enable_ifIXaaeqsrT1_4SizesrT0_4SizeeqsrS8_5DepthsrS9_5DepthEiE4typeELi0EEERKNS2_9ArrayBaseIT_Lb0ES9_EE.exit.critedge ], [ 0.000000e+00, %5 ] ret float %.0 } diff --git a/bench/mitsuba3/optimized/plastic.ll b/bench/mitsuba3/optimized/plastic.ll index 277b13ecede..0eed7d3a330 100644 --- a/bench/mitsuba3/optimized/plastic.ll +++ b/bench/mitsuba3/optimized/plastic.ll @@ -1982,15 +1982,12 @@ _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit: ; preds = %5 18: ; preds = %17 %19 = and i32 %13, 32 %.not35 = icmp eq i32 %19, 0 - br i1 %.not35, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28.thread, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28 + %.off = add nsw i32 %16, -1 + %switch = icmp ult i32 %.off, -2 + %or.cond = select i1 %.not35, i1 true, i1 %switch + br i1 %or.cond, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28.thread, label %20 _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28: ; preds = %18 - switch i32 %16, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28.thread [ - i32 -1, label %20 - i32 0, label %20 - ] - -20: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28 %21 = getelementptr inbounds nuw i8, ptr %0, i64 80 %22 = load float, ptr %21, align 8 %23 = fdiv contract float 1.000000e+00, %22 @@ -2025,8 +2022,8 @@ _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28: ; preds = %18 %50 = fdiv contract float %48, %49 br label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28.thread -_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28.thread: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28, %18, %20 - %.025 = phi float [ %50, %20 ], [ 1.000000e+00, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28 ], [ 1.000000e+00, %18 ] +_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28.thread: ; preds = %18, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit28 + %.025 = phi float [ %50, %20 ], [ 1.000000e+00, %18 ] %51 = fmul contract float %9, 0x3FD45F3060000000 %52 = fmul contract float %51, %.025 br label %.critedge @@ -2201,12 +2198,11 @@ _ZNSt3__14pairIN5drjit6MatrixIN7mitsuba8SpectrumIfLm4EEELm4EEEfEC2B8ne190000IffT _ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit242: ; preds = %47 %117 = load i32, ptr %22, align 4 - switch i32 %117, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit242.thread [ - i32 -1, label %118 - i32 0, label %118 - ] + %.off = add i32 %117, -1 + %switch = icmp ult i32 %.off, -2 + br i1 %switch, label %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit242.thread, label %118 -118: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit242, %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit242 +118: ; preds = %_ZNK7mitsuba11BSDFContext10is_enabledENS_9BSDFFlagsEj.exit242 %119 = fmul contract float %spec.select.i232, %99 %120 = fsub contract float 1.000000e+00, %99 %121 = fmul contract float %107, %120 diff --git a/bench/nix/optimized/installable-value.ll b/bench/nix/optimized/installable-value.ll index f6b7107d16d..7feb409c900 100644 --- a/bench/nix/optimized/installable-value.ll +++ b/bench/nix/optimized/installable-value.ll @@ -12423,7 +12423,7 @@ _ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St9_Identi define linkonce_odr void @_ZSt10__do_visitINSt8__detail9__variant20__variant_idx_cookieEZNS1_15_Move_ctor_baseILb0EJN3nix17DerivedPathOpaqueENS4_16DerivedPathBuiltEEEC1EOS7_EUlOT_T0_E_JSt7variantIJS5_S6_EEEEDcOSB_DpOT1_(ptr noundef nonnull align 8 dereferenceable(8) %0, ptr noundef nonnull align 8 dereferenceable(73) %1) local_unnamed_addr #4 comdat personality ptr @__gxx_personality_v0 { %3 = getelementptr inbounds nuw i8, ptr %1, i64 72 %4 = load i8, ptr %3, align 8 - switch i8 %4, label %62 [ + switch i8 %4, label %63 [ i8 0, label %5 i8 1, label %20 i8 -1, label %63 @@ -12496,21 +12496,23 @@ _ZN3nix3refINS_17SingleDerivedPathEEC2ERKS2_.exit.i.i.i.i.i.i.i.i.i: ; preds = % store i8 -1, ptr %34, align 8 %35 = getelementptr inbounds nuw i8, ptr %1, i64 64 %36 = load i8, ptr %35, align 8 - %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq i8 %36, 1 - br i1 %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %37, label %_ZNSt8__detail9__variant17__gen_vtable_implINS0_12_Multi_arrayIPFNS0_20__variant_idx_cookieEOZNS0_15_Move_ctor_baseILb0EJN3nix17DerivedPathOpaqueENS5_16DerivedPathBuiltEEEC1EOS8_EUlOT_T0_E_OSt7variantIJS6_S7_EEEJEEESt16integer_sequenceImJLm1EEEE14__visit_invokeESE_SH_.exit - -37: ; preds = %_ZN3nix3refINS_17SingleDerivedPathEEC2ERKS2_.exit.i.i.i.i.i.i.i.i.i - %38 = getelementptr inbounds nuw i8, ptr %21, i64 24 - %39 = getelementptr inbounds nuw i8, ptr %1, i64 32 - %40 = load ptr, ptr %39, align 8 - %.not.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq ptr %40, null - br i1 %.not.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %56, label %41 + %37 = sext i8 %36 to i64 + %.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = add nsw i64 %37, -1 + %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp ult i64 %.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, -2 + br i1 %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %38, label %_ZNSt8__detail9__variant17__gen_vtable_implINS0_12_Multi_arrayIPFNS0_20__variant_idx_cookieEOZNS0_15_Move_ctor_baseILb0EJN3nix17DerivedPathOpaqueENS5_16DerivedPathBuiltEEEC1EOS8_EUlOT_T0_E_OSt7variantIJS6_S7_EEEJEEESt16integer_sequenceImJLm1EEEE14__visit_invokeESE_SH_.exit + +38: ; preds = %_ZN3nix3refINS_17SingleDerivedPathEEC2ERKS2_.exit.i.i.i.i.i.i.i.i.i + %39 = getelementptr inbounds nuw i8, ptr %21, i64 24 + %40 = getelementptr inbounds nuw i8, ptr %1, i64 32 + %41 = load ptr, ptr %40, align 8 + %.not.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq ptr %41, null + br i1 %.not.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %57, label %42 -41: ; preds = %37 +41: ; preds = %38 %42 = getelementptr inbounds nuw i8, ptr %1, i64 24 %43 = load i32, ptr %42, align 8 - store i32 %43, ptr %38, align 8 - %44 = load ptr, ptr %39, align 8 + store i32 %43, ptr %39, align 8 + %44 = load ptr, ptr %40, align 8 %45 = getelementptr inbounds nuw i8, ptr %21, i64 32 store ptr %44, ptr %45, align 8 %46 = getelementptr inbounds nuw i8, ptr %1, i64 40 @@ -12522,25 +12524,25 @@ _ZN3nix3refINS_17SingleDerivedPathEEC2ERKS2_.exit.i.i.i.i.i.i.i.i.i: ; preds = % %51 = getelementptr inbounds nuw i8, ptr %21, i64 48 store ptr %50, ptr %51, align 8 %52 = getelementptr inbounds nuw i8, ptr %44, i64 8 - store ptr %38, ptr %52, align 8 + store ptr %39, ptr %52, align 8 %53 = getelementptr inbounds nuw i8, ptr %1, i64 56 %54 = load i64, ptr %53, align 8 %55 = getelementptr inbounds nuw i8, ptr %21, i64 56 store i64 %54, ptr %55, align 8 - store ptr null, ptr %39, align 8 + store ptr null, ptr %40, align 8 store ptr %42, ptr %46, align 8 store ptr %42, ptr %49, align 8 store i64 0, ptr %53, align 8 br label %_ZNSt8__detail9__variant17__gen_vtable_implINS0_12_Multi_arrayIPFNS0_20__variant_idx_cookieEOZNS0_15_Move_ctor_baseILb0EJN3nix17DerivedPathOpaqueENS5_16DerivedPathBuiltEEEC1EOS8_EUlOT_T0_E_OSt7variantIJS6_S7_EEEJEEESt16integer_sequenceImJLm1EEEE14__visit_invokeESE_SH_.exit -56: ; preds = %37 - store i32 0, ptr %38, align 8 +56: ; preds = %38 + store i32 0, ptr %39, align 8 %57 = getelementptr inbounds nuw i8, ptr %21, i64 32 store ptr null, ptr %57, align 8 %58 = getelementptr inbounds nuw i8, ptr %21, i64 40 - store ptr %38, ptr %58, align 8 + store ptr %39, ptr %58, align 8 %59 = getelementptr inbounds nuw i8, ptr %21, i64 48 - store ptr %38, ptr %59, align 8 + store ptr %39, ptr %59, align 8 %60 = getelementptr inbounds nuw i8, ptr %21, i64 56 store i64 0, ptr %60, align 8 br label %_ZNSt8__detail9__variant17__gen_vtable_implINS0_12_Multi_arrayIPFNS0_20__variant_idx_cookieEOZNS0_15_Move_ctor_baseILb0EJN3nix17DerivedPathOpaqueENS5_16DerivedPathBuiltEEEC1EOS8_EUlOT_T0_E_OSt7variantIJS6_S7_EEEJEEESt16integer_sequenceImJLm1EEEE14__visit_invokeESE_SH_.exit diff --git a/bench/nix/optimized/local-derivation-goal.ll b/bench/nix/optimized/local-derivation-goal.ll index 3cee3846157..db1b55f86a5 100644 --- a/bench/nix/optimized/local-derivation-goal.ll +++ b/bench/nix/optimized/local-derivation-goal.ll @@ -115292,8 +115292,10 @@ _ZN3nix3refINS_17SingleDerivedPathEEC2ERKS2_.exit: ; preds = %2, %11, %14 store i8 -1, ptr %17, align 8 %18 = getelementptr inbounds nuw i8, ptr %1, i64 64 %19 = load i8, ptr %18, align 8 - %switch.i.i.i.i.i.i.i.i.i = icmp eq i8 %19, 1 - br i1 %switch.i.i.i.i.i.i.i.i.i, label %20, label %39 + %20 = sext i8 %19 to i64 + %.off.i.i.i.i.i.i.i.i.i = add nsw i64 %20, -1 + %switch.i.i.i.i.i.i.i.i.i = icmp ult i64 %.off.i.i.i.i.i.i.i.i.i, -2 + br i1 %switch.i.i.i.i.i.i.i.i.i, label %21, label %40 20: ; preds = %_ZN3nix3refINS_17SingleDerivedPathEEC2ERKS2_.exit %21 = getelementptr inbounds nuw i8, ptr %0, i64 24 @@ -115318,7 +115320,7 @@ _ZN3nix3refINS_17SingleDerivedPathEEC2ERKS2_.exit: ; preds = %2, %11, %14 to label %.noexc.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i unwind label %.body .noexc.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i: ; preds = %28, %.noexc.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i - %.0.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = phi ptr [ %31, %.noexc.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i ], [ %29, %28 ] + %.0.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = phi ptr [ %31, %.noexc.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i ], [ %29, %29 ] %30 = getelementptr inbounds nuw i8, ptr %.0.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, i64 16 %31 = load ptr, ptr %30, align 8 %.not.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq ptr %31, null @@ -115329,7 +115331,7 @@ _ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St9_Identi br label %32 32: ; preds = %32, %_ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE10_S_minimumEPSt18_Rb_tree_node_base.exit.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i - %.0.i.i7.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = phi ptr [ %29, %_ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE10_S_minimumEPSt18_Rb_tree_node_base.exit.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i ], [ %34, %32 ] + %.0.i.i7.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = phi ptr [ %29, %_ZNSt8_Rb_treeINSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEEES5_St9_IdentityIS5_ESt4lessIS5_ESaIS5_EE10_S_minimumEPSt18_Rb_tree_node_base.exit.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i ], [ %34, %33 ] %33 = getelementptr inbounds nuw i8, ptr %.0.i.i7.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, i64 24 %34 = load ptr, ptr %33, align 8 %.not.i.i8.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq ptr %34, null diff --git a/bench/node/optimized/fs.ll b/bench/node/optimized/fs.ll index 85080ddf141..3edcf66bffe 100644 --- a/bench/node/optimized/fs.ll +++ b/bench/node/optimized/fs.ll @@ -1449,10 +1449,7 @@ for.cond28.preheader.i.i: ; preds = %do.body.us80.i.i, % br i1 %cmp29120.i.i, label %for.cond28.outer.split.i.i, label %for.end.i.i if.end23.i.i: ; preds = %if.then14.us.i.i - switch i64 %nsent.075.us.i.i, label %if.then78.i.i [ - i64 -1, label %uv__fs_sendfile_emul.exit.i - i64 0, label %uv__fs_sendfile_emul.exit.i - ] + br i1 %cmp16.us.i.i, label %uv__fs_sendfile_emul.exit.i, label %if.then78.i.i do.body31.i.i: ; preds = %do.body31.i.i.backedge, %for.cond28.outer.split.i.i %call34.i.i = call i64 @write(i32 noundef %160, ptr noundef nonnull %add.ptr122.i.i, i64 noundef %sub33123.i.i) #15 @@ -1525,8 +1522,8 @@ if.then78.i.i: ; preds = %out.i.i, %if.end23. store i64 %offset.0.ph67.i.i, ptr %off1.i.i, align 8 br label %uv__fs_sendfile_emul.exit.i -uv__fs_sendfile_emul.exit.i: ; preds = %land.lhs.true17.us.i.i, %land.rhs37.i.i, %if.then78.i.i, %out.i.i, %if.then70.i.i, %if.end23.i.i, %if.end23.i.i - %nsent.137.i.i = phi i64 [ %nsent.054.i.i, %if.then78.i.i ], [ -1, %out.i.i ], [ -1, %if.then70.i.i ], [ -1, %if.end23.i.i ], [ -1, %if.end23.i.i ], [ -1, %land.rhs37.i.i ], [ -1, %land.lhs.true17.us.i.i ] +uv__fs_sendfile_emul.exit.i: ; preds = %land.lhs.true17.us.i.i, %land.rhs37.i.i, %if.then78.i.i, %out.i.i, %if.then70.i.i, %if.end23.i.i + %nsent.137.i.i = phi i64 [ %nsent.054.i.i, %if.then78.i.i ], [ -1, %out.i.i ], [ -1, %if.then70.i.i ], [ -1, %if.end23.i.i ], [ -1, %land.rhs37.i.i ], [ -1, %land.lhs.true17.us.i.i ] call void @llvm.lifetime.end.p0(ptr nonnull %pfd.i.i) call void @llvm.lifetime.end.p0(ptr nonnull %buf.i.i) br label %uv__fs_sendfile.exit diff --git a/bench/node/optimized/libnode.node_large_page.ll b/bench/node/optimized/libnode.node_large_page.ll index e329be5d138..3e2cbb18c15 100644 --- a/bench/node/optimized/libnode.node_large_page.ll +++ b/bench/node/optimized/libnode.node_large_page.ll @@ -574,10 +574,9 @@ if.end12.i: ; preds = %if.end7.i br i1 %cmp15.i, label %fail.i, label %if.end17.i if.end17.i: ; preds = %if.end12.i - switch i64 %sub.ptr.rhs.cast.i7, label %if.then.i.i [ - i64 -1, label %cleanup.i12 - i64 0, label %cleanup.i12 - ] + %magicptr.off.i.i = add i64 %sub.ptr.rhs.cast.i7, -1 + %switch.i.i = icmp ult i64 %magicptr.off.i.i, -2 + br i1 %switch.i.i, label %if.then.i.i, label %cleanup.i12 if.then.i.i: ; preds = %if.end17.i %call.i25.i = call i32 (i32, ...) @prctl(i32 noundef 1398164801, i32 noundef 0, i64 noundef %sub.ptr.rhs.cast.i7, i64 noundef %sub.ptr.sub.i8, i64 noundef ptrtoint (ptr @.str.38 to i64)) #16 @@ -591,15 +590,14 @@ fail.i: ; preds = %if.end12.i, %if.end call fastcc void @_ZN4node12_GLOBAL__N_116PrintSystemErrorEi(i32 noundef %39) br label %cleanup.i12 -cleanup.i12: ; preds = %fail.i, %if.then.i.i, %if.end17.i, %if.end17.i - %tmem.sroa.4.1.i = phi ptr [ %tmem.sroa.4.0.i, %fail.i ], [ null, %if.end17.i ], [ null, %if.end17.i ], [ null, %if.then.i.i ] - %tmem.sroa.0.1.i = phi i64 [ %tmem.sroa.0.0.i, %fail.i ], [ 0, %if.end17.i ], [ 0, %if.end17.i ], [ 0, %if.then.i.i ] - %retval.0.i13 = phi i32 [ -1, %fail.i ], [ 0, %if.end17.i ], [ 0, %if.end17.i ], [ 0, %if.then.i.i ] +cleanup.i12: ; preds = %fail.i, %if.then.i.i, %if.end17.i + %tmem.sroa.4.1.i = phi ptr [ %tmem.sroa.4.0.i, %fail.i ], [ null, %if.end17.i ], [ null, %if.then.i.i ] + %tmem.sroa.0.1.i = phi i64 [ %tmem.sroa.0.0.i, %fail.i ], [ 0, %if.end17.i ], [ 0, %if.then.i.i ] + %retval.0.i13 = phi i32 [ -1, %fail.i ], [ 0, %if.end17.i ], [ 0, %if.then.i.i ] %magicptr.i = ptrtoint ptr %tmem.sroa.4.1.i to i64 - switch i64 %magicptr.i, label %if.end5.i.i [ - i64 0, label %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i - i64 -1, label %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i - ] + %magicptr.off.i = add i64 %magicptr.i, -1 + %switch.i = icmp ult i64 %magicptr.off.i, -2 + br i1 %switch.i, label %if.end5.i.i, label %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i if.end5.i.i: ; preds = %cleanup.i12 %call.i57.i = call i32 @munmap(ptr noundef nonnull %tmem.sroa.4.1.i, i64 noundef %tmem.sroa.0.1.i) #16 @@ -612,12 +610,11 @@ if.end9.i.i: ; preds = %if.end5.i.i call fastcc void @_ZN4node12_GLOBAL__N_116PrintSystemErrorEi(i32 noundef %40) br label %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i -_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i: ; preds = %if.end9.i.i, %if.end5.i.i, %cleanup.i12, %cleanup.i12 +_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i: ; preds = %if.end9.i.i, %if.end5.i.i, %cleanup.i12 %magicptr24.i = ptrtoint ptr %call.i34.i to i64 - switch i64 %magicptr24.i, label %if.end5.i65.i [ - i64 -1, label %return - i64 0, label %return - ] + %magicptr24.off.i = add i64 %magicptr24.i, -1 + %switch25.i = icmp ult i64 %magicptr24.off.i, -2 + br i1 %switch25.i, label %if.end5.i65.i, label %return if.end5.i65.i: ; preds = %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i %call.i67.i = call i32 @munmap(ptr noundef nonnull %call.i34.i, i64 noundef %sub.ptr.sub.i8) #16 @@ -630,8 +627,8 @@ if.end9.i69.i: ; preds = %if.end5.i65.i call fastcc void @_ZN4node12_GLOBAL__N_116PrintSystemErrorEi(i32 noundef %41) br label %return -return: ; preds = %if.end9.i69.i, %if.end5.i65.i, %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i, %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i, %_ZN4node12_GLOBAL__N_129IsTransparentHugePagesEnabledEv.exit.thread, %_ZN4node12_GLOBAL__N_118FindNodeTextRegionEv.exit, %if.end4.i - %retval.0 = phi i32 [ 13, %if.end4.i ], [ 2, %_ZN4node12_GLOBAL__N_118FindNodeTextRegionEv.exit ], [ 13, %_ZN4node12_GLOBAL__N_129IsTransparentHugePagesEnabledEv.exit.thread ], [ %retval.0.i13, %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i ], [ %retval.0.i13, %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i ], [ %retval.0.i13, %if.end5.i65.i ], [ %retval.0.i13, %if.end9.i69.i ] +return: ; preds = %if.end9.i69.i, %if.end5.i65.i, %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i, %_ZN4node12_GLOBAL__N_129IsTransparentHugePagesEnabledEv.exit.thread, %_ZN4node12_GLOBAL__N_118FindNodeTextRegionEv.exit, %if.end4.i + %retval.0 = phi i32 [ 13, %if.end4.i ], [ 2, %_ZN4node12_GLOBAL__N_118FindNodeTextRegionEv.exit ], [ 13, %_ZN4node12_GLOBAL__N_129IsTransparentHugePagesEnabledEv.exit.thread ], [ %retval.0.i13, %_ZN4node12_GLOBAL__N_116MemoryMapPointerD2Ev.exit.i ], [ %retval.0.i13, %if.end5.i65.i ], [ %retval.0.i13, %if.end9.i69.i ] ret i32 %retval.0 } diff --git a/bench/ockam-rs/optimized/1sna1kukcpmrcv4c.ll b/bench/ockam-rs/optimized/1sna1kukcpmrcv4c.ll index ce50440e9e0..c3f680d60c2 100644 --- a/bench/ockam-rs/optimized/1sna1kukcpmrcv4c.ll +++ b/bench/ockam-rs/optimized/1sna1kukcpmrcv4c.ll @@ -386,13 +386,16 @@ define hidden void @"_ZN10primeorder10projective24ProjectivePoint$LT$C$GT$3mul17 call void @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17ha330e8190b24b968E.llvm.10553303005396541960"(ptr noalias noundef nonnull sret({ i64, { i64, i64 } }) align 8 captures(none) dereferenceable(24) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(16) %6), !noalias !76 %34 = load i64, ptr %5, align 8, !noalias !73, !noundef !17 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !73 + %.0.i.i.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %34, i64 4) + %.off.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i.i = select i1 %switch.i.i.i.i.i, i64 4, i64 %34 call void @llvm.lifetime.end.p0(ptr nonnull %6), !noalias !62 - %.not.i.i = icmp eq i64 %34, 0 + %.not.i.i = icmp eq i64 %.0.sroa.speculated.i.i.i.i.i, 0 br i1 %.not.i.i, label %"_ZN13crypto_bigint4uint5array100_$LT$impl$u20$crypto_bigint..array..ArrayEncoding$u20$for$u20$crypto_bigint..uint..Uint$LT$_$GT$$GT$16to_le_byte_array17h96e63127e64b49a4E.exit", label %"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h1a571acdc65b7e18E.exit.preheader.i.i" "_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h1a571acdc65b7e18E.exit.preheader.i.i": ; preds = %"_ZN110_$LT$generic_array..GenericArray$LT$T$C$N$GT$$u20$as$u20$generic_array..sequence..GenericSequence$LT$T$GT$$GT$8generate17h454c24609fb39fdfE.exit.i" - %.0.sroa.speculated.i.i.i.i.i = call noundef i64 @llvm.umin.i64(i64 %34, i64 4) - %35 = shl nuw nsw i64 %.0.sroa.speculated.i.i.i.i.i, 3 + %35 = shl nuw i64 %.0.sroa.speculated.i.i.i.i.i, 3 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %.sroa.0.i, ptr nonnull readonly align 8 dereferenceable(32) %23, i64 %35, i1 false) br label %"_ZN13crypto_bigint4uint5array100_$LT$impl$u20$crypto_bigint..array..ArrayEncoding$u20$for$u20$crypto_bigint..uint..Uint$LT$_$GT$$GT$16to_le_byte_array17h96e63127e64b49a4E.exit" @@ -9560,7 +9563,7 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #25 declare void @llvm.experimental.noalias.scope.decl(metadata) #26 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #27 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #27 attributes #0 = { alwaysinline nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/opencv/optimized/depth_to_3d.ll b/bench/opencv/optimized/depth_to_3d.ll index 3be9bc9c96f..c4eca642a0d 100644 --- a/bench/opencv/optimized/depth_to_3d.ll +++ b/bench/opencv/optimized/depth_to_3d.ll @@ -601,23 +601,16 @@ _ZNK2cv3Mat3endINS_3VecIfLi2EEEEENS_17MatConstIterator_IT_EEv.exit: ; preds = %2 %61 = sext i32 %54 to i64 %62 = getelementptr inbounds i16, ptr %60, i64 %61 %63 = load i16, ptr %62, align 2, !tbaa !66 - switch i16 %63, label %64 [ - i16 0, label %67 - i16 -1, label %67 - ] - -64: ; preds = %49 - %65 = uitofp i16 %63 to float - %66 = fmul float %1, %65 - br label %67 - -67: ; preds = %49, %49, %64 - %storemerge = phi float [ %66, %64 ], [ 0x7FF8000000000000, %49 ], [ 0x7FF8000000000000, %49 ] + %.off = add i16 %63, -1 + %switch = icmp ult i16 %.off, -2 + %64 = uitofp i16 %63 to float + %65 = fmul float %1, %64 + %storemerge = select i1 %switch, float %65, float 0x7FF8000000000000 store float %storemerge, ptr %.024, align 4, !tbaa !62 %.not.i.i = icmp eq ptr %.val28, null br i1 %.not.i.i, label %_ZN2cv17MatConstIterator_INS_3VecIfLi2EEEEppEv.exit, label %68 -68: ; preds = %67 +68: ; preds = %49 %69 = load i64, ptr %45, align 8, !tbaa !59 %70 = getelementptr inbounds nuw i8, ptr %.val1630, i64 %69 %71 = load ptr, ptr %46, align 8, !tbaa !68 @@ -633,11 +626,11 @@ _ZNK2cv3Mat3endINS_3VecIfLi2EEEEENS_17MatConstIterator_IT_EEv.exit: ; preds = %2 %.val18.pre = load ptr, ptr %40, align 8 br label %_ZN2cv17MatConstIterator_INS_3VecIfLi2EEEEppEv.exit -_ZN2cv17MatConstIterator_INS_3VecIfLi2EEEEppEv.exit: ; preds = %67, %68, %72 - %.val18 = phi ptr [ %.val1834, %67 ], [ %.val1834, %68 ], [ %.val18.pre, %72 ] - %.val17 = phi ptr [ %.val1732, %67 ], [ %.val1732, %68 ], [ %.val17.pre, %72 ] - %.val16 = phi ptr [ %.val1630, %67 ], [ %70, %68 ], [ %.val16.pre, %72 ] - %.val = phi ptr [ null, %67 ], [ %.val28, %68 ], [ %.val.pre, %72 ] +_ZN2cv17MatConstIterator_INS_3VecIfLi2EEEEppEv.exit: ; preds = %49, %68, %72 + %.val18 = phi ptr [ %.val1834, %49 ], [ %.val1834, %66 ], [ %.val18.pre, %70 ] + %.val17 = phi ptr [ %.val1732, %49 ], [ %.val1732, %66 ], [ %.val17.pre, %70 ] + %.val16 = phi ptr [ %.val1630, %49 ], [ %70, %66 ], [ %.val16.pre, %70 ] + %.val = phi ptr [ null, %49 ], [ %.val28, %66 ], [ %.val.pre, %70 ] %73 = getelementptr inbounds nuw i8, ptr %.024, i64 4 %.not.i = icmp ne ptr %.val, %.val17 %74 = icmp ne ptr %.val16, %.val18 @@ -2941,7 +2934,7 @@ _ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit: ; preds = %22, % to label %_ZN2cv4Mat_IhEC2ERKNS_3MatE.exit unwind label %35 common.resume: ; preds = %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit, %119, %35 - %common.resume.op = phi { ptr, i32 } [ %36, %35 ], [ %.pn58.pn, %119 ], [ %.pn, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit ] + %common.resume.op = phi { ptr, i32 } [ %36, %35 ], [ %.pn58.pn, %117 ], [ %.pn, %_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED2Ev.exit ] resume { ptr, i32 } %common.resume.op 35: ; preds = %27 @@ -3054,9 +3047,9 @@ _ZN2cv4Mat_IfEaSEOS1_.exit67: ; preds = %_ZN2cv4Mat_IfEC2Eii br label %77 77: ; preds = %.lr.ph.us, %102 - %indvars.iv = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next, %102 ] - %.03875.us = phi ptr [ %66, %.lr.ph.us ], [ %103, %102 ] - %.14174.us = phi i64 [ %.04077.us, %.lr.ph.us ], [ %.242.us, %102 ] + %indvars.iv = phi i64 [ 0, %.lr.ph.us ], [ %indvars.iv.next, %100 ] + %.03875.us = phi ptr [ %66, %.lr.ph.us ], [ %103, %100 ] + %.14174.us = phi i64 [ %.04077.us, %.lr.ph.us ], [ %.242.us, %100 ] %78 = load i8, ptr %.03875.us, align 1, !tbaa !111 %.not62.us = icmp eq i8 %78, 0 br i1 %.not62.us, label %102, label %79 @@ -3079,27 +3072,20 @@ _ZN2cv4Mat_IfEaSEOS1_.exit67: ; preds = %_ZN2cv4Mat_IfEC2Eii %91 = getelementptr inbounds nuw i8, ptr %73, i64 %90 %92 = getelementptr inbounds nuw i16, ptr %91, i64 %indvars.iv %93 = load i16, ptr %92, align 2, !tbaa !66 - switch i16 %93, label %94 [ - i16 0, label %97 - i16 -1, label %97 - ] - -94: ; preds = %79 - %95 = uitofp i16 %93 to float - %96 = fmul float %2, %95 - br label %97 - -97: ; preds = %79, %79, %94 - %.sink = phi float [ %96, %94 ], [ 0x7FF8000000000000, %79 ], [ 0x7FF8000000000000, %79 ] - %98 = load i64, ptr %76, align 8, !tbaa !65 - %99 = mul i64 %98, %83 - %100 = getelementptr inbounds nuw i8, ptr %75, i64 %99 - store float %.sink, ptr %100, align 4, !tbaa !62 - %101 = add i64 %.14174.us, 1 - br label %102 + %.off.us = add i16 %93, -1 + %switch.us = icmp ult i16 %.off.us, -2 + %94 = uitofp i16 %93 to float + %95 = fmul float %2, %94 + %.sink = select i1 %switch.us, float %95, float 0x7FF8000000000000 + %96 = load i64, ptr %76, align 8, !tbaa !65 + %97 = mul i64 %96, %83 + %98 = getelementptr inbounds nuw i8, ptr %75, i64 %97 + store float %.sink, ptr %98, align 4, !tbaa !62 + %99 = add i64 %.14174.us, 1 + br label %100 -102: ; preds = %97, %77 - %.242.us = phi i64 [ %101, %97 ], [ %.14174.us, %77 ] +102: ; preds = %79, %77 + %.242.us = phi i64 [ %99, %79 ], [ %.14174.us, %77 ] %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 %103 = getelementptr inbounds nuw i8, ptr %.03875.us, i64 1 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count @@ -3128,7 +3114,7 @@ _ZN2cv4Mat_IfEaSEOS1_.exit67: ; preds = %_ZN2cv4Mat_IfEC2Eii br label %108 108: ; preds = %106, %104 - %.pn54 = phi { ptr, i32 } [ %107, %106 ], [ %105, %104 ] + %.pn54 = phi { ptr, i32 } [ %107, %104 ], [ %105, %102 ] call void @llvm.lifetime.end.p0(ptr nonnull %11) br label %119 @@ -3144,7 +3130,7 @@ _ZN2cv4Mat_IfEaSEOS1_.exit67: ; preds = %_ZN2cv4Mat_IfEC2Eii br label %113 113: ; preds = %111, %109 - %.pn56 = phi { ptr, i32 } [ %112, %111 ], [ %110, %109 ] + %.pn56 = phi { ptr, i32 } [ %112, %109 ], [ %110, %107 ] call void @llvm.lifetime.end.p0(ptr nonnull %12) br label %119 @@ -3160,12 +3146,12 @@ _ZN2cv4Mat_IfEaSEOS1_.exit67: ; preds = %_ZN2cv4Mat_IfEC2Eii br label %118 118: ; preds = %116, %114 - %.pn58 = phi { ptr, i32 } [ %117, %116 ], [ %115, %114 ] + %.pn58 = phi { ptr, i32 } [ %117, %114 ], [ %115, %112 ] call void @llvm.lifetime.end.p0(ptr nonnull %13) br label %119 119: ; preds = %118, %113, %108, %43 - %.pn58.pn = phi { ptr, i32 } [ %.pn58, %118 ], [ %.pn56, %113 ], [ %.pn54, %108 ], [ %44, %43 ] + %.pn58.pn = phi { ptr, i32 } [ %.pn58, %116 ], [ %.pn56, %111 ], [ %.pn54, %106 ], [ %44, %43 ] call void @_ZN2cv3MatD2Ev(ptr noundef nonnull align 8 dereferenceable(96) %9) #14 call void @llvm.lifetime.end.p0(ptr nonnull %9) br label %common.resume diff --git a/bench/opencv/optimized/jp2.ll b/bench/opencv/optimized/jp2.ll index ba7ee9ae993..c2b1b329b65 100644 --- a/bench/opencv/optimized/jp2.ll +++ b/bench/opencv/optimized/jp2.ll @@ -220,22 +220,19 @@ define internal fastcc range(i32 0, 2) i32 @opj_jp2_apply_color_postprocessing(p 42: ; preds = %.lr.ph.i %43 = getelementptr inbounds nuw i8, ptr %37, i64 4 %44 = load i16, ptr %43, align 2, !tbaa !39 - switch i16 %44, label %45 [ - i16 -1, label %50 - i16 0, label %50 - ] - -45: ; preds = %42 + %45 = add i16 %44, 1 + %switch.i = icmp ult i16 %45, 2 %46 = zext i16 %44 to i32 %47 = add nsw i32 %46, -1 %.not164.i = icmp ult i32 %47, %.0141.i - br i1 %.not164.i, label %50, label %48 + %or.cond219.i = select i1 %switch.i, i1 true, i1 %.not164.i + br i1 %or.cond219.i, label %50, label %48 -48: ; preds = %45 +48: ; preds = %42 %49 = tail call i32 (ptr, i32, ptr, ...) @opj_event_msg(ptr noundef %2, i32 noundef 1, ptr noundef nonnull @.str.11, i32 noundef %47, i32 noundef %.0141.i) #6 br label %opj_jp2_check_color.exit.thread -50: ; preds = %45, %42, %42 +50: ; preds = %42 %indvars.iv.next.i = add nuw nsw i64 %indvars.iv.i, 1 %exitcond.not.i = icmp eq i64 %indvars.iv.next.i, %wide.trip.count.i br i1 %exitcond.not.i, label %.preheader189.us.i, label %.lr.ph.i, !llvm.loop !40 diff --git a/bench/openssl/optimized/quic_engine.ll b/bench/openssl/optimized/quic_engine.ll index a915ff29648..a34ceea9ed1 100644 --- a/bench/openssl/optimized/quic_engine.ll +++ b/bench/openssl/optimized/quic_engine.ll @@ -103,16 +103,13 @@ define i64 @ossl_quic_engine_make_real_time(ptr noundef readonly captures(none) %3 = getelementptr inbounds nuw i8, ptr %0, i64 24 %4 = load ptr, ptr %3, align 8, !tbaa !27 %.fr = freeze ptr %4 - %.not = icmp eq ptr %.fr, null - br i1 %.not, label %10, label %switch.early.test + %.not = icmp ne ptr %.fr, null + %.off = add i64 %1, -1 + %switch = icmp ult i64 %.off, -2 + %or.cond = select i1 %.not, i1 %switch, i1 false + br i1 %or.cond, label %5, label %10 switch.early.test: ; preds = %2 - switch i64 %1, label %5 [ - i64 -1, label %10 - i64 0, label %10 - ] - -5: ; preds = %switch.early.test %6 = getelementptr inbounds nuw i8, ptr %0, i64 32 %7 = load ptr, ptr %6, align 8, !tbaa !28 %8 = tail call i64 %.fr(ptr noundef %7) #10 @@ -121,8 +118,8 @@ switch.early.test: ; preds = %2 %.sroa.03.0.i = tail call i64 @llvm.uadd.sat.i64(i64 %..i, i64 %9) br label %10 -10: ; preds = %switch.early.test, %switch.early.test, %2, %5 - %.sroa.07.0 = phi i64 [ %.sroa.03.0.i, %5 ], [ %1, %switch.early.test ], [ %1, %2 ], [ %1, %switch.early.test ] +10: ; preds = %2, %switch.early.test + %.sroa.07.0 = phi i64 [ %.sroa.03.0.i, %5 ], [ %1, %2 ] ret i64 %.sroa.07.0 } diff --git a/bench/openssl/optimized/sslapitest.ll b/bench/openssl/optimized/sslapitest.ll index cd1c305cee6..15e3f130533 100644 --- a/bench/openssl/optimized/sslapitest.ll +++ b/bench/openssl/optimized/sslapitest.ll @@ -22309,13 +22309,11 @@ define internal fastcc range(i32 0, 2) i32 @early_data_skip_helper(i32 noundef r br i1 %.not, label %157, label %26 26: ; preds = %14 - switch i32 %1, label %30 [ - i32 6, label %27 - i32 5, label %27 - i32 0, label %27 - ] + %.off = add nsw i32 %1, -1 + %switch52 = icmp ult i32 %.off, 4 + br i1 %switch52, label %30, label %27 -27: ; preds = %26, %26, %26 +27: ; preds = %26 %28 = load ptr, ptr %5, align 8, !tbaa !19 call void @SSL_CTX_set_security_level(ptr noundef %28, i32 noundef 0) #24 %29 = load ptr, ptr %4, align 8, !tbaa !19 @@ -22432,7 +22430,7 @@ define internal fastcc range(i32 0, 2) i32 @early_data_skip_helper(i32 noundef r br i1 %.not37, label %157, label %95 95: ; preds = %91 - switch i32 %0, label %default.unreachable55 [ + switch i32 %0, label %default.unreachable56 [ i32 0, label %132 i32 1, label %96 i32 2, label %108 @@ -22550,7 +22548,7 @@ default.unreachable55: ; preds = %95 br label %157 157: ; preds = %.thread52, %154, %128, %132, %138, %141, %145, %151, %122, %96, %102, %84, %88, %91, %.thread, %81, %70, %60, %51, %43, %30, %37, %14 - %.026.shrunk = phi i1 [ false, %151 ], [ false, %145 ], [ false, %141 ], [ false, %138 ], [ false, %132 ], [ false, %102 ], [ false, %96 ], [ false, %122 ], [ false, %91 ], [ false, %88 ], [ false, %84 ], [ false, %81 ], [ false, %.thread ], [ false, %70 ], [ false, %51 ], [ false, %60 ], [ false, %43 ], [ false, %37 ], [ false, %30 ], [ false, %14 ], [ %.not41, %128 ], [ %.not49, %154 ], [ false, %.thread52 ] + %.026.shrunk = phi i1 [ false, %151 ], [ false, %145 ], [ false, %141 ], [ false, %138 ], [ false, %132 ], [ false, %102 ], [ false, %96 ], [ false, %122 ], [ false, %91 ], [ false, %88 ], [ false, %84 ], [ false, %81 ], [ false, %.thread ], [ false, %70 ], [ false, %51 ], [ false, %60 ], [ false, %43 ], [ false, %37 ], [ false, %30 ], [ false, %14 ], [ %.not41, %128 ], [ %.not49, %154 ], [ false, %.thread53 ] %.026 = zext i1 %.026.shrunk to i32 %158 = load ptr, ptr @clientpsk, align 8, !tbaa !25 call void @SSL_SESSION_free(ptr noundef %158) #24 diff --git a/bench/openvdb/optimized/Diagnostics.ll b/bench/openvdb/optimized/Diagnostics.ll index eb1e6a35d16..fbf4f4cb805 100644 --- a/bench/openvdb/optimized/Diagnostics.ll +++ b/bench/openvdb/optimized/Diagnostics.ll @@ -70723,16 +70723,12 @@ lor.lhs.false.i: ; preds = %for.cond.i.i %mValueMask.i = getelementptr inbounds nuw i8, ptr %2, i64 266240 %4 = load i64, ptr %mValueMask.i, align 8 %cmp.i4.i = icmp eq i64 %4, -1 - switch i64 %4, label %for.inc [ - i64 -1, label %land.rhs.i5.i.preheader - i64 0, label %land.rhs.i5.i.preheader - ] - -land.rhs.i5.i.preheader: ; preds = %lor.lhs.false.i, %lor.lhs.false.i - br label %land.rhs.i5.i + %.off = add i64 %4, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %for.inc, label %land.rhs.i5.i -land.rhs.i5.i: ; preds = %land.rhs.i5.i.preheader, %while.body.i.i - %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %land.rhs.i5.i.preheader ] +land.rhs.i5.i: ; preds = %lor.lhs.false.i, %while.body.i.i + %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %lor.lhs.false.i ] %w.0.ptr.i.i = getelementptr inbounds nuw i8, ptr %mValueMask.i, i64 %w.0.idx6.i.i %5 = load i64, ptr %w.0.ptr.i.i, align 8 %cmp12.i.i = icmp eq i64 %5, %4 @@ -72159,16 +72155,12 @@ lor.lhs.false.i: ; preds = %for.cond.i.i %mValueMask.i = getelementptr inbounds nuw i8, ptr %3, i64 33280 %5 = load i64, ptr %mValueMask.i, align 8 %cmp.i4.i = icmp eq i64 %5, -1 - switch i64 %5, label %for.inc [ - i64 -1, label %land.rhs.i5.i.preheader - i64 0, label %land.rhs.i5.i.preheader - ] - -land.rhs.i5.i.preheader: ; preds = %lor.lhs.false.i, %lor.lhs.false.i - br label %land.rhs.i5.i + %.off = add i64 %5, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %for.inc, label %land.rhs.i5.i -land.rhs.i5.i: ; preds = %land.rhs.i5.i.preheader, %while.body.i.i - %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %land.rhs.i5.i.preheader ] +land.rhs.i5.i: ; preds = %lor.lhs.false.i, %while.body.i.i + %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %lor.lhs.false.i ] %w.0.ptr.i.i = getelementptr inbounds nuw i8, ptr %mValueMask.i, i64 %w.0.idx6.i.i %6 = load i64, ptr %w.0.ptr.i.i, align 8 %cmp12.i.i = icmp eq i64 %6, %5 @@ -72504,16 +72496,12 @@ for.body: ; preds = %for.body.lr.ph, %_Z %tobool = trunc i8 %4 to i1 %5 = load i64, ptr %3, align 8 %cmp.i.i = icmp eq i64 %5, -1 - switch i64 %5, label %for.inc [ - i64 -1, label %land.rhs.i.i.preheader - i64 0, label %land.rhs.i.i.preheader - ] - -land.rhs.i.i.preheader: ; preds = %for.body, %for.body - br label %land.rhs.i.i + %.off = add i64 %5, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %for.inc, label %land.rhs.i.i -land.rhs.i.i: ; preds = %land.rhs.i.i.preheader, %while.body.i.i - %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %land.rhs.i.i.preheader ] +land.rhs.i.i: ; preds = %for.body, %while.body.i.i + %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %for.body ] %w.0.ptr.i.i = getelementptr inbounds nuw i8, ptr %3, i64 %w.0.idx6.i.i %6 = load i64, ptr %w.0.ptr.i.i, align 8 %cmp12.i.i = icmp eq i64 %6, %5 diff --git a/bench/openvdb/optimized/points.ll b/bench/openvdb/optimized/points.ll index 919c34e87dd..4e03fe9f2a9 100644 --- a/bench/openvdb/optimized/points.ll +++ b/bench/openvdb/optimized/points.ll @@ -186096,16 +186096,12 @@ lor.lhs.false.i: ; preds = %for.cond.i.i %mValueMask.i = getelementptr inbounds nuw i8, ptr %2, i64 266240 %4 = load i64, ptr %mValueMask.i, align 8 %cmp.i4.i = icmp eq i64 %4, -1 - switch i64 %4, label %for.inc [ - i64 -1, label %land.rhs.i5.i.preheader - i64 0, label %land.rhs.i5.i.preheader - ] - -land.rhs.i5.i.preheader: ; preds = %lor.lhs.false.i, %lor.lhs.false.i - br label %land.rhs.i5.i + %.off = add i64 %4, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %for.inc, label %land.rhs.i5.i -land.rhs.i5.i: ; preds = %land.rhs.i5.i.preheader, %while.body.i.i - %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %land.rhs.i5.i.preheader ] +land.rhs.i5.i: ; preds = %lor.lhs.false.i, %while.body.i.i + %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %lor.lhs.false.i ] %w.0.ptr.i.i = getelementptr inbounds nuw i8, ptr %mValueMask.i, i64 %w.0.idx6.i.i %5 = load i64, ptr %w.0.ptr.i.i, align 8 %cmp12.i.i = icmp eq i64 %5, %4 @@ -187906,16 +187902,12 @@ lor.lhs.false.i: ; preds = %for.cond.i.i %mValueMask.i = getelementptr inbounds nuw i8, ptr %3, i64 33280 %5 = load i64, ptr %mValueMask.i, align 8 %cmp.i4.i = icmp eq i64 %5, -1 - switch i64 %5, label %for.inc [ - i64 -1, label %land.rhs.i5.i.preheader - i64 0, label %land.rhs.i5.i.preheader - ] - -land.rhs.i5.i.preheader: ; preds = %lor.lhs.false.i, %lor.lhs.false.i - br label %land.rhs.i5.i + %.off = add i64 %5, -1 + %switch = icmp ult i64 %.off, -2 + br i1 %switch, label %for.inc, label %land.rhs.i5.i -land.rhs.i5.i: ; preds = %land.rhs.i5.i.preheader, %while.body.i.i - %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %land.rhs.i5.i.preheader ] +land.rhs.i5.i: ; preds = %lor.lhs.false.i, %while.body.i.i + %w.0.idx6.i.i = phi i64 [ %w.0.add.i.i, %while.body.i.i ], [ 8, %lor.lhs.false.i ] %w.0.ptr.i.i = getelementptr inbounds nuw i8, ptr %mValueMask.i, i64 %w.0.idx6.i.i %6 = load i64, ptr %w.0.ptr.i.i, align 8 %cmp12.i.i = icmp eq i64 %6, %5 diff --git a/bench/php/optimized/pcre2_study.ll b/bench/php/optimized/pcre2_study.ll index 8fe0cb07d0b..c89deec8da9 100644 --- a/bench/php/optimized/pcre2_study.ll +++ b/bench/php/optimized/pcre2_study.ll @@ -950,11 +950,9 @@ thread-pre-split: ; preds = %5 186: ; preds = %.backedge, %.backedge, %.backedge %187 = getelementptr inbounds nuw i8, ptr %.1288519, i64 1 %188 = call fastcc i32 @set_start_bits(ptr noundef %0, ptr noundef nonnull %187, i32 noundef %2, i32 noundef %3, ptr noundef %4) - switch i32 %188, label %.preheader478 [ - i32 4, label %.thread470.loopexit611 - i32 3, label %.thread470.loopexit611 - i32 0, label %.thread470.loopexit611 - ] + %.off = add nsw i32 %188, -1 + %switch = icmp ult i32 %.off, 2 + br i1 %switch, label %.preheader478, label %.thread470.loopexit611 .preheader478: ; preds = %186, %.preheader478 %.9 = phi ptr [ %197, %.preheader478 ], [ %187, %186 ] @@ -2086,8 +2084,8 @@ study_char_list.exit: ; preds = %.loopexit83.i, %571 %759 = icmp eq i8 %758, 121 br i1 %759, label %29, label %.thread470 -.thread470.loopexit611: ; preds = %542, %391, %186, %186, %186, %143, %.backedge - %.0.ph = phi i32 [ 3, %.backedge ], [ %144, %143 ], [ %188, %186 ], [ %188, %186 ], [ %188, %186 ], [ 0, %391 ], [ 0, %542 ] +.thread470.loopexit611: ; preds = %542, %391, %143, %.backedge, %186 + %.0.ph = phi i32 [ 3, %.backedge ], [ %144, %143 ], [ %188, %186 ], [ 0, %391 ], [ 0, %542 ] br label %.thread470 .thread470.loopexit647: ; preds = %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge, %.backedge diff --git a/bench/pingora-rs/optimized/24oggy68gf6cx0i1vzuuyyts4.ll b/bench/pingora-rs/optimized/24oggy68gf6cx0i1vzuuyyts4.ll index 44ebef7954f..9ebb96399f0 100644 --- a/bench/pingora-rs/optimized/24oggy68gf6cx0i1vzuuyyts4.ll +++ b/bench/pingora-rs/optimized/24oggy68gf6cx0i1vzuuyyts4.ll @@ -13398,10 +13398,8 @@ _ZN12pingora_core9protocols2l46stream6Stream10stream_mut17h9b96ba16ae0c5a73E.exi 27: ; preds = %"_ZN108_$LT$pingora_core..protocols..l4..stream..RawStreamWrapper$u20$as$u20$tokio..io..async_write..AsyncWrite$GT$10poll_write17hab21804f18590298E.exit" %28 = landingpad { ptr, i32 } cleanup - switch i64 %22, label %29 [ - i64 2, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit" - i64 0, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit" - ] + %switch.i = icmp eq i64 %22, 1 + br i1 %switch.i, label %29, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit" 29: ; preds = %27 invoke void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17hdd4a828948364accE"(ptr noalias noundef nonnull align 8 dereferenceable(8) %26) @@ -13417,7 +13415,7 @@ _ZN12pingora_core9protocols2l46stream6Stream10stream_mut17h9b96ba16ae0c5a73E.exi call void @_ZN4core9panicking16panic_in_cleanup17hccd47ddd364deb23E() #27 unreachable -"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit": ; preds = %27, %27, %29 +"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit": ; preds = %27, %29 resume { ptr, i32 } %28 } @@ -13638,10 +13636,8 @@ _ZN12pingora_core9protocols2l46stream6Stream10stream_mut17h9b96ba16ae0c5a73E.exi 33: ; preds = %"_ZN108_$LT$pingora_core..protocols..l4..stream..RawStreamWrapper$u20$as$u20$tokio..io..async_write..AsyncWrite$GT$19poll_write_vectored17ha8482035afa20cd3E.exit" %34 = landingpad { ptr, i32 } cleanup - switch i64 %28, label %35 [ - i64 2, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit" - i64 0, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit" - ] + %switch.i = icmp eq i64 %28, 1 + br i1 %switch.i, label %35, label %"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit" 35: ; preds = %33 invoke void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17hdd4a828948364accE"(ptr noalias noundef nonnull align 8 dereferenceable(8) %32) @@ -13657,7 +13653,7 @@ _ZN12pingora_core9protocols2l46stream6Stream10stream_mut17h9b96ba16ae0c5a73E.exi call void @_ZN4core9panicking16panic_in_cleanup17hccd47ddd364deb23E() #27 unreachable -"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit": ; preds = %33, %33, %35 +"_ZN4core3ptr108drop_in_place$LT$core..task..poll..Poll$LT$core..result..Result$LT$usize$C$std..io..error..Error$GT$$GT$$GT$17h15933d9899160efaE.exit": ; preds = %33, %35 resume { ptr, i32 } %34 } diff --git a/bench/pingora-rs/optimized/3xykeu3ahcx95h5cpflh1bahm.ll b/bench/pingora-rs/optimized/3xykeu3ahcx95h5cpflh1bahm.ll index 80baf7015f1..93ad3203558 100644 --- a/bench/pingora-rs/optimized/3xykeu3ahcx95h5cpflh1bahm.ll +++ b/bench/pingora-rs/optimized/3xykeu3ahcx95h5cpflh1bahm.ll @@ -12492,61 +12492,53 @@ define void @"_ZN138_$LT$pingora_core..protocols..l4..socket..SocketAddr$u20$as$ %.sroa.7.0..sroa_idx = getelementptr inbounds nuw i8, ptr %3, i64 32 store ptr null, ptr %.sroa.7.0..sroa_idx, align 8, !noalias !1181 invoke void @_ZN5alloc3fmt6format12format_inner17hbc00c97fd665fffbE(ptr noalias noundef nonnull sret([24 x i8]) align 8 captures(none) dereferenceable(24) %5, ptr noalias noundef nonnull align 8 captures(none) dereferenceable(48) %3) - to label %24 unwind label %13 + to label %19 unwind label %13 13: ; preds = %12 %14 = landingpad { ptr, i32 } cleanup %15 = load i32, ptr %6, align 8, !range !28, !alias.scope !1182, !noundef !7 - switch i32 %15, label %16 [ - i32 2, label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit" - i32 0, label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit" - ] + %switch.i = icmp eq i32 %15, 1 + br i1 %switch.i, label %16, label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit" 16: ; preds = %13 %17 = getelementptr inbounds nuw i8, ptr %6, i64 8 invoke void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17hdd4a828948364accE"(ptr noalias noundef nonnull align 8 dereferenceable(8) %17) - to label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit" unwind label %26 + to label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit" unwind label %24 18: ; preds = %9 %19 = getelementptr inbounds nuw i8, ptr %6, i64 4 %.sroa.4.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 4 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(116) %.sroa.4.0..sroa_idx, ptr noundef nonnull align 4 dereferenceable(116) %19, i64 116, i1 false) store i32 1, ptr %0, align 8 - br label %20 + br label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit12" -20: ; preds = %24, %18 - %21 = phi i32 [ %.pre14, %24 ], [ %.pre, %18 ] - switch i32 %21, label %22 [ - i32 2, label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit11" - i32 0, label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit11" - ] +20: ; preds = %12 + call void @llvm.lifetime.end.p0(ptr nonnull %3), !noalias !1174 + call void @llvm.lifetime.end.p0(ptr nonnull %4) + %20 = getelementptr inbounds nuw i8, ptr %0, i64 8 + call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %20, ptr noundef nonnull align 8 dereferenceable(24) %5, i64 24, i1 false) + store i32 2, ptr %0, align 8 + %.pre15 = load i32, ptr %6, align 8, !range !28, !alias.scope !1185 + %21 = icmp eq i32 %.pre15, 1 + br i1 %21, label %22, label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit12" 22: ; preds = %20 %23 = getelementptr inbounds nuw i8, ptr %6, i64 8 call void @"_ZN4core3ptr42drop_in_place$LT$std..io..error..Error$GT$17hdd4a828948364accE"(ptr noalias noundef nonnull align 8 dereferenceable(8) %23) br label %"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit11" -"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit11": ; preds = %20, %20, %22 +"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit11": ; preds = %18, %19, %22 call void @llvm.lifetime.end.p0(ptr nonnull %6) ret void -24: ; preds = %12 - call void @llvm.lifetime.end.p0(ptr nonnull %3), !noalias !1174 - call void @llvm.lifetime.end.p0(ptr nonnull %4) - %25 = getelementptr inbounds nuw i8, ptr %0, i64 8 - call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %25, ptr noundef nonnull align 8 dereferenceable(24) %5, i64 24, i1 false) - store i32 2, ptr %0, align 8 - %.pre14 = load i32, ptr %6, align 8, !range !28, !alias.scope !1185 - br label %20 - -26: ; preds = %16 - %27 = landingpad { ptr, i32 } +24: ; preds = %16 + %25 = landingpad { ptr, i32 } filter [0 x ptr] zeroinitializer call void @_ZN4core9panicking16panic_in_cleanup17hccd47ddd364deb23E() #30 unreachable -"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit": ; preds = %13, %13, %16 +"_ZN4core3ptr137drop_in_place$LT$core..option..Option$LT$core..result..Result$LT$std..os..unix..net..addr..SocketAddr$C$std..io..error..Error$GT$$GT$$GT$17ha16e912fbadb112fE.exit": ; preds = %13, %16 resume { ptr, i32 } %14 } diff --git a/bench/pocketpy/optimized/io.ll b/bench/pocketpy/optimized/io.ll index bbcb1b4f0eb..aae5f6d6b9d 100644 --- a/bench/pocketpy/optimized/io.ll +++ b/bench/pocketpy/optimized/io.ll @@ -310,23 +310,22 @@ define noalias noundef ptr @_ZN4pkpy23_default_import_handlerEPKcPi(ptr noundef to label %6 unwind label %10 6: ; preds = %2 - %7 = getelementptr inbounds nuw i8, ptr %4, i64 32 - %8 = load ptr, ptr %7, align 8 - %.not.i.i.i = icmp eq ptr %8, null - br i1 %.not.i.i.i, label %_ZNSt10filesystem7__cxx114pathD2Ev.exit, label %9 + %7 = and i64 %5, 255 + %8 = getelementptr inbounds nuw i8, ptr %4, i64 32 + %9 = load ptr, ptr %8, align 8 + %.not.i.i.i = icmp eq ptr %9, null + br i1 %.not.i.i.i, label %_ZNSt10filesystem7__cxx114pathD2Ev.exit, label %10 9: ; preds = %6 - call void @_ZNKSt10filesystem7__cxx114path5_List13_Impl_deleterclEPNS2_5_ImplE(ptr noundef nonnull align 8 dereferenceable(8) %7, ptr noundef nonnull %8) #26 + call void @_ZNKSt10filesystem7__cxx114path5_List13_Impl_deleterclEPNS2_5_ImplE(ptr noundef nonnull align 8 dereferenceable(8) %8, ptr noundef nonnull %9) #26 br label %_ZNSt10filesystem7__cxx114pathD2Ev.exit _ZNSt10filesystem7__cxx114pathD2Ev.exit: ; preds = %6, %9 - store ptr null, ptr %7, align 8 + store ptr null, ptr %8, align 8 call void @_ZNSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEED1Ev(ptr noundef nonnull align 8 dereferenceable(40) %4) #26 - %trunc = trunc i64 %5 to i8 - switch i8 %trunc, label %12 [ - i8 -1, label %24 - i8 0, label %24 - ] + %.off = add nsw i64 %7, -1 + %switch = icmp ult i64 %.off, 254 + br i1 %switch, label %13, label %24 10: ; preds = %2 %11 = landingpad { ptr, i32 } @@ -353,8 +352,8 @@ _ZNSt10filesystem7__cxx114pathD2Ev.exit: ; preds = %6, %9 store i32 %18, ptr %1, align 4 br label %24 -24: ; preds = %_ZNSt10filesystem7__cxx114pathD2Ev.exit, %_ZNSt10filesystem7__cxx114pathD2Ev.exit, %12, %15 - %.0 = phi ptr [ %20, %15 ], [ null, %_ZNSt10filesystem7__cxx114pathD2Ev.exit ], [ null, %12 ], [ null, %_ZNSt10filesystem7__cxx114pathD2Ev.exit ] +24: ; preds = %_ZNSt10filesystem7__cxx114pathD2Ev.exit, %12, %15 + %.0 = phi ptr [ %20, %16 ], [ null, %13 ], [ null, %_ZNSt10filesystem7__cxx114pathD2Ev.exit ] ret ptr %.0 } diff --git a/bench/pola-rs/optimized/4lreosyeqk7o1vd9fcfoxznlc.ll b/bench/pola-rs/optimized/4lreosyeqk7o1vd9fcfoxznlc.ll index cd0189b5ada..b4c63f89341 100644 --- a/bench/pola-rs/optimized/4lreosyeqk7o1vd9fcfoxznlc.ll +++ b/bench/pola-rs/optimized/4lreosyeqk7o1vd9fcfoxznlc.ll @@ -9756,10 +9756,8 @@ define hidden void @_ZN10libloading2os4unix7Library4open17h4282081692d82879E(ptr %cond.i.i = icmp eq i64 %.sroa.012.0.copyload.fr, 2 %spec.select = select i1 %cond.i.i, ptr null, ptr %.sroa.5.sroa.0.0.copyload %12 = tail call noundef ptr @dlopen(ptr noundef %spec.select, i32 noundef %2) #35, !noalias !696 - switch i64 %.sroa.012.0.copyload.fr, label %13 [ - i64 2, label %"_ZN10libloading2os4unix7Library4open28_$u7b$$u7b$closure$u7d$$u7d$17h1f06fc79dff2c543E.exit.i" - i64 0, label %"_ZN10libloading2os4unix7Library4open28_$u7b$$u7b$closure$u7d$$u7d$17h1f06fc79dff2c543E.exit.i" - ] + %switch.i.i = icmp eq i64 %.sroa.012.0.copyload.fr, 1 + br i1 %switch.i.i, label %13, label %"_ZN10libloading2os4unix7Library4open28_$u7b$$u7b$closure$u7d$$u7d$17h1f06fc79dff2c543E.exit.i" 13: ; preds = %11 %14 = icmp ne ptr %.sroa.5.sroa.0.0.copyload, null @@ -9772,8 +9770,8 @@ define hidden void @_ZN10libloading2os4unix7Library4open17h4282081692d82879E(ptr tail call void @_RNvCsjH7bwORMyv9_7___rustc14___rust_dealloc(ptr noundef nonnull %.sroa.5.sroa.0.0.copyload, i64 noundef %.sroa.5.sroa.5.0.copyload, i64 noundef 1) #35, !noalias !703 br label %"_ZN10libloading2os4unix7Library4open28_$u7b$$u7b$closure$u7d$$u7d$17h1f06fc79dff2c543E.exit.i" -"_ZN10libloading2os4unix7Library4open28_$u7b$$u7b$closure$u7d$$u7d$17h1f06fc79dff2c543E.exit.i": ; preds = %.thread57, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h2c4b2651a9251490E.exit.i.i5.i.i.i.i.i", %13, %11, %11 - %16 = phi ptr [ %5, %.thread57 ], [ %12, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h2c4b2651a9251490E.exit.i.i5.i.i.i.i.i" ], [ %12, %13 ], [ %12, %11 ], [ %12, %11 ] +"_ZN10libloading2os4unix7Library4open28_$u7b$$u7b$closure$u7d$$u7d$17h1f06fc79dff2c543E.exit.i": ; preds = %.thread57, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h2c4b2651a9251490E.exit.i.i5.i.i.i.i.i", %13, %11 + %16 = phi ptr [ %5, %.thread57 ], [ %12, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h2c4b2651a9251490E.exit.i.i5.i.i.i.i.i" ], [ %12, %13 ], [ %12, %11 ] %.not.i = icmp eq ptr %16, null br i1 %.not.i, label %17, label %_ZN10libloading2os4unix12with_dlerror17h1df53b5ec0968f14E.exit @@ -73332,10 +73330,8 @@ define internal fastcc void @"_ZN4core3ptr58drop_in_place$LT$tokio..sync..batch_ ; Function Attrs: nonlazybind uwtable define hidden void @"_ZN4core3ptr594drop_in_place$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$C$core..array..iter..IntoIter$LT$polars_plan..plans..ir..tree_format..TreeFmtNode$C$1_usize$GT$$GT$$C$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$$GT$17h68d861312a1ac54bE"(ptr noalias noundef align 8 dereferenceable(136) %0) unnamed_addr #3 personality ptr @rust_eh_personality { %2 = load i64, ptr %0, align 8, !range !298, !alias.scope !10808, !noundef !8 - switch i64 %2, label %3 [ - i64 2, label %"_ZN4core3ptr382drop_in_place$LT$core..option..Option$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$C$core..array..iter..IntoIter$LT$polars_plan..plans..ir..tree_format..TreeFmtNode$C$1_usize$GT$$GT$$GT$$GT$17hb96fbc8f0e3261b3E.exit" - i64 0, label %"_ZN4core3ptr382drop_in_place$LT$core..option..Option$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$C$core..array..iter..IntoIter$LT$polars_plan..plans..ir..tree_format..TreeFmtNode$C$1_usize$GT$$GT$$GT$$GT$17hb96fbc8f0e3261b3E.exit" - ] + %switch.i = icmp eq i64 %2, 1 + br i1 %switch.i, label %3, label %"_ZN4core3ptr382drop_in_place$LT$core..option..Option$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$C$core..array..iter..IntoIter$LT$polars_plan..plans..ir..tree_format..TreeFmtNode$C$1_usize$GT$$GT$$GT$$GT$17hb96fbc8f0e3261b3E.exit" 3: ; preds = %1 %4 = getelementptr inbounds nuw i8, ptr %0, i64 8 @@ -73346,7 +73342,7 @@ define hidden void @"_ZN4core3ptr594drop_in_place$LT$core..iter..adapters..chain tail call void @"_ZN129_$LT$$u5b$core..mem..maybe_uninit..MaybeUninit$LT$T$GT$$u3b$$u20$N$u5d$$u20$as$u20$core..array..iter..iter_inner..PartialDrop$GT$12partial_drop17h090fafd9ee4446fdE"(ptr noalias noundef nonnull align 8 dereferenceable(64) %5, i64 noundef %6, i64 noundef %8) br label %"_ZN4core3ptr382drop_in_place$LT$core..option..Option$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$C$core..array..iter..IntoIter$LT$polars_plan..plans..ir..tree_format..TreeFmtNode$C$1_usize$GT$$GT$$GT$$GT$17hb96fbc8f0e3261b3E.exit" -"_ZN4core3ptr382drop_in_place$LT$core..option..Option$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$C$core..array..iter..IntoIter$LT$polars_plan..plans..ir..tree_format..TreeFmtNode$C$1_usize$GT$$GT$$GT$$GT$17hb96fbc8f0e3261b3E.exit": ; preds = %1, %1, %3 +"_ZN4core3ptr382drop_in_place$LT$core..option..Option$LT$core..iter..adapters..chain..Chain$LT$core..iter..adapters..map..Map$LT$core..slice..iter..Iter$LT$polars_plan..plans..expr_ir..ExprIR$GT$$C$polars_plan..plans..ir..tree_format..TreeFmtNode..node_data..$u7b$$u7b$closure$u7d$$u7d$$GT$$C$core..array..iter..IntoIter$LT$polars_plan..plans..ir..tree_format..TreeFmtNode$C$1_usize$GT$$GT$$GT$$GT$17hb96fbc8f0e3261b3E.exit": ; preds = %1, %3 ret void } diff --git a/bench/portaudio/optimized/pa_unix_util.ll b/bench/portaudio/optimized/pa_unix_util.ll index a5be685de77..103ecc46217 100644 --- a/bench/portaudio/optimized/pa_unix_util.ll +++ b/bench/portaudio/optimized/pa_unix_util.ll @@ -151,10 +151,9 @@ define noundef i32 @PaUtil_CancelThreading(ptr noundef readonly captures(none) % %12 = call i32 @pthread_join(i64 noundef %11, ptr noundef nonnull %4) #16 %13 = load ptr, ptr %4, align 8, !tbaa !15 %magicptr = ptrtoint ptr %13 to i64 - switch i64 %magicptr, label %14 [ - i64 -1, label %18 - i64 0, label %18 - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %14, label %18 14: ; preds = %10 br i1 %.not, label %17, label %15 @@ -168,7 +167,7 @@ define noundef i32 @PaUtil_CancelThreading(ptr noundef readonly captures(none) % call void @free(ptr noundef %13) #16 br label %18 -18: ; preds = %10, %10, %17 +18: ; preds = %10, %17 call void @llvm.lifetime.end.p0(ptr nonnull %4) ret i32 0 } @@ -562,10 +561,9 @@ define range(i32 -9999, 1) i32 @PaUnixThread_Terminate(ptr noundef initializes(( 21: ; preds = %11 %22 = load ptr, ptr %4, align 8, !tbaa !15 %magicptr = ptrtoint ptr %22 to i64 - switch i64 %magicptr, label %23 [ - i64 -1, label %27 - i64 0, label %27 - ] + %magicptr.off = add i64 %magicptr, -1 + %switch = icmp ult i64 %magicptr.off, -2 + br i1 %switch, label %23, label %27 23: ; preds = %21 br i1 %.not, label %26, label %24 @@ -579,8 +577,8 @@ define range(i32 -9999, 1) i32 @PaUnixThread_Terminate(ptr noundef initializes(( call void @free(ptr noundef %22) #16 br label %27 -27: ; preds = %21, %21, %26, %20 - %.0 = phi i32 [ -9999, %20 ], [ 0, %26 ], [ 0, %21 ], [ 0, %21 ] +27: ; preds = %21, %26, %20 + %.0 = phi i32 [ -9999, %20 ], [ 0, %26 ], [ 0, %21 ] %28 = getelementptr inbounds nuw i8, ptr %0, i64 24 %29 = call i32 @pthread_mutex_destroy(ptr noundef nonnull %28) #16 store i32 0, ptr @paUtilErr_, align 4, !tbaa !11 diff --git a/bench/postgres/optimized/stem_ISO_8859_1_indonesian.ll b/bench/postgres/optimized/stem_ISO_8859_1_indonesian.ll index 786b51e65bb..39dd9aa193b 100644 --- a/bench/postgres/optimized/stem_ISO_8859_1_indonesian.ll +++ b/bench/postgres/optimized/stem_ISO_8859_1_indonesian.ll @@ -194,7 +194,7 @@ define hidden range(i32 -2147483648, 2) i32 @indonesian_ISO_8859_1_stem(ptr noun %85 = sext i32 %82 to i64 %86 = getelementptr inbounds i8, ptr %84, i64 %85 %87 = load i8, ptr %86, align 1 - switch i8 %87, label %.thread211 [ + switch i8 %87, label %.thread218 [ i8 105, label %88 i8 101, label %88 ] @@ -333,19 +333,12 @@ define hidden range(i32 -2147483648, 2) i32 @indonesian_ISO_8859_1_stem(ptr noun 155: ; preds = %.thread194 %156 = tail call fastcc i32 @r_remove_second_order_prefix(ptr noundef nonnull %0) %157 = icmp eq i32 %156, 0 + %158 = icmp slt i32 %156, 0 %.lobit = lshr i32 %156, 31 - %.11125 = select i1 %157, i32 6, i32 %.lobit - switch i32 %.11125, label %158 [ - i32 0, label %r_remove_particle.exit.sink.split - i32 6, label %r_remove_particle.exit.sink.split - ] - -158: ; preds = %155 - %159 = icmp slt i32 %156, 0 - %..5 = select i1 %159, i32 %156, i32 %.016.i.ph + %.11125 = select i1 %158, i32 %156, i32 %.016.i.ph %.9 = select i1 %157, i32 %.016.i.ph, i32 %..5 %cond = icmp sgt i32 %156, -1 - br i1 %cond, label %r_remove_particle.exit.sink.split, label %r_remove_particle.exit + br i1 %cond, label %r_remove_particle.exit.sink.split, label %.critedge .thread211: ; preds = %80, %83, %88 store i32 %75, ptr %5, align 8 @@ -366,26 +359,29 @@ define hidden range(i32 -2147483648, 2) i32 @indonesian_ISO_8859_1_stem(ptr noun %168 = load i32, ptr %25, align 4 store i32 %168, ptr %5, align 8 %169 = tail call fastcc i32 @r_remove_suffix(ptr noundef nonnull %0) - %.fr = freeze i32 %169 - %170 = icmp eq i32 %.fr, 0 - %.lobit216 = lshr i32 %.fr, 31 - %.15 = select i1 %170, i32 8, i32 %.lobit216 - switch i32 %.15, label %.critedge [ - i32 0, label %r_remove_particle.exit.sink.split - i32 8, label %r_remove_particle.exit.sink.split - ] - -.critedge: ; preds = %167 - %switch148 = icmp slt i32 %.fr, 0 - %spec.select = select i1 %switch148, i32 %.fr, i32 1 + %169 = icmp eq i32 %169, 0 + %170 = icmp slt i32 %168, 0 + %.lobit216 = lshr i32 %168, 31 + %.15 = select i1 %170, i32 %168, i32 %.016.i.ph + %.13 = select i1 %169, i32 %.016.i.ph, i32 %..4. + %171 = add nsw i32 %.lobit224, -1 + %switch258 = icmp ult i32 %171, 7 + br i1 %switch258, label %.critedge, label %r_remove_particle.exit.sink.split + +.critedge: ; preds = %167, %155 + %.12126 = phi i32 [ %.lobit224, %166 ], [ %.lobit, %155 ] + %.10 = phi i32 [ %.13, %166 ], [ %.9, %155 ] + %.12126.fr = freeze i32 %.12126 + %switch148.not = icmp eq i32 %.12126.fr, 0 + %spec.select = select i1 %switch148.not, i32 1, i32 %.10 br label %r_remove_particle.exit -r_remove_particle.exit.sink.split: ; preds = %167, %162, %167, %158, %155, %.thread194, %155, %139, %145 +r_remove_particle.exit.sink.split: ; preds = %161, %166, %145, %139, %155, %.thread195 store i32 %75, ptr %5, align 8 br label %r_remove_particle.exit -r_remove_particle.exit: ; preds = %.critedge, %r_remove_particle.exit.sink.split, %149, %92, %95, %98, %102, %117, %114, %131, %128, %158, %.thread211, %63, %37, %73, %47, %._crit_edge - %.0 = phi i32 [ 0, %._crit_edge ], [ 0, %47 ], [ 0, %73 ], [ %40, %37 ], [ %66, %63 ], [ %93, %92 ], [ %96, %95 ], [ %100, %98 ], [ %104, %102 ], [ %118, %117 ], [ %115, %114 ], [ %132, %131 ], [ %129, %128 ], [ %.9, %158 ], [ %160, %.thread211 ], [ %147, %149 ], [ %spec.select, %.critedge ], [ 1, %r_remove_particle.exit.sink.split ] +r_remove_particle.exit: ; preds = %.critedge, %r_remove_particle.exit.sink.split, %128, %131, %114, %117, %102, %98, %95, %92, %149, %.thread218, %63, %37, %73, %47, %._crit_edge + %.0 = phi i32 [ 0, %._crit_edge ], [ 0, %47 ], [ 0, %73 ], [ %40, %37 ], [ %66, %63 ], [ %129, %128 ], [ %132, %131 ], [ %115, %114 ], [ %118, %117 ], [ %104, %102 ], [ %100, %98 ], [ %96, %95 ], [ %93, %92 ], [ %147, %149 ], [ %160, %.thread218 ], [ %spec.select, %.critedge ], [ 1, %r_remove_particle.exit.sink.split ] ret i32 %.0 } diff --git a/bench/pyo3-rs/optimized/249pdmmr5286g8h9.ll b/bench/pyo3-rs/optimized/249pdmmr5286g8h9.ll index ed11a6e3f04..d185a9b30e9 100644 --- a/bench/pyo3-rs/optimized/249pdmmr5286g8h9.ll +++ b/bench/pyo3-rs/optimized/249pdmmr5286g8h9.ll @@ -4910,24 +4910,27 @@ _ZN17pyo3_build_config5impl_25load_cross_compile_config17h3df21c1adc49da8dE.exit %230 = getelementptr inbounds nuw i8, ptr %7, i64 1 %231 = getelementptr inbounds nuw i8, ptr %52, i64 152 %232 = load i8, ptr %231, align 8, !noalias !42 - %233 = icmp eq i8 %232, 3 - br i1 %233, label %234, label %238 - -234: ; preds = %227 - %235 = getelementptr inbounds nuw i8, ptr %52, i64 153 - %236 = load i8, ptr %235, align 1, !noalias !42 - %237 = icmp ult i8 %236, %.sroa.33.0.extract.trunc.i - br i1 %237, label %241, label %240 - -238: ; preds = %227 - %239 = icmp ult i8 %232, 3 - br i1 %239, label %241, label %240 - -240: ; preds = %238, %234 + %233 = call i8 @llvm.ucmp.i8.i8(i8 3, i8 %232) + %234 = icmp eq i8 %232, 3 + br i1 %234, label %235, label %239 + +235: ; preds = %227 + %236 = getelementptr inbounds nuw i8, ptr %52, i64 153 + %237 = load i8, ptr %236, align 1, !noalias !42 + %238 = call i8 @llvm.ucmp.i8.i8(i8 %.sroa.33.0.extract.trunc.i, i8 %237) + br label %239 + +239:; preds = %235, %227 + %.sroa.04.0.i = phi i8 [ %238, %235 ], [ %233, %227 ] + %.sroa.04.0.off.i = add nsw i8 %.sroa.04.0.i, -1 + %switch.i = icmp ult i8 %.sroa.04.0.off.i, -2 + br i1 %switch.i, label %241, label %240 + +240: ; preds = %239 store i16 %229, ptr %231, align 8, !noalias !42 br label %.thread -241: ; preds = %238, %234 +241: ; preds = %239 store ptr %7, ptr %3, align 8, !noalias !42 %.sroa.210.0..sroa_idx.i = getelementptr inbounds nuw i8, ptr %3, i64 8 store ptr @"_ZN78_$LT$pyo3_build_config..impl_..PythonVersion$u20$as$u20$core..fmt..Display$GT$3fmt17hdf102beba5d9c3bdE", ptr %.sroa.210.0..sroa_idx.i, align 8, !noalias !42 @@ -5663,6 +5666,9 @@ declare void @"_ZN60_$LT$alloc..string..String$u20$as$u20$core..clone..Clone$GT$ ; Function Attrs: inlinehint nonlazybind uwtable declare { ptr, i64 } @"_ZN81_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops..index..Index$LT$I$GT$$GT$5index17h77dcb242a2f38bc0E"(ptr align 8, ptr align 8) unnamed_addr #3 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i8(i8, i8) #7 + ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.umin.i64(i64, i64) #7 diff --git a/bench/qdrant-rs/optimized/1qtu8dw3f0ctj9yc.ll b/bench/qdrant-rs/optimized/1qtu8dw3f0ctj9yc.ll index 1977e869dba..1eb5d9e340a 100644 --- a/bench/qdrant-rs/optimized/1qtu8dw3f0ctj9yc.ll +++ b/bench/qdrant-rs/optimized/1qtu8dw3f0ctj9yc.ll @@ -679,7 +679,10 @@ _ZN6sparse6common13sparse_vector12SparseVector9is_sorted17h7c48e1966c46940eE.exi %25 = getelementptr inbounds nuw i8, ptr %0, i64 40 %26 = load i64, ptr %25, align 8, !noundef !5 %27 = getelementptr inbounds float, ptr %24, i64 %26 - %.0.sroa.speculated.i.i.i = tail call noundef i64 @llvm.umin.i64(i64 %14, i64 %26) + %.0.sroa.speculated.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %14, i64 %26) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %26, i64 %14 store ptr %12, ptr %9, align 8 %.sroa.4.0..sroa_idx = getelementptr inbounds nuw i8, ptr %9, i64 8 store ptr %21, ptr %.sroa.4.0..sroa_idx, align 8 @@ -2358,7 +2361,7 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #14 declare void @llvm.experimental.noalias.scope.decl(metadata) #15 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #16 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #16 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32, i32) #16 diff --git a/bench/qdrant-rs/optimized/22qkayp1ke90eqq2.ll b/bench/qdrant-rs/optimized/22qkayp1ke90eqq2.ll index f7f8dbd9f9b..b27e440e049 100644 --- a/bench/qdrant-rs/optimized/22qkayp1ke90eqq2.ll +++ b/bench/qdrant-rs/optimized/22qkayp1ke90eqq2.ll @@ -15,7 +15,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %11 = ptrtoint ptr %4 to i64 %12 = ptrtoint ptr %3 to i64 %13 = sub nuw i64 %11, %12 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %9, i64 %13) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %9, i64 %13) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %13, i64 %9 store ptr %1, ptr %0, align 8 %14 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %14, align 8 @@ -42,7 +45,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6min_by17h39cc58f7a5c9a1beE.llvm.1918764568648123415(i64 noundef %0, i64 noundef %1) unnamed_addr #2 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.0.sroa.speculated } @@ -306,9 +312,6 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #9 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #10 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #10 - ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #11 diff --git a/bench/qdrant-rs/optimized/58hgu3rrppg9eakf.ll b/bench/qdrant-rs/optimized/58hgu3rrppg9eakf.ll index ab2304f51da..d097db640fa 100644 --- a/bench/qdrant-rs/optimized/58hgu3rrppg9eakf.ll +++ b/bench/qdrant-rs/optimized/58hgu3rrppg9eakf.ll @@ -3396,11 +3396,8 @@ define hidden void @"_ZN4core3ptr54drop_in_place$LT$validator..types..Validation "_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i", %4, %1 %8 = getelementptr inbounds nuw i8, ptr %0, i64 24 %.val3 = load i64, ptr %8, align 8, !range !241, !noundef !4 - switch i64 %.val3, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5" [ - i64 -9223372036854775807, label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6" - i64 -9223372036854775808, label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6" - i64 0, label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6" - ] + %switch = icmp sgt i64 %.val3, 0 + br i1 %switch, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5", label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5": ; preds = %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit" %9 = getelementptr inbounds nuw i8, ptr %0, i64 32 @@ -3408,7 +3405,7 @@ define hidden void @"_ZN4core3ptr54drop_in_place$LT$validator..types..Validation tail call void @__rust_dealloc(ptr noundef nonnull %.val4, i64 noundef %.val3, i64 noundef 1) #18, !noalias !1537 br label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6" -"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5", %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit", %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit", %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit" +"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6": ; preds = %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit", %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5" %10 = getelementptr inbounds nuw i8, ptr %0, i64 48 %11 = getelementptr inbounds nuw i8, ptr %0, i64 80 tail call void @_ZN9hashbrown3raw13RawTableInner16drop_inner_table17h9180e02f40fc90beE(ptr noalias noundef nonnull align 8 dereferenceable(48) %10, ptr noalias noundef nonnull readonly align 1 %11, i64 noundef 56, i64 noundef 16) @@ -4535,11 +4532,8 @@ define hidden void @"_ZN4core3ptr64drop_in_place$LT$$u5b$validator..types..Valid "_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i", %9, %4 %13 = getelementptr inbounds nuw i8, ptr %5, i64 24 %.val3.i = load i64, ptr %13, align 8, !range !241, !alias.scope !1948, !noundef !4 - switch i64 %.val3.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5.i" [ - i64 -9223372036854775807, label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6.i" - i64 -9223372036854775808, label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6.i" - i64 0, label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6.i" - ] + %switch.i = icmp sgt i64 %.val3.i, 0 + br i1 %switch.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5.i", label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5.i": ; preds = %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit.i" %14 = getelementptr inbounds nuw i8, ptr %5, i64 32 @@ -4547,7 +4541,7 @@ define hidden void @"_ZN4core3ptr64drop_in_place$LT$$u5b$validator..types..Valid tail call void @__rust_dealloc(ptr noundef nonnull %.val4.i, i64 noundef %.val3.i, i64 noundef 1) #18, !noalias !1973 br label %"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6.i" -"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5.i", %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit.i", %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit.i", %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit.i" +"_ZN4core3ptr78drop_in_place$LT$core..option..Option$LT$alloc..borrow..Cow$LT$str$GT$$GT$$GT$17h87533781efd4aa0aE.exit6.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17h613b0af57122470fE.llvm.4482545766329047864.exit.i.i1.i.i.i.i5.i", %"_ZN4core3ptr50drop_in_place$LT$alloc..borrow..Cow$LT$str$GT$$GT$17h4ce6cac8246f0f89E.llvm.4482545766329047864.exit.i" %15 = getelementptr inbounds nuw i8, ptr %5, i64 48 %16 = getelementptr inbounds nuw i8, ptr %5, i64 80 invoke void @_ZN9hashbrown3raw13RawTableInner16drop_inner_table17h9180e02f40fc90beE(ptr noalias noundef nonnull align 8 dereferenceable(48) %15, ptr noalias noundef nonnull readonly align 1 %16, i64 noundef 56, i64 noundef 16) diff --git a/bench/qdrant-rs/optimized/mlg9lxn4zda3gwe.ll b/bench/qdrant-rs/optimized/mlg9lxn4zda3gwe.ll index 9132d2549b8..ef9c467dec8 100644 --- a/bench/qdrant-rs/optimized/mlg9lxn4zda3gwe.ll +++ b/bench/qdrant-rs/optimized/mlg9lxn4zda3gwe.ll @@ -269,7 +269,10 @@ default.unreachable: ; preds = %1 %3 = tail call noundef i64 @_ZN6common3cpu12get_num_cpus17h977909401643c6caE() %4 = sub i64 0, %0 %5 = tail call i64 @llvm.usub.sat.i64(i64 %3, i64 %4) - %.0.sroa.speculated.i = tail call noundef range(i64 1, 0) i64 @llvm.umax.i64(i64 %5, i64 1) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %5, i64 1) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %5, i64 1 br label %21 6: ; preds = %1 @@ -304,11 +307,14 @@ default.unreachable: ; preds = %1 _ZN6common8defaults30default_cpu_budget_unallocated17ha4cd006b1243a7aaE.exit: ; preds = %6, %9, %11, %13, %15, %17, %19 %.0.i.neg = phi i64 [ %.neg.i.neg, %19 ], [ 0, %6 ], [ 1, %9 ], [ 2, %11 ], [ 3, %13 ], [ 4, %15 ], [ 6, %17 ] %20 = tail call i64 @llvm.usub.sat.i64(i64 %7, i64 %.0.i.neg) - %.0.sroa.speculated.i9 = tail call noundef range(i64 1, 0) i64 @llvm.umax.i64(i64 %20, i64 1) + %.0.sroa.speculated.i9 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %20, i64 1) + %.off.i10 = add nsw i8 %.0.i.i.i9, -1 + %switch.i11 = icmp ult i8 %.off.i10, -2 + %.0.sroa.speculated.i12 = select i1 %switch.i11, i64 %20, i64 1 br label %21 21: ; preds = %1, %_ZN6common8defaults30default_cpu_budget_unallocated17ha4cd006b1243a7aaE.exit, %2 - %.07 = phi i64 [ %.0.sroa.speculated.i, %2 ], [ %.0.sroa.speculated.i9, %_ZN6common8defaults30default_cpu_budget_unallocated17ha4cd006b1243a7aaE.exit ], [ %0, %1 ] + %.07 = phi i64 [ %.0.sroa.speculated.i, %2 ], [ %.0.sroa.speculated.i12, %_ZN6common8defaults30default_cpu_budget_unallocated17ha4cd006b1243a7aaE.exit ], [ %0, %1 ] ret i64 %.07 } @@ -342,7 +348,10 @@ _ZN5alloc5alloc15exchange_malloc17ha641d2894b944555E.exit: ; preds = %1 define noundef range(i64 0, -9223372036854775807) i64 @_ZN6common3cpu9CpuBudget11min_permits17h6c9d540e1d53e0bdE(ptr noalias noundef readonly align 8 captures(none) dereferenceable(16) %0, i64 noundef %1) unnamed_addr #1 personality ptr @rust_eh_personality { %3 = getelementptr inbounds nuw i8, ptr %0, i64 8 %4 = load i64, ptr %3, align 8, !noundef !5 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %1, i64 %4) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %1, i64 %4) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %4, i64 %1 %5 = lshr i64 %.0.sroa.speculated.i, 1 %.0.i = sub i64 %.0.sroa.speculated.i, %5 ret i64 %.0.i @@ -355,14 +364,20 @@ define void @_ZN6common3cpu9CpuBudget11try_acquire17hd560b5c1f76ddff5E(ptr noali %6 = alloca { ptr, [1 x i64] }, align 8 %7 = getelementptr inbounds nuw i8, ptr %1, i64 8 %8 = load i64, ptr %7, align 8, !alias.scope !71, !noundef !5 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %2, i64 %8) + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %2, i64 %8) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %8, i64 %2 %9 = lshr i64 %.0.sroa.speculated.i.i, 1 %.0.i.i = sub i64 %.0.sroa.speculated.i.i, %9 %10 = trunc i64 %.0.i.i to i32 %11 = load ptr, ptr %1, align 8, !nonnull !5, !noundef !5 %12 = getelementptr inbounds nuw i8, ptr %11, i64 16 %13 = tail call noundef i64 @_ZN5tokio4sync9semaphore9Semaphore17available_permits17h894e3f33b16c9931E(ptr noundef nonnull align 8 %12) - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %13, i64 %2) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %13, i64 %2) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %2, i64 %13 %14 = trunc i64 %.0.sroa.speculated.i to i32 %15 = icmp eq i64 %2, 0 %16 = icmp ult i32 %14, %10 @@ -434,7 +449,10 @@ define void @_ZN6common3cpu9CpuBudget11try_acquire17hd560b5c1f76ddff5E(ptr noali define noundef zeroext i1 @_ZN6common3cpu9CpuBudget10has_budget17hf593fdaf96cdc1b6E(ptr noalias noundef readonly align 8 captures(none) dereferenceable(16) %0, i64 noundef %1) unnamed_addr #0 personality ptr @rust_eh_personality { %3 = getelementptr inbounds nuw i8, ptr %0, i64 8 %4 = load i64, ptr %3, align 8, !alias.scope !80, !noundef !5 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %1, i64 %4) + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %1, i64 %4) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %4, i64 %1 %5 = lshr i64 %.0.sroa.speculated.i.i, 1 %.0.i.i = sub i64 %.0.sroa.speculated.i.i, %5 tail call void @llvm.experimental.noalias.scope.decl(metadata !83) @@ -498,9 +516,12 @@ define { ptr, i64 } @"_ZN65_$LT$common..cpu..CpuBudget$u20$as$u20$core..default. _ZN6common3cpu14get_cpu_budget17hf0884385e486daffE.exit: ; preds = %0, %3, %5, %7, %9, %11, %13 %.0.i.neg.i = phi i64 [ %.neg.i.neg.i, %13 ], [ 0, %0 ], [ 1, %3 ], [ 2, %5 ], [ 3, %7 ], [ 4, %9 ], [ 6, %11 ] %14 = tail call i64 @llvm.usub.sat.i64(i64 %1, i64 %.0.i.neg.i) - %.0.sroa.speculated.i9.i = tail call noundef range(i64 1, 0) i64 @llvm.umax.i64(i64 %14, i64 1) + %.0.sroa.speculated.i9.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %14, i64 1) + %.off.i10.i = add nsw i8 %.0.i.i.i9.i, -1 + %switch.i11.i = icmp ult i8 %.off.i10.i, -2 + %.0.sroa.speculated.i12.i = select i1 %switch.i11.i, i64 %14, i64 1 call void @llvm.lifetime.start.p0(ptr nonnull %.sroa.5.i) - call void @_ZN5tokio4sync9semaphore9Semaphore3new17hfd3968a7889ce3e0E(ptr noalias noundef nonnull sret({ { { {}, { { { i8 } }, [7 x i8], { { { ptr, ptr, {} }, i8, [7 x i8] } } } }, { { { i64 } } } } }) align 8 captures(none) dereferenceable(40) %.sroa.5.i, i64 noundef %.0.sroa.speculated.i9.i, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.a6d557859d0675d687d6045e54bc0e3d.9) + call void @_ZN5tokio4sync9semaphore9Semaphore3new17hfd3968a7889ce3e0E(ptr noalias noundef nonnull sret({ { { {}, { { { i8 } }, [7 x i8], { { { ptr, ptr, {} }, i8, [7 x i8] } } } }, { { { i64 } } } } }) align 8 captures(none) dereferenceable(40) %.sroa.5.i, i64 noundef %.0.sroa.speculated.i12.i, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.a6d557859d0675d687d6045e54bc0e3d.9) %15 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !86 %16 = tail call noundef align 8 dereferenceable_or_null(56) ptr @__rust_alloc(i64 noundef 56, i64 noundef 8) #15, !noalias !86 %17 = icmp eq ptr %16, null @@ -518,7 +539,7 @@ _ZN6common3cpu9CpuBudget3new17h4c4933f1c18335abE.exit: ; preds = %_ZN6common3cpu call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %.sroa.5.0..sroa_idx.i, ptr noundef nonnull align 8 dereferenceable(40) %.sroa.5.i, i64 40, i1 false) call void @llvm.lifetime.end.p0(ptr nonnull %.sroa.5.i) %19 = insertvalue { ptr, i64 } poison, ptr %16, 0 - %20 = insertvalue { ptr, i64 } %19, i64 %.0.sroa.speculated.i9.i, 1 + %20 = insertvalue { ptr, i64 } %19, i64 %.0.sroa.speculated.i12.i, 1 ret { ptr, i64 } %20 } @@ -853,14 +874,11 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #10 declare void @llvm.experimental.noalias.scope.decl(metadata) #11 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #12 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #12 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64, i64) #12 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #12 - attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: read) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: write) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/quinn-rs/optimized/5p0ewn158olmqyt8sxz4cudxq.ll b/bench/quinn-rs/optimized/5p0ewn158olmqyt8sxz4cudxq.ll index 3efab8403f2..b0f8ad634f4 100644 --- a/bench/quinn-rs/optimized/5p0ewn158olmqyt8sxz4cudxq.ll +++ b/bench/quinn-rs/optimized/5p0ewn158olmqyt8sxz4cudxq.ll @@ -3142,10 +3142,8 @@ define hidden noundef zeroext i1 @_ZN11quinn_proto10connection7streams5state12St "_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit": ; preds = %.lr.ph.i.i %37 = getelementptr inbounds i8, ptr %25, i64 -16 %38 = load i64, ptr %37, align 8, !range !45, !noundef !3 - switch i64 %38, label %39 [ - i64 2, label %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit.thread" - i64 0, label %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit.thread" - ] + %switch = icmp eq i64 %38, 1 + br i1 %switch, label %39, label %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit.thread" 39: ; preds = %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit" %40 = getelementptr inbounds i8, ptr %25, i64 -8 @@ -3153,8 +3151,8 @@ define hidden noundef zeroext i1 @_ZN11quinn_proto10connection7streams5state12St %42 = call noundef zeroext i1 @_ZN11quinn_proto10connection7streams4recv4Recv21can_send_flow_control17h591f7c25e06336d9E(ptr noalias noundef nonnull readonly align 8 dereferenceable(136) %41) br label %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit.thread" -"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit.thread": ; preds = %._crit_edge.i.i, %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit", %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit", %2, %39 - %.sroa.0.0 = phi i1 [ %42, %39 ], [ false, %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit" ], [ false, %2 ], [ false, %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit" ], [ false, %._crit_edge.i.i ] +"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit.thread": ; preds = %._crit_edge.i.i, %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit", %2, %39 + %.sroa.0.0 = phi i1 [ %42, %39 ], [ false, %2 ], [ false, %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$9get_inner17h02004744877c64ceE.exit" ], [ false, %._crit_edge.i.i ] ret i1 %.sroa.0.0 } @@ -3315,8 +3313,8 @@ define hidden void @_ZN11quinn_proto10connection7streams5state12StreamsState20wr br label %.lr.ph891 .lr.ph891: ; preds = %"_ZN4core6result19Result$LT$T$C$E$GT$6expect17h3963a0157a2ea48aE.exit", %.lr.ph891.lr.ph - %124 = phi i64 [ %123, %.lr.ph891.lr.ph ], [ %790, %"_ZN4core6result19Result$LT$T$C$E$GT$6expect17h3963a0157a2ea48aE.exit" ] - %125 = phi i64 [ %.promoted, %.lr.ph891.lr.ph ], [ %785, %"_ZN4core6result19Result$LT$T$C$E$GT$6expect17h3963a0157a2ea48aE.exit" ] + %124 = phi i64 [ %123, %.lr.ph892.lr.ph ], [ %790, %"_ZN4core6result19Result$LT$T$C$E$GT$6expect17h3963a0157a2ea48aE.exit" ] + %125 = phi i64 [ %.promoted, %.lr.ph892.lr.ph ], [ %785, %"_ZN4core6result19Result$LT$T$C$E$GT$6expect17h3963a0157a2ea48aE.exit" ] br label %147 .thread: ; preds = %"_ZN4core6result19Result$LT$T$C$E$GT$6expect17h3963a0157a2ea48aE.exit", %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$13get_inner_mut17ha1f76031d9475efaE.exit.thread", %.lr.ph.lr.ph, %6 @@ -3376,7 +3374,7 @@ define hidden void @_ZN11quinn_proto10connection7streams5state12StreamsState20wr br i1 %.not529896, label %._crit_edge, label %.lr.ph897 147: ; preds = %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$13get_inner_mut17ha1f76031d9475efaE.exit.thread", %.lr.ph891 - %148 = phi i64 [ %124, %.lr.ph891 ], [ %713, %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$13get_inner_mut17ha1f76031d9475efaE.exit.thread" ] + %148 = phi i64 [ %124, %.lr.ph892 ], [ %713, %"_ZN9hashbrown3map28HashMap$LT$K$C$V$C$S$C$A$GT$13get_inner_mut17ha1f76031d9475efaE.exit.thread" ] %149 = add nsw i64 %148, -1 store i64 %149, ptr %102, align 8 %150 = load i64, ptr %2, align 8, !range !20, !noundef !3 @@ -4274,10 +4272,8 @@ define hidden void @_ZN11quinn_proto10connection7streams5state12StreamsState20wr 503: ; preds = %.lr.ph.i.i615 %504 = getelementptr inbounds i8, ptr %370, i64 -16 %505 = load i64, ptr %504, align 8, !range !45, !noundef !3 - switch i64 %505, label %506 [ - i64 2, label %.thread675 - i64 0, label %.thread675 - ] + %switch871 = icmp eq i64 %505, 1 + br i1 %switch871, label %506, label %.thread675 506: ; preds = %503 %507 = getelementptr inbounds i8, ptr %370, i64 -8 @@ -4285,7 +4281,7 @@ define hidden void @_ZN11quinn_proto10connection7streams5state12StreamsState20wr %509 = call noundef zeroext i1 @_ZN11quinn_proto10connection7streams4recv4Recv21can_send_flow_control17h591f7c25e06336d9E(ptr noalias noundef nonnull readonly align 8 dereferenceable(136) %508) br i1 %509, label %514, label %.thread675 -.thread675: ; preds = %._crit_edge.i.i618, %503, %503, %350, %506 +.thread675: ; preds = %._crit_edge.i.i618, %503, %350, %506 %510 = load i64, ptr %97, align 8, !noundef !3 %511 = icmp sgt i64 %510, -1 call void @llvm.assume(i1 %511) diff --git a/bench/quinn-rs/optimized/aa0f6okxl6jzwxndw38ja55fd.ll b/bench/quinn-rs/optimized/aa0f6okxl6jzwxndw38ja55fd.ll index 8073194c16b..be87a758ace 100644 --- a/bench/quinn-rs/optimized/aa0f6okxl6jzwxndw38ja55fd.ll +++ b/bench/quinn-rs/optimized/aa0f6okxl6jzwxndw38ja55fd.ll @@ -5196,17 +5196,11 @@ define hidden noundef zeroext i1 @_ZN11quinn_proto10connection4mtud12MtuDiscover %24 = load i64, ptr %23, align 8, !alias.scope !298 %.fr.i = freeze i64 %24 %25 = icmp eq i64 %.fr.i, %2 - br i1 %25, label %switch.early.test.i, label %.thread - -switch.early.test.i: ; preds = %21 - switch i64 %20, label %26 [ - i64 4, label %.thread - i64 3, label %.thread - i64 2, label %.thread - i64 0, label %.thread - ] + %switch.i = icmp eq i64 %20, 1 + %or.cond.i = and i1 %switch.i, %25 + br i1 %or.cond.i, label %26, label %.thread -26: ; preds = %switch.early.test.i +26: ; preds = %21 store i64 0, ptr %19, align 8, !alias.scope !298 %27 = getelementptr inbounds nuw i8, ptr %0, i64 80 store i64 0, ptr %27, align 8, !alias.scope !298 @@ -5218,7 +5212,7 @@ switch.early.test.i: ; preds = %21 %.not91 = icmp eq i64 %31, 5 br i1 %.not91, label %.critedge, label %37 -.thread: ; preds = %21, %switch.early.test.i, %switch.early.test.i, %switch.early.test.i, %switch.early.test.i, %18 +.thread: ; preds = %21, %18 tail call void @llvm.experimental.noalias.scope.decl(metadata !301) call void @llvm.lifetime.start.p0(ptr nonnull %5) store i16 %3, ptr %5, align 2, !noalias !301 diff --git a/bench/rand-rs/optimized/1l07c6ml3r7a5z09.ll b/bench/rand-rs/optimized/1l07c6ml3r7a5z09.ll index e1579a1bce3..2a8a78e9372 100644 --- a/bench/rand-rs/optimized/1l07c6ml3r7a5z09.ll +++ b/bench/rand-rs/optimized/1l07c6ml3r7a5z09.ll @@ -17,7 +17,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 2 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8 @@ -48,7 +51,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 3 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8 @@ -166,7 +172,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6min_by17h7e0de8fbcf87535dE.llvm.509470019704245047(i64 noundef %0, i64 noundef %1) unnamed_addr #5 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.0.sroa.speculated } @@ -218,9 +227,6 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #13 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #14 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #14 - attributes #0 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: write, inaccessiblemem: write) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/rand-rs/optimized/3a37va2ifhzer5u4.ll b/bench/rand-rs/optimized/3a37va2ifhzer5u4.ll index ea50be96c9a..d71544d4725 100644 --- a/bench/rand-rs/optimized/3a37va2ifhzer5u4.ll +++ b/bench/rand-rs/optimized/3a37va2ifhzer5u4.ll @@ -119,7 +119,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6min_by17h0bd9cd0f4e2883bcE.llvm.8950959336182019511(i64 noundef %0, i64 noundef %1) unnamed_addr #2 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.0.sroa.speculated } @@ -136,27 +139,38 @@ define hidden noundef range(i8 -1, 2) i8 @_ZN4core3ops8function6FnOnce9call_once ; Function Attrs: nonlazybind uwtable define hidden { i64, i64 } @_ZN9rand_core5impls15fill_via_chunks17h227660b9829fe39bE(ptr noalias noundef nonnull readonly align 4 captures(none) %0, i64 noundef %1, ptr noalias noundef nonnull writeonly align 1 captures(none) %2, i64 noundef %3) unnamed_addr #4 personality ptr @rust_eh_personality { %5 = shl i64 %1, 2 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %5, i64 %3) - %6 = add nuw i64 %.0.sroa.speculated.i, 3 + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %5, i64 %3) + %6 = add nsw i8 %.0.sroa.speculated.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %3, i64 %5 + %6 = add i64 %.0.sroa.speculated.i, 3 %7 = lshr i64 %6, 2 - %8 = icmp ugt i64 %7, %1 + %8 = icmp ugt i64 %.0.sroa.speculated.i, %3 br i1 %8, label %9, label %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit" 9: ; preds = %4 - tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %7, i64 noundef %1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.2.llvm.8950959336182019511) #9, !noalias !10 + tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %.0.sroa.speculated.i, i64 noundef %3, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.1.llvm.8950959336182019511) #9, !noalias !10 unreachable "_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit": ; preds = %4 - %10 = and i64 %6, -4 - %11 = icmp ugt i64 %.0.sroa.speculated.i, %10 - br i1 %11, label %12, label %"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E.exit" + %10 = icmp ugt i64 %7, %1 + br i1 %10, label %11, label %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit" 12: ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit" - tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %.0.sroa.speculated.i, i64 noundef %10, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.3.llvm.8950959336182019511) #9, !noalias !13 + tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %7, i64 noundef %1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.2.llvm.8950959336182019511) #9, !noalias !13 + unreachable + +"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit": ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17h0b5178005068e8e4E.llvm.8950959336182019511.exit" + %12 = and i64 %6, -4 + %13 = icmp ugt i64 %.0.sroa.speculated.i, %12 + br i1 %13, label %14, label %"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E.exit" + +14: ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit" + tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %.0.sroa.speculated.i, i64 noundef %12, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.3.llvm.8950959336182019511) #9, !noalias !16 unreachable "_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E.exit": ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit" - tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %2, ptr nonnull readonly align 4 %0, i64 %.0.sroa.speculated.i, i1 false), !alias.scope !16, !noalias !20 + tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %2, ptr nonnull readonly align 4 %0, i64 %.0.sroa.speculated.i, i1 false), !alias.scope !19, !noalias !23 %13 = insertvalue { i64, i64 } poison, i64 %7, 0 %14 = insertvalue { i64, i64 } %13, i64 %.0.sroa.speculated.i, 1 ret { i64, i64 } %14 @@ -165,27 +179,38 @@ define hidden { i64, i64 } @_ZN9rand_core5impls15fill_via_chunks17h227660b9829fe ; Function Attrs: nonlazybind uwtable define hidden { i64, i64 } @_ZN9rand_core5impls15fill_via_chunks17h46b4e1b4df1e0c3eE(ptr noalias noundef nonnull readonly align 8 captures(none) %0, i64 noundef %1, ptr noalias noundef nonnull writeonly align 1 captures(none) %2, i64 noundef %3) unnamed_addr #4 personality ptr @rust_eh_personality { %5 = shl i64 %1, 3 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %5, i64 %3) - %6 = add nuw i64 %.0.sroa.speculated.i, 7 + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %5, i64 %3) + %6 = add nsw i8 %.0.sroa.speculated.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %3, i64 %5 + %6 = add i64 %.0.sroa.speculated.i, 7 %7 = lshr i64 %6, 3 - %8 = icmp ugt i64 %7, %1 - br i1 %8, label %9, label %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511.exit" + %8 = icmp ugt i64 %.0.sroa.speculated.i, %3 + br i1 %8, label %9, label %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit" 9: ; preds = %4 - tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %7, i64 noundef %1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.2.llvm.8950959336182019511) #9, !noalias !22 + tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %.0.sroa.speculated.i, i64 noundef %3, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.1.llvm.8950959336182019511) #9, !noalias !25 unreachable -"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511.exit": ; preds = %4 +"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17h0b5178005068e8e4E.llvm.8950959336182019511.exit": ; preds = %4 + %10 = icmp ugt i64 %7, %1 + br i1 %10, label %11, label %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511.exit" + +11: ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17h0b5178005068e8e4E.llvm.8950959336182019511.exit" + tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %7, i64 noundef %1, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.2.llvm.8950959336182019511) #9, !noalias !28 + unreachable + +"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511.exit": ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511.exit" %10 = and i64 %6, -8 %11 = icmp ugt i64 %.0.sroa.speculated.i, %10 br i1 %11, label %12, label %"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E.exit" 12: ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511.exit" - tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %.0.sroa.speculated.i, i64 noundef %10, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.3.llvm.8950959336182019511) #9, !noalias !25 + tail call void @_ZN4core5slice5index24slice_end_index_len_fail17h9163fa4abd3ca1acE(i64 noundef %.0.sroa.speculated.i, i64 noundef %10, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) @anon.da7a21e042c449f200d9bbbdc2b23715.3.llvm.8950959336182019511) #9, !noalias !31 unreachable "_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E.exit": ; preds = %"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511.exit" - tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %2, ptr nonnull readonly align 8 %0, i64 %.0.sroa.speculated.i, i1 false), !alias.scope !28, !noalias !32 + tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %2, ptr nonnull readonly align 8 %0, i64 %.0.sroa.speculated.i, i1 false), !alias.scope !34, !noalias !38 %13 = insertvalue { i64, i64 } poison, i64 %7, 0 %14 = insertvalue { i64, i64 } %13, i64 %.0.sroa.speculated.i, 1 ret { i64, i64 } %14 @@ -209,9 +234,6 @@ declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #7 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #8 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #7 - attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: read) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } @@ -237,26 +259,32 @@ attributes #9 = { noreturn } !8 = !{!9} !9 = distinct !{!9, !7, !"_ZN4core3cmp5impls50_$LT$impl$u20$core..cmp..Ord$u20$for$u20$usize$GT$3cmp17h8f8f25612be95722E.llvm.8950959336182019511: argument 1"} !10 = !{!11} -!11 = distinct !{!11, !12, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511: argument 0"} -!12 = distinct !{!12, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511"} +!11 = distinct !{!11, !12, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17h0b5178005068e8e4E.llvm.8950959336182019511: argument 0"} +!12 = distinct !{!12, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17h0b5178005068e8e4E.llvm.8950959336182019511"} !13 = !{!14} -!14 = distinct !{!14, !15, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511: argument 0"} -!15 = distinct !{!15, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511"} -!16 = !{!17, !19} -!17 = distinct !{!17, !18, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 0"} -!18 = distinct !{!18, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E"} -!19 = distinct !{!19, !18, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 1"} -!20 = !{!21} -!21 = distinct !{!21, !18, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 2"} -!22 = !{!23} -!23 = distinct !{!23, !24, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511: argument 0"} -!24 = distinct !{!24, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511"} +!14 = distinct !{!14, !15, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511: argument 0"} +!15 = distinct !{!15, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17hb420a04f746e510aE.llvm.8950959336182019511"} +!16 = !{!17} +!17 = distinct !{!17, !18, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511: argument 0"} +!18 = distinct !{!18, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511"} +!19 = !{!20, !22} +!20 = distinct !{!20, !21, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 0"} +!21 = distinct !{!21, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E"} +!22 = distinct !{!22, !21, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 1"} +!23 = !{!24} +!24 = distinct !{!24, !21, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 2"} !25 = !{!26} -!26 = distinct !{!26, !27, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511: argument 0"} -!27 = distinct !{!27, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511"} -!28 = !{!29, !31} -!29 = distinct !{!29, !30, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 0"} -!30 = distinct !{!30, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E"} -!31 = distinct !{!31, !30, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 1"} -!32 = !{!33} -!33 = distinct !{!33, !30, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 2"} +!26 = distinct !{!26, !27, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17h0b5178005068e8e4E.llvm.8950959336182019511: argument 0"} +!27 = distinct !{!27, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$9index_mut17h0b5178005068e8e4E.llvm.8950959336182019511"} +!28 = !{!29} +!29 = distinct !{!29, !30, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511: argument 0"} +!30 = distinct !{!30, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5b9ce95e7209bc53E.llvm.8950959336182019511"} +!31 = !{!32} +!32 = distinct !{!32, !33, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511: argument 0"} +!33 = distinct !{!33, !"_ZN106_$LT$core..ops..range..Range$LT$usize$GT$$u20$as$u20$core..slice..index..SliceIndex$LT$$u5b$T$u5d$$GT$$GT$5index17h5ac6f7d4af0201e9E.llvm.8950959336182019511"} +!34 = !{!35, !37} +!35 = distinct !{!35, !36, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 0"} +!36 = distinct !{!36, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E"} +!37 = distinct !{!37, !36, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 1"} +!38 = !{!39} +!39 = distinct !{!39, !36, !"_ZN4core5slice29_$LT$impl$u20$$u5b$T$u5d$$GT$15copy_from_slice17h7cfbfdc81c67a424E: argument 2"} diff --git a/bench/rayon-rs/optimized/2xi93mrj8f00xnic.ll b/bench/rayon-rs/optimized/2xi93mrj8f00xnic.ll index 1a3fcab0ebc..74ee08ea434 100644 --- a/bench/rayon-rs/optimized/2xi93mrj8f00xnic.ll +++ b/bench/rayon-rs/optimized/2xi93mrj8f00xnic.ll @@ -695,28 +695,28 @@ define hidden void @"_ZN15crossbeam_deque5deque17Injector$LT$T$GT$4push17h6dd832 %8 = load atomic i64, ptr %7 acquire, align 8 br label %.outer -.outer: ; preds = %_ZN15crossbeam_utils7backoff7Backoff4spin17h65392e13318235e6E.exit, %3 - %.043.ph = phi ptr [ %.245, %_ZN15crossbeam_utils7backoff7Backoff4spin17h65392e13318235e6E.exit ], [ null, %3 ] - %.0.ph = phi i32 [ %spec.select, %_ZN15crossbeam_utils7backoff7Backoff4spin17h65392e13318235e6E.exit ], [ 0, %3 ] - %.023.ph = phi i64 [ %33, %_ZN15crossbeam_utils7backoff7Backoff4spin17h65392e13318235e6E.exit ], [ %6, %3 ] - %.022.in.ph = phi i64 [ %54, %_ZN15crossbeam_utils7backoff7Backoff4spin17h65392e13318235e6E.exit ], [ %8, %3 ] +.outer: ; preds = %._crit_edge.i, %3 + %.043.ph = phi ptr [ %.245, %._crit_edge.i ], [ null, %3 ] + %.0.ph = phi i32 [ %spec.select, %._crit_edge.i ], [ 0, %3 ] + %.023.ph = phi i64 [ %33, %._crit_edge.i ], [ %6, %3 ] + %.022.in.ph = phi i64 [ %54, %._crit_edge.i ], [ %8, %3 ] %9 = lshr i64 %.023.ph, 1 %10 = and i64 %9, 63 %11 = icmp eq i64 %10, 63 br i1 %11, label %.lr.ph, label %._crit_edge -._crit_edge: ; preds = %60, %.outer - %.022.in.lcssa = phi i64 [ %.022.in.ph, %.outer ], [ %62, %60 ] - %.0.lcssa = phi i32 [ %.0.ph, %.outer ], [ %.142, %60 ] - %.023.lcssa = phi i64 [ %.023.ph, %.outer ], [ %61, %60 ] - %.lcssa = phi i64 [ %10, %.outer ], [ %64, %60 ] +._crit_edge: ; preds = %62, %.outer + %.022.in.lcssa = phi i64 [ %.022.in.ph, %.outer ], [ %64, %62 ] + %.0.lcssa = phi i32 [ %.0.ph, %.outer ], [ %.141, %62 ] + %.023.lcssa = phi i64 [ %.023.ph, %.outer ], [ %63, %62 ] + %.lcssa = phi i64 [ %10, %.outer ], [ %66, %62 ] %12 = icmp samesign ugt i64 %.lcssa, 61 %.not = icmp eq ptr %.043.ph, null %or.cond = select i1 %12, i1 %.not, i1 false br i1 %or.cond, label %19, label %29 -.lr.ph: ; preds = %.outer, %60 - %.072 = phi i32 [ %.142, %60 ], [ %.0.ph, %.outer ] +.lr.ph: ; preds = %.outer, %62 + %.072 = phi i32 [ %.141, %62 ], [ %.0.ph, %.outer ] %13 = icmp ult i32 %.072, 7 br i1 %13, label %.preheader.i, label %14 @@ -726,7 +726,7 @@ define hidden void @"_ZN15crossbeam_deque5deque17Injector$LT$T$GT$4push17h6dd832 .thread.i: ; preds = %14 %15 = icmp ult i32 %.072, 11 - br i1 %15, label %.thread.i.thread, label %60 + br i1 %15, label %.thread.i.thread, label %62 .preheader.i: ; preds = %.lr.ph, %.preheader.i %.sroa.01.08.i = phi i32 [ %16, %.preheader.i ], [ 0, %.lr.ph ] @@ -738,7 +738,7 @@ define hidden void @"_ZN15crossbeam_deque5deque17Injector$LT$T$GT$4push17h6dd832 .thread.i.thread: ; preds = %.preheader.i, %.thread.i %18 = add nuw nsw i32 %.072, 1 - br label %60 + br label %62 19: ; preds = %._crit_edge call void @llvm.lifetime.start.p0(ptr nonnull %.sroa.4) @@ -826,31 +826,36 @@ define hidden void @"_ZN15crossbeam_deque5deque17Injector$LT$T$GT$4push17h6dd832 53: ; preds = %29 %54 = load atomic i64, ptr %7 acquire, align 8 - %.0.sroa.speculated.i.i = tail call noundef range(i32 0, 7) i32 @llvm.umin.i32(i32 %.0.lcssa, i32 6) - br label %57 - -_ZN15crossbeam_utils7backoff7Backoff4spin17h65392e13318235e6E.exit: ; preds = %57 - %55 = icmp ult i32 %.0.lcssa, 7 - %56 = zext i1 %55 to i32 - %spec.select = add nuw nsw i32 %.0.lcssa, %56 + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32 %.0.lcssa, i32 6) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %55 = and i32 %.0.lcssa, 31 + %56 = shl nuw i32 1, %55 + %57 = select i1 %switch.i.i, i32 64, i32 %56 + %58 = icmp sgt i32 %57, 0 + br i1 %58, label %.lr.ph.i, label %._crit_edge.i + +._crit_edge.i: ; preds = %.lr.ph.i, %53 + %59 = icmp ult i32 %.0.lcssa, 7 + %60 = zext i1 %59 to i32 + %spec.select = add nuw nsw i32 %.0.lcssa, %60 br label %.outer -57: ; preds = %57, %53 - %.sroa.01.07.i = phi i32 [ 0, %53 ], [ %58, %57 ] +57: ; preds = %53, %57 + %.sroa.01.07.i = phi i32 [ %61, %.lr.ph.i ], [ 0, %53 ] %58 = add nuw nsw i32 %.sroa.01.07.i, 1 tail call void @llvm.x86.sse2.pause() #14 - %.sroa.01.0.highbits.i34 = lshr i32 %58, %.0.sroa.speculated.i.i - %59 = icmp eq i32 %.sroa.01.0.highbits.i34, 0 - br i1 %59, label %57, label %_ZN15crossbeam_utils7backoff7Backoff4spin17h65392e13318235e6E.exit - -60: ; preds = %.thread.i, %.thread.i.thread - %.142 = phi i32 [ %18, %.thread.i.thread ], [ %.072, %.thread.i ] - %61 = load atomic i64, ptr %5 acquire, align 128 - %62 = load atomic i64, ptr %7 acquire, align 8 - %63 = lshr i64 %61, 1 - %64 = and i64 %63, 63 - %65 = icmp eq i64 %64, 63 - br i1 %65, label %.lr.ph, label %._crit_edge + %exitcond.not.i = icmp eq i32 %58, %57 + br i1 %exitcond.not.i, label %._crit_edge.i, label %57 + +62: ; preds = %.thread.i, %.thread.i.thread + %.141 = phi i32 [ %18, %.thread.i.thread ], [ %.071, %.thread.i ] + %63 = load atomic i64, ptr %5 acquire, align 128 + %61 = load atomic i64, ptr %7 acquire, align 8 + %65 = lshr i64 %63, 1 + %66 = and i64 %65, 63 + %67 = icmp eq i64 %66, 63 + br i1 %67, label %.lr.ph, label %._crit_edge .thread: ; preds = %14 %lpad.loopexit = landingpad { ptr, i32 } @@ -1732,7 +1737,7 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #18 declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #19 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i32 @llvm.umin.i32(i32, i32) #20 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32, i32) #20 attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/redis/optimized/module.ll b/bench/redis/optimized/module.ll index 56221458d6f..eac9057dab8 100644 --- a/bench/redis/optimized/module.ll +++ b/bench/redis/optimized/module.ll @@ -30391,10 +30391,9 @@ moduleConvertArgType.exit: ; preds = %.lr.ph .thread: ; preds = %13, %14 %31 = getelementptr inbounds nuw i8, ptr %7, i64 12 %32 = load i32, ptr %31, align 4, !tbaa !225 - switch i32 %32, label %33 [ - i32 -1, label %37 - i32 0, label %37 - ] + %.off = add i32 %32, -1 + %switch47 = icmp ult i32 %.off, -2 + br i1 %switch47, label %33, label %37 33: ; preds = %.thread %34 = load i32, ptr getelementptr inbounds nuw (i8, ptr @server, i64 6288), align 8, !tbaa !90 @@ -30405,7 +30404,7 @@ moduleConvertArgType.exit: ; preds = %.lr.ph tail call void (i32, ptr, ...) @_serverLog(i32 noundef 3, ptr noundef nonnull @.str.557, ptr noundef nonnull %6) #35 br label %.loopexit -37: ; preds = %.thread, %.thread +37: ; preds = %.thread %38 = getelementptr inbounds nuw i8, ptr %7, i64 40 %39 = load i32, ptr %38, align 8, !tbaa !237 %.not44 = icmp ult i32 %39, 8 diff --git a/bench/regex-rs/optimized/1hv7a9vv5ulvjrv1.ll b/bench/regex-rs/optimized/1hv7a9vv5ulvjrv1.ll index 8028c92b0e4..a7613f4ddd8 100644 --- a/bench/regex-rs/optimized/1hv7a9vv5ulvjrv1.ll +++ b/bench/regex-rs/optimized/1hv7a9vv5ulvjrv1.ll @@ -3806,24 +3806,33 @@ _ZN12regex_syntax3hir9translate8HirFrame17unwrap_repetition17hb893e4b2ea7c3361E. %822 = icmp eq i64 %821, 0 br i1 %822, label %826, label %.critedge.i.i -.critedge.i.i: ; preds = %826, %819, %807 - %823 = phi i32 [ %spec.select26.i.i, %826 ], [ %.sroa.7.0.i, %819 ], [ %.sroa.7.0.i, %807 ] - %824 = phi i32 [ 1, %826 ], [ %.sroa.0.0.i296, %819 ], [ %.sroa.0.0.i296, %807 ] - %825 = phi i32 [ %.0.sroa.speculated.i.i.i, %826 ], [ %.07.i, %819 ], [ %.07.i, %807 ] +.critedge.i.i: ; preds = %828, %819, %807 + %823 = phi i32 [ %spec.select26.i.i, %828 ], [ %.sroa.7.0.i, %819 ], [ %.sroa.7.0.i, %807 ] + %824 = phi i32 [ 1, %828 ], [ %.sroa.0.0.i296, %819 ], [ %.sroa.0.0.i296, %807 ] + %825 = phi i32 [ %.0.sroa.speculated.i.i.i, %828 ], [ %.07.i, %819 ], [ %.07.i, %807 ] switch i32 %825, label %.thread.i.i [ i32 0, label %829 i32 1, label %844 ] 826: ; preds = %819 - %827 = icmp ne i32 %.07.i, 0 - %.0.sroa.speculated.i.i.i = zext i1 %827 to i32 + %.0.i.i.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32 %.07.i, i32 1) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i32 1, i32 %.07.i store i32 %.0.sroa.speculated.i.i.i, ptr %811, align 8, !alias.scope !829, !noalias !832 - %828 = icmp ne i32 %.sroa.7.0.i, 0 - %trunc18.i.i = trunc nuw i32 %.sroa.0.0.i296 to i1 - %switch24.i.i = xor i1 %trunc18.i.i, true - %narrow.i.i = or i1 %828, %switch24.i.i - %spec.select26.i.i = zext i1 %narrow.i.i to i32 + %trunc17.i.i = trunc nuw i32 %.sroa.0.0.i296 to i1 + br i1 %trunc17.i.i, label %827, label %828 + +827:; preds = %826 + %.0.i.i.i34.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32 %.sroa.7.0.i, i32 1) + %.off.i35.i.i = add nsw i8 %.0.i.i.i34.i.i, -1 + %switch.i36.i.i = icmp ult i8 %.off.i35.i.i, -2 + %.0.sroa.speculated.i37.i.i = select i1 %switch.i36.i.i, i32 1, i32 %.sroa.7.0.i + br label %828 + +828: ; preds = %827, %826 + %spec.select26.i.i = phi i32 [ 1, %826 ], [ %.0.sroa.speculated.i37.i.i, %827 ] store i32 1, ptr %32, align 8, !alias.scope !829, !noalias !832 store i32 %spec.select26.i.i, ptr %812, align 4, !alias.scope !829, !noalias !832 br label %.critedge.i.i @@ -3845,7 +3854,7 @@ _ZN12regex_syntax3hir9translate8HirFrame17unwrap_repetition17hb893e4b2ea7c3361E. 834: ; preds = %.noexc.i.i301 invoke void @_ZN5alloc5alloc18handle_alloc_error17h81706c48453a6249E(i64 noundef 8, i64 noundef 80) #26 - to label %.noexc35.i.i unwind label %817, !noalias !831 + to label %.noexc38.i.i unwind label %817, !noalias !831 .noexc35.i.i: ; preds = %834 unreachable @@ -11176,6 +11185,9 @@ declare i8 @llvm.umin.i8(i8, i8) #20 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i8 @llvm.umax.i8(i8, i8) #20 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32, i32) #20 + attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/regex-rs/optimized/1rguw48xrsv49k4z.ll b/bench/regex-rs/optimized/1rguw48xrsv49k4z.ll index fd645de53a8..62cabcb0932 100644 --- a/bench/regex-rs/optimized/1rguw48xrsv49k4z.ll +++ b/bench/regex-rs/optimized/1rguw48xrsv49k4z.ll @@ -13037,11 +13037,14 @@ _ZN4core3str11validations15next_code_point17h557bd300d34cbe39E.exit.thread.i.i.i br i1 %.not38.i16.i.i, label %377, label %.thread25.i.i.i.i 391: ; preds = %377 - %.0.sroa.speculated.i.i11.i.i = tail call i64 @llvm.umax.i64(i64 %373, i64 %379) + %.0.sroa.speculated.i.i11.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %373, i64 %379) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i = select i1 %switch.i.i.i.i, i64 %373, i64 %379 br label %392 392: ; preds = %414, %391 - %.sroa.04.0.i12.i.i = phi i64 [ %.0.sroa.speculated.i.i11.i.i, %391 ], [ %415, %414 ] + %.sroa.04.0.i12.i.i = phi i64 [ %.0.sroa.speculated.i.i.i.i, %391 ], [ %415, %414 ] %393 = icmp ult i64 %.sroa.04.0.i12.i.i, %366 br i1 %393, label %411, label %.preheader4.i.i @@ -13097,7 +13100,7 @@ _ZN4core3str11validations15next_code_point17h557bd300d34cbe39E.exit.thread.i.i.i br i1 %.not.i18.i.i, label %392, label %422 420: ; preds = %411 - %421 = add i64 %.0.sroa.speculated.i.i11.i.i, %378 + %421 = add i64 %.0.sroa.speculated.i.i.i.i, %378 %umax.i17.i.i = tail call i64 @llvm.umax.i64(i64 %362, i64 %421) br label %.invoke495.i @@ -15928,6 +15931,9 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #19 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #17 + ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.umax.i64(i64, i64) #17 diff --git a/bench/regex-rs/optimized/1x04d8372kemp7hd.ll b/bench/regex-rs/optimized/1x04d8372kemp7hd.ll index a835c9b9242..f20735a4cd0 100644 --- a/bench/regex-rs/optimized/1x04d8372kemp7hd.ll +++ b/bench/regex-rs/optimized/1x04d8372kemp7hd.ll @@ -150,7 +150,10 @@ define hidden noundef i64 @"_ZN102_$LT$core..iter..adapters..map..Map$LT$I$C$F$G %12 = getelementptr inbounds { ptr, i64 }, ptr %0, i64 %.017.i %13 = getelementptr i8, ptr %12, i64 8 %.val22.i = load i64, ptr %13, align 8, !noundef !9 - %.0.sroa.speculated.i.i.i.i = tail call noundef i64 @llvm.umin.i64(i64 %.018.i, i64 %.val22.i) + %.0.sroa.speculated.i.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %.018.i, i64 %.val22.i) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i = select i1 %switch.i.i.i.i, i64 %.val22.i, i64 %.018.i %14 = add nuw i64 %.017.i, 1 %15 = icmp eq i64 %14, %10 br i1 %15, label %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4fold17h1d7e99d365d8fafeE.llvm.8347807780687254574.exit", label %11 @@ -295,7 +298,10 @@ define hidden noundef i64 @"_ZN102_$LT$core..iter..adapters..map..Map$LT$I$C$F$G %12 = getelementptr inbounds { { { i64, ptr }, i64 }, i8, [7 x i8] }, ptr %0, i64 %.017.i %13 = tail call { ptr, i64 } @"_ZN96_$LT$regex_syntax..hir..literal..Literal$u20$as$u20$core..convert..AsRef$LT$$u5b$u8$u5d$$GT$$GT$6as_ref17he73dc7ad7c96e382E"(ptr noalias noundef nonnull readonly align 8 dereferenceable(32) %12) %14 = extractvalue { ptr, i64 } %13, 1 - %.0.sroa.speculated.i.i.i.i = tail call noundef i64 @llvm.umin.i64(i64 %.018.i, i64 %14) + %.0.sroa.speculated.i.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %.018.i, i64 %14) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i = select i1 %switch.i.i.i.i, i64 %14, i64 %.018.i %15 = add nuw i64 %.017.i, 1 %16 = icmp eq i64 %15, %10 br i1 %16, label %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4fold17h82786164ad7b6426E.llvm.8347807780687254574.exit", label %11 @@ -1639,7 +1645,10 @@ define hidden noundef i64 @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u2 %12 = getelementptr inbounds { ptr, i64 }, ptr %0, i64 %.017 %13 = getelementptr i8, ptr %12, i64 8 %.val22 = load i64, ptr %13, align 8, !noundef !9 - %.0.sroa.speculated.i.i.i = tail call noundef i64 @llvm.umin.i64(i64 %.018, i64 %.val22) + %.0.sroa.speculated.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %.018, i64 %.val22) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %.val22, i64 %.018 %14 = add nuw i64 %.017, 1 %15 = icmp eq i64 %14, %10 br i1 %15, label %.loopexit, label %11 @@ -1817,7 +1826,10 @@ define hidden noundef i64 @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u2 %12 = getelementptr inbounds { { { i64, ptr }, i64 }, i8, [7 x i8] }, ptr %0, i64 %.017 %13 = tail call { ptr, i64 } @"_ZN96_$LT$regex_syntax..hir..literal..Literal$u20$as$u20$core..convert..AsRef$LT$$u5b$u8$u5d$$GT$$GT$6as_ref17he73dc7ad7c96e382E"(ptr noalias noundef nonnull readonly align 8 dereferenceable(32) %12) %14 = extractvalue { ptr, i64 } %13, 1 - %.0.sroa.speculated.i.i.i = tail call noundef i64 @llvm.umin.i64(i64 %.018, i64 %14) + %.0.sroa.speculated.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %.018, i64 %14) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %14, i64 %.018 %15 = add nuw i64 %.017, 1 %16 = icmp eq i64 %15, %10 br i1 %16, label %.loopexit, label %11 @@ -15121,7 +15133,7 @@ declare i32 @llvm.umin.i32(i32, i32) #43 declare void @llvm.experimental.noalias.scope.decl(metadata) #44 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #43 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #43 attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nofree norecurse nosync nounwind nonlazybind memory(argmem: read, inaccessiblemem: write) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/regex-rs/optimized/3ixfkxlmcuecmmus.ll b/bench/regex-rs/optimized/3ixfkxlmcuecmmus.ll index 17d1814b7d2..fd1e79b1af4 100644 --- a/bench/regex-rs/optimized/3ixfkxlmcuecmmus.ll +++ b/bench/regex-rs/optimized/3ixfkxlmcuecmmus.ll @@ -646,7 +646,10 @@ define hidden void @_ZN4core4iter6traits8iterator8Iterator3zip17h3e06c6da5840c6f %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 3 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8, !alias.scope !105 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8, !alias.scope !105 @@ -18012,12 +18015,12 @@ declare void @llvm.lifetime.start.p0(ptr captures(none)) #25 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(ptr captures(none)) #25 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #26 - ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #27 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #27 + attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(read) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } @@ -18044,8 +18047,8 @@ attributes #22 = { cold noreturn nounwind memory(inaccessiblemem: write) } attributes #23 = { cold nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #24 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) } attributes #25 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } -attributes #26 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } -attributes #27 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } +attributes #26 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } +attributes #27 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #28 = { noreturn } attributes #29 = { cold noreturn nounwind } attributes #30 = { cold } diff --git a/bench/regex-rs/optimized/4sqmacerw61c696o.ll b/bench/regex-rs/optimized/4sqmacerw61c696o.ll index 88f7d1f5824..c8070a5d0ff 100644 --- a/bench/regex-rs/optimized/4sqmacerw61c696o.ll +++ b/bench/regex-rs/optimized/4sqmacerw61c696o.ll @@ -8025,7 +8025,10 @@ _ZN14regex_automata4util8captures14GroupInfoInner14small_slot_len17h3561db71db15 48: ; preds = %_ZN14regex_automata4util8captures14GroupInfoInner14small_slot_len17h3561db71db15b5a2E.exit.i %49 = shl nuw i64 %45, 1 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umax.i64(i64 range(i64 0, 4294967296) %.0.i.i.i, i64 %49) + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 range(i64 0, 4294967296) %.0.i.i.i, i64 %49) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %.0.i.i.i, i64 %49 %50 = getelementptr inbounds nuw i8, ptr %0, i64 88 store i64 %.0.sroa.speculated.i.i, ptr %50, align 8, !alias.scope !1594, !noalias !1608 %51 = load i64, ptr %6, align 8, !noalias !1597, !noundef !4 @@ -8116,7 +8119,10 @@ _ZN14regex_automata4util8captures14GroupInfoInner14small_slot_len17h3561db71db15 23: ; preds = %_ZN14regex_automata4util8captures14GroupInfoInner14small_slot_len17h3561db71db15b5a2E.exit %24 = shl nuw i64 %20, 1 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 range(i64 0, 4294967296) %.0.i.i, i64 %24) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 range(i64 0, 4294967296) %.0.i.i, i64 %24) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %.0.i.i, i64 %24 %25 = getelementptr inbounds nuw i8, ptr %0, i64 32 store i64 %.0.sroa.speculated.i, ptr %25, align 8 %26 = getelementptr inbounds nuw i8, ptr %3, i64 32 @@ -16346,12 +16352,12 @@ declare i64 @llvm.umin.i64(i64, i64) #28 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #30 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #28 - ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #31 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #28 + attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint nofree norecurse nosync nounwind nonlazybind memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: write) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/ring-rs/optimized/2ynmf0orlf9ml2dm.ll b/bench/ring-rs/optimized/2ynmf0orlf9ml2dm.ll index dbbe9e30859..7729f69eef5 100644 --- a/bench/ring-rs/optimized/2ynmf0orlf9ml2dm.ll +++ b/bench/ring-rs/optimized/2ynmf0orlf9ml2dm.ll @@ -407,7 +407,10 @@ define hidden void @_ZN4core4iter6traits8iterator8Iterator3zip17h681eb80b63aee58 %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 3 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8, !alias.scope !79 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8, !alias.scope !79 @@ -1329,7 +1332,10 @@ define hidden void @_ZN4ring4limb16limbs_double_mod17h71070c20d182365eE(ptr noal ; Function Attrs: nonlazybind uwtable define hidden void @_ZN4ring4limb18limbs_negative_odd17h086a08829922ff79E(ptr noalias noundef nonnull align 8 captures(none) %0, i64 noundef %1, ptr noalias noundef nonnull readonly align 8 captures(none) %2, i64 noundef %3) unnamed_addr #5 personality ptr @rust_eh_personality { - %.0.sroa.speculated.i.i.i = tail call noundef i64 @llvm.umin.i64(i64 %1, i64 %3) + %.0.sroa.speculated.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %1, i64 %3) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %3, i64 %1 %.not.i.i.i = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not.i.i.i, label %_ZN4core4iter6traits8iterator8Iterator8for_each17hf6709c2431d0ba70E.llvm.9292951165861561203.exit, label %.lr.ph.i.i.i @@ -3422,7 +3428,7 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #21 declare void @llvm.experimental.noalias.scope.decl(metadata) #22 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #23 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #23 attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint nofree norecurse nosync nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/ripgrep-rs/optimized/161nqe0t1jf3za47.ll b/bench/ripgrep-rs/optimized/161nqe0t1jf3za47.ll index 4de4757c51c..e420e5455ef 100644 --- a/bench/ripgrep-rs/optimized/161nqe0t1jf3za47.ll +++ b/bench/ripgrep-rs/optimized/161nqe0t1jf3za47.ll @@ -130,7 +130,7 @@ define hidden noundef zeroext i1 @"_ZN42_$LT$$RF$T$u20$as$u20$core..fmt..Debug$G _ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.thread.i.i: ; preds = %58 %61 = zext nneg i8 %59 to i32 - br label %93 + br label %.thread27.i.i .preheader.i.i.i: ; preds = %58, %_ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i %.025.i.i.i = phi i64 [ %87, %_ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i ], [ 12, %58 ] @@ -190,22 +190,24 @@ _ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i: ; preds = %80 br label %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i .thread27.i.i: ; preds = %_ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i - %.0.sroa.speculated.i.i.i.i = call noundef range(i64 1, -1) i64 @llvm.umax.i64(i64 range(i64 0, -1) %.016.i.i.i, i64 1) - br label %93 - -_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i: ; preds = %.preheader.i.i.i, %89 - %.sroa.6.1.i24.i.i = phi i64 [ %88, %89 ], [ %.sroa.6.0137.i, %.preheader.i.i.i ] - %91 = phi i32 [ %storemerge.i.i.i.i, %89 ], [ 65533, %.preheader.i.i.i ] - %92 = icmp eq i64 %.sroa.6.1.i24.i.i, 0 - br i1 %92, label %._crit_edge.i, label %93 - -93: ; preds = %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i, %.thread27.i.i, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.thread.i.i - %94 = phi i32 [ 65533, %.thread27.i.i ], [ %91, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i ], [ %61, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.thread.i.i ] - %.sroa.6.1.i2429.i.i = phi i64 [ %.0.sroa.speculated.i.i.i.i, %.thread27.i.i ], [ %.sroa.6.1.i24.i.i, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i ], [ 1, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.thread.i.i ] + %.0.sroa.speculated.i.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 1, i64 range(i64 0, -1) %.016.i.i.i) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + br i1 %switch.i.i.i.i, label %.thread27.i.i, label %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i + +_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i: ; preds = %.preheader.i.i.i, %91, %89 + %.sroa.6.1.i24.i.i = phi i64 [ %.016.i.i.i, %91 ], [ %88, %89 ], [ %.sroa.6.0137.i, %.preheader.i.i.i ] + %92 = phi i32 [ 65533, %91 ], [ %storemerge.i.i.i.i, %89 ], [ 65533, %.preheader.i.i.i ] + %93 = icmp eq i64 %.sroa.6.1.i24.i.i, 0 + br i1 %93, label %._crit_edge.i, label %.thread27.i.i + +.thread27.i.i:; preds = %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i, %91, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.thread.i.i + %94 = phi i32 [ %92, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i ], [ 65533, %91 ], [ %61, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.thread.i.i ] + %.sroa.6.1.i2429.i.i = phi i64 [ %.sroa.6.1.i24.i.i, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i ], [ 1, %91 ], [ 1, %_ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.thread.i.i ] %95 = icmp ugt i64 %.sroa.6.1.i2429.i.i, %.sroa.6.0137.i br i1 %95, label %96, label %102 -96: ; preds = %93 +96: ; preds = %.thread27.i.i call void @_ZN4core5slice5index26slice_start_index_len_fail17hdaca407d67a34612E(i64 noundef %.sroa.6.1.i2429.i.i, i64 noundef %.sroa.6.0137.i, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.d6d12b08d7e2b70a53c87c5ea5e84c79.36) #13, !noalias !26 unreachable @@ -224,7 +226,7 @@ _ZN4bstr4utf86decode17h1d567e645048e1f2E.exit.i.i: ; preds = %.preheader.i.i.i, call void @llvm.lifetime.end.p0(ptr nonnull %7), !noalias !10 br label %"_ZN4bstr5impls4bstr63_$LT$impl$u20$core..fmt..Debug$u20$for$u20$bstr..bstr..BStr$GT$3fmt17hb1bfcfa6678dd513E.exit" -102: ; preds = %93 +102: ; preds = %.thread27.i.i %103 = sub nuw i64 %.sroa.6.0137.i, %.sroa.6.1.i2429.i.i %104 = getelementptr inbounds i8, ptr %.sroa.0.0138.i, i64 %.sroa.6.1.i2429.i.i %105 = add i64 %.sroa.6.1.i2429.i.i, %.sroa.9.0136.i @@ -813,9 +815,6 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #11 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #12 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #12 - attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: read) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: read, inaccessiblemem: read) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/ripgrep-rs/optimized/27iy5ui86mv5cpfs.ll b/bench/ripgrep-rs/optimized/27iy5ui86mv5cpfs.ll index e1d72e4d7c3..38680ad1b00 100644 --- a/bench/ripgrep-rs/optimized/27iy5ui86mv5cpfs.ll +++ b/bench/ripgrep-rs/optimized/27iy5ui86mv5cpfs.ll @@ -426,7 +426,7 @@ define hidden noundef zeroext i1 @"_ZN42_$LT$$RF$T$u20$as$u20$core..fmt..Debug$G _ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.thread.i.i: ; preds = %58 %61 = zext nneg i8 %59 to i32 - br label %93 + br label %.thread27.i.i .preheader.i.i.i: ; preds = %58, %_ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i %.025.i.i.i = phi i64 [ %87, %_ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i ], [ 12, %58 ] @@ -486,22 +486,24 @@ _ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i: ; preds = %80 br label %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i .thread27.i.i: ; preds = %_ZN4bstr4utf811decode_step17hd73b69ac4a47e274E.exit.i.i.i - %.0.sroa.speculated.i.i.i.i = call noundef range(i64 1, -1) i64 @llvm.umax.i64(i64 range(i64 0, -1) %.016.i.i.i, i64 1) - br label %93 - -_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i: ; preds = %.preheader.i.i.i, %89 - %.sroa.6.1.i24.i.i = phi i64 [ %88, %89 ], [ %.sroa.6.0137.i, %.preheader.i.i.i ] - %91 = phi i32 [ %storemerge.i.i.i.i, %89 ], [ 65533, %.preheader.i.i.i ] - %92 = icmp eq i64 %.sroa.6.1.i24.i.i, 0 - br i1 %92, label %._crit_edge.i, label %93 - -93: ; preds = %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i, %.thread27.i.i, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.thread.i.i - %94 = phi i32 [ 65533, %.thread27.i.i ], [ %91, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i ], [ %61, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.thread.i.i ] - %.sroa.6.1.i2429.i.i = phi i64 [ %.0.sroa.speculated.i.i.i.i, %.thread27.i.i ], [ %.sroa.6.1.i24.i.i, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i ], [ 1, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.thread.i.i ] + %.0.sroa.speculated.i.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 1, i64 range(i64 0, -1) %.016.i.i.i) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + br i1 %switch.i.i.i.i, label %.thread27.i.i, label %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i + +_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i: ; preds = %.preheader.i.i.i, %91, %89 + %.sroa.6.1.i24.i.i = phi i64 [ %.016.i.i.i, %91 ], [ %88, %89 ], [ %.sroa.6.0137.i, %.preheader.i.i.i ] + %92 = phi i32 [ 65533, %91 ], [ %storemerge.i.i.i.i, %89 ], [ 65533, %.preheader.i.i.i ] + %93 = icmp eq i64 %.sroa.6.1.i24.i.i, 0 + br i1 %93, label %._crit_edge.i, label %.thread27.i.i + +.thread27.i.i:; preds = %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i, %91, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.thread.i.i + %94 = phi i32 [ %92, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i ], [ 65533, %91 ], [ %61, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.thread.i.i ] + %.sroa.6.1.i2429.i.i = phi i64 [ %.sroa.6.1.i24.i.i, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i ], [ 1, %91 ], [ 1, %_ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.thread.i.i ] %95 = icmp ugt i64 %.sroa.6.1.i2429.i.i, %.sroa.6.0137.i br i1 %95, label %96, label %102 -96: ; preds = %93 +96: ; preds = %.thread27.i.i call void @_ZN4core5slice5index26slice_start_index_len_fail17hdaca407d67a34612E(i64 noundef %.sroa.6.1.i2429.i.i, i64 noundef %.sroa.6.0137.i, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.0fab81ae22ac082524f9381e39901915.49) #16, !noalias !59 unreachable @@ -520,7 +522,7 @@ _ZN4bstr4utf86decode17hfa8384f4885bb9c8E.exit.i.i: ; preds = %.preheader.i.i.i, call void @llvm.lifetime.end.p0(ptr nonnull %7), !noalias !43 br label %"_ZN4bstr5impls4bstr63_$LT$impl$u20$core..fmt..Debug$u20$for$u20$bstr..bstr..BStr$GT$3fmt17hb1bfcfa6678dd513E.exit" -102: ; preds = %93 +102: ; preds = %.thread27.i.i %103 = sub nuw i64 %.sroa.6.0137.i, %.sroa.6.1.i2429.i.i %104 = getelementptr inbounds i8, ptr %.sroa.0.0138.i, i64 %.sroa.6.1.i2429.i.i %105 = add i64 %.sroa.6.1.i2429.i.i, %.sroa.9.0136.i @@ -1160,7 +1162,7 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #13 declare void @llvm.experimental.noalias.scope.decl(metadata) #14 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #15 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #15 attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/ripgrep-rs/optimized/550obkm57k6tj1vm.ll b/bench/ripgrep-rs/optimized/550obkm57k6tj1vm.ll index bbd6f522a0a..9c4440bf49f 100644 --- a/bench/ripgrep-rs/optimized/550obkm57k6tj1vm.ll +++ b/bench/ripgrep-rs/optimized/550obkm57k6tj1vm.ll @@ -584,11 +584,17 @@ define internal fastcc void @_ZN12aho_corasick3nfa13noncontiguous8Compiler10buil 38: ; preds = %30 %39 = trunc nuw nsw i64 %.val1.i to i32 %40 = load i64, ptr %14, align 16, !noundef !5 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %40, i64 %.val1.i) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %40, i64 %.val1.i) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i133 = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i133, i64 %.val1.i, i64 %40 store i64 %.0.sroa.speculated.i, ptr %14, align 16 %41 = load i64, ptr %15, align 8, !noundef !5 - %.0.sroa.speculated.i133 = tail call noundef i64 @llvm.umax.i64(i64 %41, i64 %.val1.i) - store i64 %.0.sroa.speculated.i133, ptr %15, align 8 + %.0.sroa.speculated.i133 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %41, i64 %.val1.i) + %.off.i135 = add nsw i8 %.0.sroa.speculated.i133, -1 + %switch.i136 = icmp ult i8 %.off.i135, -2 + %.0.sroa.speculated.i137 = select i1 %switch.i136, i64 %41, i64 %.val1.i + store i64 %.0.sroa.speculated.i137, ptr %15, align 8 call void @llvm.lifetime.start.p0(ptr nonnull %8) %42 = load i64, ptr %16, align 16, !noundef !5 store i64 %42, ptr %8, align 8 @@ -1300,10 +1306,7 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #11 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #12 - -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #12 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #12 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #13 diff --git a/bench/ropey-rs/optimized/2p9nf7n6i9ycxebu.ll b/bench/ropey-rs/optimized/2p9nf7n6i9ycxebu.ll index 2358854de9a..57c19634c65 100644 --- a/bench/ropey-rs/optimized/2p9nf7n6i9ycxebu.ll +++ b/bench/ropey-rs/optimized/2p9nf7n6i9ycxebu.ll @@ -320,7 +320,10 @@ define hidden void @_ZN4core4iter6traits8iterator8Iterator3zip17h5e8264817a2f3af %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 3 - %.sroa.0.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.sroa.0.0.sroa.speculated.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i.i = add nsw i8 %16, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.sroa.0.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8, !alias.scope !15 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8, !alias.scope !15 @@ -3719,11 +3722,11 @@ declare void @llvm.lifetime.start.p0(ptr captures(none)) #14 ; Function Attrs: mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) declare void @llvm.lifetime.end.p0(ptr captures(none)) #14 -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) -declare void @llvm.experimental.noalias.scope.decl(metadata) #15 - ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #16 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #16 + +; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) +declare void @llvm.experimental.noalias.scope.decl(metadata) #16 attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { alwaysinline nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } @@ -3740,8 +3743,8 @@ attributes #11 = { cold noreturn nounwind nonlazybind uwtable "probe-stack"="inl attributes #12 = { mustprogress nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) } attributes #13 = { nounwind nonlazybind allockind("free") uwtable "alloc-family"="__rust_alloc" "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #14 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } -attributes #15 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } -attributes #16 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } +attributes #15 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) } +attributes #16 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) } attributes #17 = { noreturn } attributes #18 = { cold } attributes #19 = { cold noreturn nounwind } diff --git a/bench/ropey-rs/optimized/m1t64q7tygzmil6.ll b/bench/ropey-rs/optimized/m1t64q7tygzmil6.ll index 1eea6cc65b3..d314d43c7cf 100644 --- a/bench/ropey-rs/optimized/m1t64q7tygzmil6.ll +++ b/bench/ropey-rs/optimized/m1t64q7tygzmil6.ll @@ -50,7 +50,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 5 - %.sroa.0.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.sroa.0.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i = add nsw i8 %16, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.sroa.0.0.sroa.speculated.i = select i1 %switch.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8 @@ -81,7 +84,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 3 - %.sroa.0.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.sroa.0.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i = add nsw i8 %16, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.sroa.0.0.sroa.speculated.i = select i1 %switch.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8 @@ -112,7 +118,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 3 - %.sroa.0.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.sroa.0.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i = add nsw i8 %16, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.sroa.0.0.sroa.speculated.i = select i1 %switch.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8 @@ -151,7 +160,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6min_by17h6ead4a51dc8dd204E.llvm.3055797631587932725(i64 noundef %0, i64 noundef %1) unnamed_addr #3 personality ptr @rust_eh_personality { - %.sroa.0.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.sroa.0.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %3, -1 + %switch = icmp ult i8 %.off, -2 + %.sroa.0.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.sroa.0.0.sroa.speculated } @@ -854,9 +866,6 @@ declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #10 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #11 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #10 - attributes #0 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: write, inaccessiblemem: write) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: read) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/ruff-rs/optimized/eutw83t5mls0gkbq7io4ak5nv.ll b/bench/ruff-rs/optimized/eutw83t5mls0gkbq7io4ak5nv.ll index ea1398b127a..b5175b9a3e4 100644 --- a/bench/ruff-rs/optimized/eutw83t5mls0gkbq7io4ak5nv.ll +++ b/bench/ruff-rs/optimized/eutw83t5mls0gkbq7io4ak5nv.ll @@ -9252,15 +9252,13 @@ _ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parent %30 = extractvalue { ptr, i64 } %29, 0 %31 = extractvalue { ptr, i64 } %29, 1 %32 = call noundef zeroext i1 @_ZN21ruff_python_formatter10expression11parentheses27is_expression_parenthesized17h1473e2ab1b593624E(i64 noundef %25, ptr noundef %26, ptr noalias noundef nonnull readonly align 8 dereferenceable(24) %28, ptr noalias noundef nonnull readonly align 1 %30, i64 noundef %31) - br i1 %32, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit14, label %_ZN21ruff_python_formatter10expression15has_parentheses17hd09b5be20ff6475aE.exit.i + br i1 %32, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit14, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit.thread -_ZN21ruff_python_formatter10expression15has_parentheses17hd09b5be20ff6475aE.exit.i: ; preds = %23, %20 - switch i8 %21, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit14 [ - i8 2, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit.thread - i8 0, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit.thread - ] +_ZN21ruff_python_formatter10expression15has_parentheses17hd09b5be20ff6475aE.exit.i: ; preds = %20 + %switch18.old = icmp eq i8 %21, 1 + br i1 %switch18.old, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit14, label %_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit.thread -_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit.thread: ; preds = %_ZN21ruff_python_formatter10expression15has_parentheses17hd09b5be20ff6475aE.exit.i, %_ZN21ruff_python_formatter10expression15has_parentheses17hd09b5be20ff6475aE.exit.i, %17, %15 +_ZN21ruff_python_formatter10expression29can_omit_optional_parentheses16is_parenthesized17h4c28e89a6e8f08d0E.exit.thread: ; preds = %23, %_ZN21ruff_python_formatter10expression15has_parentheses17hd09b5be20ff6475aE.exit.i, %17, %15 %33 = load i64, ptr %3, align 8, !range !6, !noundef !3 %34 = getelementptr inbounds nuw i8, ptr %3, i64 8 %35 = load ptr, ptr %34, align 8 diff --git a/bench/rustfmt-rs/optimized/llbxf4pclolbp5s.ll b/bench/rustfmt-rs/optimized/llbxf4pclolbp5s.ll index 30fc916a6f1..a67aa77a5a4 100644 --- a/bench/rustfmt-rs/optimized/llbxf4pclolbp5s.ll +++ b/bench/rustfmt-rs/optimized/llbxf4pclolbp5s.ll @@ -7930,7 +7930,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6max_by17hfb4e1f5faba94159E.llvm.13158159170862922693(i64 noundef %0, i64 noundef %1) unnamed_addr #5 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umax.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %0, i64 %1 ret i64 %.0.sroa.speculated } @@ -25401,7 +25404,10 @@ define hidden void @"_ZN8thin_vec16ThinVec$LT$T$GT$4push17h307c4db441c9ecfeE"(pt %.inv.i = icmp sgt i64 %4, -1 %spec.select.i.i = select i1 %.inv.i, i64 %16, i64 -1 %.0.i = select i1 %15, i64 4, i64 %spec.select.i.i - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umax.i64(i64 %10, i64 %.0.i) + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %.0.i) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %10, i64 %.0.i invoke void @"_ZN8thin_vec16ThinVec$LT$T$GT$10reallocate17hbfd2e814921e7850E.llvm.13158159170862922693"(ptr noalias noundef nonnull align 8 dereferenceable(8) %0, i64 noundef %.0.sroa.speculated.i.i) to label %._crit_edge unwind label %17 @@ -25470,7 +25476,10 @@ define hidden void @"_ZN8thin_vec16ThinVec$LT$T$GT$4push17h91daced1f5635e1dE"(pt %.inv.i = icmp sgt i64 %4, -1 %spec.select.i.i = select i1 %.inv.i, i64 %16, i64 -1 %.0.i = select i1 %15, i64 4, i64 %spec.select.i.i - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umax.i64(i64 %10, i64 %.0.i) + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %.0.i) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %10, i64 %.0.i invoke void @"_ZN8thin_vec16ThinVec$LT$T$GT$10reallocate17h4040454c069713daE.llvm.13158159170862922693"(ptr noalias noundef nonnull align 8 dereferenceable(8) %0, i64 noundef %.0.sroa.speculated.i.i) to label %._crit_edge unwind label %17 @@ -25534,7 +25543,10 @@ define hidden void @"_ZN8thin_vec16ThinVec$LT$T$GT$7reserve17h56aebba7294e0346E" %.inv = icmp sgt i64 %6, -1 %spec.select.i = select i1 %.inv, i64 %14, i64 -1 %.0 = select i1 %13, i64 4, i64 %spec.select.i - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %8, i64 %.0) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %8, i64 %.0) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %8, i64 %.0 tail call void @"_ZN8thin_vec16ThinVec$LT$T$GT$10reallocate17hbfd2e814921e7850E.llvm.13158159170862922693"(ptr noalias noundef nonnull align 8 dereferenceable(8) %0, i64 noundef %.0.sroa.speculated.i) br label %15 @@ -25567,7 +25579,10 @@ define hidden void @"_ZN8thin_vec16ThinVec$LT$T$GT$7reserve17hd1a85d3794565b73E" %.inv = icmp sgt i64 %6, -1 %spec.select.i = select i1 %.inv, i64 %14, i64 -1 %.0 = select i1 %13, i64 4, i64 %spec.select.i - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %8, i64 %.0) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %8, i64 %.0) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %8, i64 %.0 tail call void @"_ZN8thin_vec16ThinVec$LT$T$GT$10reallocate17h4040454c069713daE.llvm.13158159170862922693"(ptr noalias noundef nonnull align 8 dereferenceable(8) %0, i64 noundef %.0.sroa.speculated.i) br label %15 @@ -38483,9 +38498,6 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #31 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #29 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #29 - ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i32 @llvm.abs.i32(i32, i1 immarg) #29 diff --git a/bench/rustfmt-rs/optimized/s8gyre8ye3tvwam.ll b/bench/rustfmt-rs/optimized/s8gyre8ye3tvwam.ll index 517097ffb4d..cc5fc72360b 100644 --- a/bench/rustfmt-rs/optimized/s8gyre8ye3tvwam.ll +++ b/bench/rustfmt-rs/optimized/s8gyre8ye3tvwam.ll @@ -12978,7 +12978,10 @@ define hidden { i64, i64 } @_ZN15rustfmt_nightly5lists17definitive_tactic17h55ee unreachable 15: ; preds = %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$3any17h4e985b7ae78614beE.exit" - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %4, i64 %2) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %4, i64 %2) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %2, i64 %4 br label %16 16: ; preds = %15, %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$3any17h4e985b7ae78614beE.exit", %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$3any17h4e985b7ae78614beE.exit" @@ -13043,7 +13046,10 @@ define hidden { i64, i64 } @_ZN15rustfmt_nightly5lists17definitive_tactic17hc5da unreachable 14: ; preds = %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$3any17hd601c826a6fb69ceE.exit" - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %5, i64 %3) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %5, i64 %3) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %3, i64 %5 br label %15 15: ; preds = %14, %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$3any17hd601c826a6fb69ceE.exit", %"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$3any17hd601c826a6fb69ceE.exit" @@ -28298,8 +28304,11 @@ define hidden void @_ZN15rustfmt_nightly5pairs22rewrite_pairs_one_line17h6bc4a36 %36 = load ptr, ptr %35, align 8, !nonnull !9, !noundef !9 %37 = getelementptr inbounds nuw i8, ptr %1, i64 40 %38 = load i64, ptr %37, align 8, !noundef !9 - %.0.sroa.speculated.i.i.i = tail call noundef i64 @llvm.umin.i64(i64 %18, i64 %38) - %.not185 = icmp eq i64 %38, 0 + %.0.sroa.speculated.i.i.i = tail call noundef i8 @llvm.ucmp.i8.i64(i64 %18, i64 %38) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %38, i64 %18 + %.not185 = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not185, label %._crit_edge, label %.lr.ph ._crit_edge: ; preds = %_ZN5alloc6string6String4push17hf2ea2cbd99291858E.exit125, %26 @@ -29030,7 +29039,10 @@ define hidden void @_ZN15rustfmt_nightly5pairs23rewrite_pairs_multiline17habef6e %79 = load i64, ptr %78, align 8, !noundef !9 %80 = add i64 %.val67, 576460752303423487 %81 = and i64 %80, 576460752303423487 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %81, i64 %79) + %.0.sroa.speculated.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %81, i64 %79) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %79, i64 %81 %.not198 = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not198, label %._crit_edge, label %.lr.ph @@ -29100,9 +29112,9 @@ define hidden void @_ZN15rustfmt_nightly5pairs23rewrite_pairs_multiline17habef6e 105: ; preds = %.lr.ph, %.backedge %.sroa.9152.0197 = phi i64 [ 0, %.lr.ph ], [ %106, %.backedge ] - %106 = add nuw nsw i64 %.sroa.9152.0197, 1 - %107 = getelementptr inbounds nuw { ptr, { i64, [2 x i64] } }, ptr %75, i64 %.sroa.9152.0197 - %108 = getelementptr inbounds nuw { ptr, i64 }, ptr %77, i64 %.sroa.9152.0197 + %106 = add nuw i64 %.sroa.9152.0197, 1 + %107 = getelementptr inbounds { ptr, { i64, [2 x i64] } }, ptr %75, i64 %.sroa.9152.0197 + %108 = getelementptr inbounds { ptr, i64 }, ptr %77, i64 %.sroa.9152.0197 %109 = load ptr, ptr %.sroa.418.0..sroa_idx, align 8, !nonnull !9, !noundef !9 %110 = load i64, ptr %.sroa.5.0..sroa_idx, align 8, !noundef !9 %111 = icmp ult i64 %110, 16 @@ -37441,7 +37453,7 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #39 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #37 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #37 attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/sdl/optimized/SDL_hidapihaptic_lg4ff.ll b/bench/sdl/optimized/SDL_hidapihaptic_lg4ff.ll index 24f5bfd8fb7..11e0425fee0 100644 --- a/bench/sdl/optimized/SDL_hidapihaptic_lg4ff.ll +++ b/bench/sdl/optimized/SDL_hidapihaptic_lg4ff.ll @@ -983,10 +983,9 @@ define internal noundef i32 @SDL_HIDAPI_HapticDriverLg4ff_ThreadFunction(ptr nou %.0.in.i.i = getelementptr inbounds nuw i8, ptr %48, i64 20 %.0.i.i = load i32, ptr %.0.in.i.i, align 4 %.0.fr.i.i = freeze i32 %.0.i.i - switch i32 %.0.fr.i.i, label %57 [ - i32 -1, label %get_effect_replay_length.exit.thread.i - i32 0, label %get_effect_replay_length.exit.thread.i - ] + %.0.fr.i.off.i = add i32 %.0.fr.i.i, -1 + %switch.i = icmp ult i32 %.0.fr.i.off.i, -2 + br i1 %switch.i, label %57, label %get_effect_replay_length.exit.thread.i 57: ; preds = %56 %58 = getelementptr inbounds nuw i8, ptr %48, i64 88 @@ -1015,8 +1014,8 @@ define internal noundef i32 @SDL_HIDAPI_HapticDriverLg4ff_ThreadFunction(ptr nou store i64 %59, ptr %68, align 8 br label %get_effect_replay_length.exit.thread.i -get_effect_replay_length.exit.thread.i: ; preds = %67, %57, %56, %56, %55, %52 - %69 = phi i32 [ %50, %55 ], [ %50, %56 ], [ %50, %56 ], [ %50, %52 ], [ 1, %67 ], [ %50, %57 ] +get_effect_replay_length.exit.thread.i: ; preds = %67, %57, %56, %55, %52 + %69 = phi i32 [ %50, %55 ], [ %50, %56 ], [ %50, %52 ], [ 1, %67 ], [ %50, %57 ] switch i16 %.val.i.i.pr.pre.i, label %get_effect_direction.exit.i.i [ i16 2, label %70 i16 8, label %70 @@ -1395,10 +1394,9 @@ effect_is_periodic.exit.i.i: ; preds = %252, %252, %252, %2 %.0.in.i.i.i = getelementptr inbounds nuw i8, ptr %48, i64 20 %.0.i86.i.i = load i32, ptr %.0.in.i.i.i, align 4 %.0.fr.i.i.i = freeze i32 %.0.i86.i.i - switch i32 %.0.fr.i.i.i, label %266 [ - i32 -1, label %get_effect_replay_length.exit.thread.i.i - i32 0, label %get_effect_replay_length.exit.thread.i.i - ] + %.0.fr.i.off.i.i = add i32 %.0.fr.i.i.i, -1 + %switch.i.i = icmp ult i32 %.0.fr.i.off.i.i, -2 + br i1 %switch.i.i, label %266, label %get_effect_replay_length.exit.thread.i.i 266: ; preds = %265 %267 = load i64, ptr %248, align 8 @@ -1426,8 +1424,8 @@ get_effect_replay_length.exit92.i.i: ; preds = %268, %266 store i64 %271, ptr %272, align 8 br label %get_effect_replay_length.exit.thread.i.i -get_effect_replay_length.exit.thread.i.i: ; preds = %get_effect_replay_length.exit92.i.i, %265, %265, %effect_is_periodic.exit.i.i, %252, %get_effect_direction.exit.i.i - %.val142.i = phi i16 [ %.val.i76.i, %265 ], [ %.val.i76.i, %265 ], [ %.val.i76.i, %252 ], [ %.val.i76.i, %effect_is_periodic.exit.i.i ], [ %.val.i76.i, %get_effect_replay_length.exit92.i.i ], [ %.val143.i, %get_effect_direction.exit.i.i ] +get_effect_replay_length.exit.thread.i.i: ; preds = %get_effect_replay_length.exit92.i.i, %265, %effect_is_periodic.exit.i.i, %252, %get_effect_direction.exit.i.i + %.val142.i = phi i16 [ %.val.i76.i, %265 ], [ %.val.i76.i, %252 ], [ %.val.i76.i, %effect_is_periodic.exit.i.i ], [ %.val.i76.i, %get_effect_replay_length.exit92.i.i ], [ %.val143.i, %get_effect_direction.exit.i.i ] %273 = load i32, ptr %49, align 8 %274 = or i32 %273, 2 %275 = and i32 %273, 8 @@ -1485,10 +1483,9 @@ get_effect_replay_delay.exit96.i.i: ; preds = %.sink.split.i94.i.i %.0.in.i98.i.i = getelementptr inbounds nuw i8, ptr %48, i64 20 %.0.i99.i.i = load i32, ptr %.0.in.i98.i.i, align 4 %.0.fr.i100.i.i = freeze i32 %.0.i99.i.i - switch i32 %.0.fr.i100.i.i, label %289 [ - i32 -1, label %get_effect_replay_length.exit102.thread.i.i - i32 0, label %get_effect_replay_length.exit102.thread.i.i - ] + %.0.fr.i100.off.i.i = add i32 %.0.fr.i100.i.i, -1 + %switch121.i.i = icmp ult i32 %.0.fr.i100.off.i.i, -2 + br i1 %switch121.i.i, label %289, label %get_effect_replay_length.exit102.thread.i.i 289: ; preds = %288 %290 = load i64, ptr %278, align 8 @@ -1516,7 +1513,7 @@ get_effect_replay_length.exit108.i.i: ; preds = %291, %289 store i64 %294, ptr %295, align 8 br label %get_effect_replay_length.exit102.thread.i.i -get_effect_replay_length.exit102.thread.i.i: ; preds = %get_effect_replay_length.exit108.i.i, %288, %288 +get_effect_replay_length.exit102.thread.i.i: ; preds = %get_effect_replay_length.exit108.i.i, %288 switch i16 %.val.i97.i.i, label %get_effect_replay_length.exit102.thread.i.effect_is_periodic.exit109.i_crit_edge.i [ i16 2, label %296 i16 8, label %296 @@ -1618,10 +1615,9 @@ effect_is_periodic.exit109.i.i: ; preds = %get_effect_replay_l %.0.in.i111.i.i = getelementptr inbounds nuw i8, ptr %48, i64 20 %.0.i112.i.i = load i32, ptr %.0.in.i111.i.i, align 4 %.0.fr.i113.i.i = freeze i32 %.0.i112.i.i - switch i32 %.0.fr.i113.i.i, label %339 [ - i32 -1, label %get_effect_replay_length.exit115.thread.i.i - i32 0, label %get_effect_replay_length.exit115.thread.i.i - ] + %.0.fr.i113.off.i.i = add i32 %.0.fr.i113.i.i, -1 + %switch122.i.i = icmp ult i32 %.0.fr.i113.off.i.i, -2 + br i1 %switch122.i.i, label %339, label %get_effect_replay_length.exit115.thread.i.i 339: ; preds = %338 %340 = getelementptr inbounds nuw i8, ptr %48, i64 88 @@ -1629,7 +1625,7 @@ effect_is_periodic.exit109.i.i: ; preds = %get_effect_replay_l %342 = icmp ult i64 %30, %341 br i1 %342, label %get_effect_replay_length.exit115.thread.i.i, label %344 -get_effect_replay_length.exit115.thread.i.i: ; preds = %339, %338, %338, %337 +get_effect_replay_length.exit115.thread.i.i: ; preds = %339, %338, %337 %343 = or disjoint i32 %331, 4 store i32 %343, ptr %49, align 8 br label %344 diff --git a/bench/sdl/optimized/SDL_render_vulkan.ll b/bench/sdl/optimized/SDL_render_vulkan.ll index 59bb5c608e1..6d36eb32052 100644 --- a/bench/sdl/optimized/SDL_render_vulkan.ll +++ b/bench/sdl/optimized/SDL_render_vulkan.ll @@ -4228,17 +4228,15 @@ define internal void @VULKAN_DestroyRenderer(ptr noundef readonly captures(addre define internal zeroext i1 @VULKAN_SetVSync(ptr noundef readonly captures(none) %0, i32 noundef %1) #0 { %3 = getelementptr inbounds nuw i8, ptr %0, i64 696 %4 = load ptr, ptr %3, align 8 - switch i32 %1, label %5 [ - i32 -1, label %7 - i32 0, label %7 - i32 1, label %7 - ] + %.off = add i32 %1, -2 + %switch = icmp ult i32 %.off, -3 + br i1 %switch, label %5, label %7 5: ; preds = %2 %6 = tail call zeroext i1 (ptr, ...) @SDL_SetError_REAL(ptr noundef nonnull @.str.46) #7 br label %12 -7: ; preds = %2, %2, %2 +7: ; preds = %2 %8 = getelementptr inbounds nuw i8, ptr %4, i64 1772 %9 = load i32, ptr %8, align 4 %.not = icmp eq i32 %1, %9 diff --git a/bench/serde-rs-json/optimized/z04ynry3c9ovbu1.ll b/bench/serde-rs-json/optimized/z04ynry3c9ovbu1.ll index 9d7153d3241..b4484aabb93 100644 --- a/bench/serde-rs-json/optimized/z04ynry3c9ovbu1.ll +++ b/bench/serde-rs-json/optimized/z04ynry3c9ovbu1.ll @@ -891,11 +891,14 @@ define internal fastcc void @"_ZN5alloc3str21_$LT$impl$u20$str$GT$7replace17h6b2 br i1 %28, label %58, label %29 29: ; preds = %.lr.ph.i30.us - %.0.sroa.speculated.i.i32.us = call i64 @llvm.umax.i64(i64 %.sroa.03.sroa.4.0.copyload, i64 %19) + %.0.sroa.speculated.i.i32.us = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %.sroa.03.sroa.4.0.copyload, i64 %19) + %.off.i.i.us = add nsw i8 %.0.i.i.i.i.us, -1 + %switch.i.i.us = icmp ult i8 %.off.i.i.us, -2 + %.0.sroa.speculated.i.i.us = select i1 %switch.i.i.us, i64 %.sroa.03.sroa.4.0.copyload, i64 %19 br label %30 30: ; preds = %49, %29 - %.sroa.04.0.i33.us = phi i64 [ %.0.sroa.speculated.i.i32.us, %29 ], [ %50, %49 ] + %.sroa.04.0.i33.us = phi i64 [ %.0.sroa.speculated.i.i.us, %29 ], [ %50, %49 ] %31 = icmp ult i64 %.sroa.04.0.i33.us, %.sroa.03.sroa.15.0.copyload br i1 %31, label %46, label %.preheader101.us @@ -980,7 +983,7 @@ define internal fastcc void @"_ZN5alloc3str21_$LT$impl$u20$str$GT$7replace17h6b2 br i1 %71, label %107, label %.preheader.us .preheader.us: ; preds = %.preheader100.us, %77 - %.sroa.5.0.i.us = phi i64 [ %73, %77 ], [ %.sroa.03.sroa.4.0.copyload, %.preheader100.us ] + %.sroa.5.0.i.us = phi i64 [ %73, %77 ], [ %.sroa.03.sroa.4.0.copyload, %.preheader99.us ] %.not99.us = icmp eq i64 %.sroa.5.0.i.us, 0 br i1 %.not99.us, label %.loopexit286, label %72 @@ -1006,8 +1009,8 @@ define internal fastcc void @"_ZN5alloc3str21_$LT$impl$u20$str$GT$7replace17h6b2 br label %.backedge.i.us .loopexit286: ; preds = %.preheader101.us, %.preheader.us - %.sroa.3251.1.us = phi i64 [ -1, %.preheader.us ], [ 0, %.preheader101.us ] - %.sroa.6.2.us = phi i64 [ %63, %.preheader.us ], [ %21, %.preheader101.us ] + %.sroa.3251.1.us = phi i64 [ -1, %.preheader.us ], [ 0, %.preheader100.us ] + %.sroa.6.2.us = phi i64 [ %63, %.preheader.us ], [ %21, %.preheader100.us ] %.sroa.20.1.us = add i64 %.sroa.6.2.us, %.sroa.03.sroa.15.0.copyload %84 = getelementptr inbounds i8, ptr %1, i64 %.0.us %85 = sub i64 %.sroa.6.2.us, %.0.us @@ -1026,7 +1029,7 @@ define internal fastcc void @"_ZN5alloc3str21_$LT$impl$u20$str$GT$7replace17h6b2 br label %91 91: ; preds = %.noexc18.us, %.loopexit286 - %92 = phi i64 [ %86, %.loopexit286 ], [ %.pre.i.i17.us, %.noexc18.us ] + %92 = phi i64 [ %86, %.loopexit285 ], [ %.pre.i.i17.us, %.noexc18.us ] %93 = load ptr, ptr %.sroa.4.0..sroa_idx, align 8, !alias.scope !167, !noalias !165, !nonnull !4, !noundef !4 %94 = getelementptr inbounds i8, ptr %93, i64 %92 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 1 %94, ptr nonnull readonly align 1 %84, i64 %85, i1 false) @@ -1223,16 +1226,16 @@ _ZN4core3str11validations15next_code_point17h4bec607ff0ad6e55E.exit.thread.i.i.i br label %125 .split178.us: ; preds = %46 - %183 = add i64 %21, %.0.sroa.speculated.i.i32.us + %183 = add i64 %.0.sroa.speculated.i.i.us, %21 %umax.i39 = call i64 @llvm.umax.i64(i64 %.sroa.03.sroa.13.0.copyload, i64 %183) br label %.split183.us.invoke .split183.us.invoke: ; preds = %36, %33, %74, %72, %.split178.us, %.split190.us - %184 = phi i64 [ %umax.i, %.split190.us ], [ %umax.i39, %.split178.us ], [ %73, %72 ], [ %75, %74 ], [ %34, %33 ], [ %37, %36 ] - %185 = phi i64 [ %.sroa.03.sroa.13.0.copyload, %.split190.us ], [ %.sroa.03.sroa.13.0.copyload, %.split178.us ], [ %.sroa.03.sroa.15.0.copyload, %72 ], [ %.sroa.03.sroa.13.0.copyload, %74 ], [ %.sroa.03.sroa.15.0.copyload, %33 ], [ %.sroa.03.sroa.13.0.copyload, %36 ] - %186 = phi ptr [ @anon.c250a97a4833f9e511090bd0bcefef13.4, %.split190.us ], [ @anon.c250a97a4833f9e511090bd0bcefef13.4, %.split178.us ], [ @anon.c250a97a4833f9e511090bd0bcefef13.1, %72 ], [ @anon.c250a97a4833f9e511090bd0bcefef13.2, %74 ], [ @anon.c250a97a4833f9e511090bd0bcefef13.1, %33 ], [ @anon.c250a97a4833f9e511090bd0bcefef13.2, %36 ] + %184 = phi i64 [ %umax.i, %.split189.us ], [ %umax.i39, %.split177.us ], [ %73, %72 ], [ %75, %74 ], [ %34, %33 ], [ %37, %36 ] + %185 = phi i64 [ %.sroa.03.sroa.13.0.copyload, %.split189.us ], [ %.sroa.03.sroa.13.0.copyload, %.split177.us ], [ %.sroa.03.sroa.15.0.copyload, %72 ], [ %.sroa.03.sroa.13.0.copyload, %74 ], [ %.sroa.03.sroa.15.0.copyload, %33 ], [ %.sroa.03.sroa.13.0.copyload, %36 ] + %186 = phi ptr [ @anon.c250a97a4833f9e511090bd0bcefef13.4, %.split189.us ], [ @anon.c250a97a4833f9e511090bd0bcefef13.4, %.split177.us ], [ @anon.c250a97a4833f9e511090bd0bcefef13.1, %72 ], [ @anon.c250a97a4833f9e511090bd0bcefef13.2, %74 ], [ @anon.c250a97a4833f9e511090bd0bcefef13.1, %33 ], [ @anon.c250a97a4833f9e511090bd0bcefef13.2, %36 ] invoke void @_ZN4core9panicking18panic_bounds_check17h8331054858f0bf20E(i64 noundef %184, i64 noundef %185, ptr noalias noundef readonly align 8 dereferenceable(24) %186) #14 - to label %.split183.us.cont unwind label %.loopexit.split-lp + to label %.split182.us.cont unwind label %.loopexit.split-lp .split183.us.cont: ; preds = %.split183.us.invoke unreachable @@ -1471,6 +1474,9 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #12 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #13 + ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.umax.i64(i64, i64) #13 diff --git a/bench/slurm/optimized/job_mgr.ll b/bench/slurm/optimized/job_mgr.ll index da490b3dcba..5fe6a716bf4 100644 --- a/bench/slurm/optimized/job_mgr.ll +++ b/bench/slurm/optimized/job_mgr.ll @@ -22719,10 +22719,9 @@ _find_node_config.exit: ; preds = %.loopexit.i 162: ; preds = %159 %163 = getelementptr inbounds nuw i8, ptr %161, i64 14 %164 = load i16, ptr %163, align 2 - switch i16 %164, label %165 [ - i16 0, label %179 - i16 -1, label %179 - ] + %.off = add i16 %164, -1 + %switch = icmp ult i16 %.off, -2 + br i1 %switch, label %165, label %179 165: ; preds = %162 %166 = zext i16 %164 to i32 @@ -22742,7 +22741,7 @@ _find_node_config.exit: ; preds = %.loopexit.i %178 = load i32, ptr %177, align 8 br label %190 -179: ; preds = %162, %162, %159 +179: ; preds = %162, %159 %180 = getelementptr inbounds nuw i8, ptr %7, i64 296 %181 = load i32, ptr %180, align 8 %182 = add nsw i32 %.0473, -1 @@ -23078,10 +23077,9 @@ _find_node_config.exit: ; preds = %.loopexit.i 347: ; preds = %344 %348 = getelementptr inbounds nuw i8, ptr %346, i64 14 %349 = load i16, ptr %348, align 2 - switch i16 %349, label %350 [ - i16 0, label %364 - i16 -1, label %364 - ] + %.off467 = add i16 %349, -1 + %switch468 = icmp ult i16 %.off467, -2 + br i1 %switch468, label %350, label %364 350: ; preds = %347 %351 = zext i16 %349 to i32 @@ -23101,7 +23099,7 @@ _find_node_config.exit: ; preds = %.loopexit.i %363 = load i32, ptr %362, align 8 br label %375 -364: ; preds = %347, %347, %344 +364: ; preds = %347, %344 %365 = getelementptr inbounds nuw i8, ptr %7, i64 296 %366 = load i32, ptr %365, align 8 %367 = add nsw i32 %.0473, -1 @@ -38038,10 +38036,9 @@ define dso_local zeroext i16 @job_mgr_determine_cpus_per_core(ptr noundef readon 18: ; preds = %.thread %19 = getelementptr inbounds nuw i8, ptr %17, i64 14 %20 = load i16, ptr %19, align 2 - switch i16 %20, label %21 [ - i16 -1, label %30 - i16 0, label %30 - ] + %.off = add i16 %20, -1 + %switch = icmp ult i16 %.off, -2 + br i1 %switch, label %21, label %30 21: ; preds = %18 %22 = zext i16 %20 to i32 @@ -38054,8 +38051,8 @@ define dso_local zeroext i16 @job_mgr_determine_cpus_per_core(ptr noundef readon %29 = trunc nuw i32 %28 to i16 br label %30 -30: ; preds = %18, %18, %21 - %.1 = phi i16 [ %29, %21 ], [ -1, %18 ], [ -1, %18 ] +30: ; preds = %18, %21 + %.1 = phi i16 [ %29, %21 ], [ -1, %18 ] %31 = getelementptr inbounds nuw i8, ptr %17, i64 8 %32 = load i16, ptr %31, align 2 %.not34.not = icmp eq i16 %32, -2 diff --git a/bench/smol-rs/optimized/2itwlwnaucg2cdit.ll b/bench/smol-rs/optimized/2itwlwnaucg2cdit.ll index 0ebf9e8f6e2..60bdd7da085 100644 --- a/bench/smol-rs/optimized/2itwlwnaucg2cdit.ll +++ b/bench/smol-rs/optimized/2itwlwnaucg2cdit.ll @@ -191,7 +191,10 @@ default.unreachable15: ; preds = %23, %8 %.sroa.6.0 = phi i64 [ %12, %10 ], [ 1, %8 ] %14 = tail call noundef i64 @"_ZN16concurrent_queue24ConcurrentQueue$LT$T$GT$3len17h682c8f28e584a57eE"(ptr noundef nonnull align 128 %1) %15 = sub i64 %.sroa.6.0, %14 - %.0.sroa.speculated.i = tail call noundef range(i64 0, -9223372036854775808) i64 @llvm.umin.i64(i64 range(i64 1, -9223372036854775808) %7, i64 %15) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 range(i64 1, -9223372036854775808) %7, i64 %15) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %15, i64 %7 br label %.critedge .critedge: ; preds = %8, %13 @@ -208,7 +211,7 @@ default.unreachable15: ; preds = %23, %8 19: ; preds = %.lr.ph, %"_ZN4core3ptr125drop_in_place$LT$core..result..Result$LT$$LP$$RP$$C$concurrent_queue..PushError$LT$async_task..runnable..Runnable$GT$$GT$$GT$17h9643a667c588e5feE.exit" %.sroa.04.012 = phi i64 [ 0, %.lr.ph ], [ %20, %"_ZN4core3ptr125drop_in_place$LT$core..result..Result$LT$$LP$$RP$$C$concurrent_queue..PushError$LT$async_task..runnable..Runnable$GT$$GT$$GT$17h9643a667c588e5feE.exit" ] - %20 = add nuw nsw i64 %.sroa.04.012, 1 + %20 = add nuw i64 %.sroa.04.012, 1 call void @llvm.lifetime.start.p0(ptr nonnull %4) call void @"_ZN16concurrent_queue24ConcurrentQueue$LT$T$GT$3pop17hda207cbcc38696a6E"(ptr noalias noundef nonnull sret({ i8, [15 x i8] }) align 8 captures(none) dereferenceable(16) %4, ptr noundef nonnull align 128 %0) %21 = load i8, ptr %4, align 8, !range !12, !noundef !10 @@ -1413,7 +1416,7 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #14 declare void @llvm.experimental.noalias.scope.decl(metadata) #15 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #16 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #16 attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/smol-rs/optimized/38abr5s50jd6yipr.ll b/bench/smol-rs/optimized/38abr5s50jd6yipr.ll index 6946ca018c0..ff19c3b33ec 100644 --- a/bench/smol-rs/optimized/38abr5s50jd6yipr.ll +++ b/bench/smol-rs/optimized/38abr5s50jd6yipr.ll @@ -544,10 +544,16 @@ define hidden { i64, i64 } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amorti 7: ; preds = %3 %8 = load i64, ptr %0, align 8, !noundef !4 %9 = shl i64 %8, 1 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %9, i64 %5) - %.0.sroa.speculated.i29 = tail call noundef i64 @llvm.umax.i64(i64 %.0.sroa.speculated.i, i64 4) - %10 = icmp ugt i64 %.0.sroa.speculated.i, 329406144173384850 - %11 = mul nuw nsw i64 %.0.sroa.speculated.i29, 28 + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %9, i64 %5) + %.off.i = add nsw i8 %.0.sroa.speculated.i, -1 + %10 = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %10, i64 %9, i64 %5 + %.0.i.i.i29 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 %.0.sroa.speculated.i) + %.off.i30 = add nsw i8 %.0.i.i.i29, -1 + %switch.i31 = icmp ult i8 %.off.i30, -2 + %.0.sroa.speculated.i32 = select i1 %switch.i31, i64 4, i64 %.0.sroa.speculated.i + %10 = icmp ugt i64 %.0.sroa.speculated.i32, 329406144173384850 + %11 = mul nuw nsw i64 %.0.sroa.speculated.i32, 28 %12 = getelementptr inbounds nuw i8, ptr %0, i64 8 %.val28 = load ptr, ptr %12, align 8 %13 = icmp eq i64 %8, 0 @@ -563,31 +569,36 @@ define hidden { i64, i64 } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amorti 15: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread" %16 = mul nuw i64 %8, 28 - %17 = icmp uge i64 %.0.sroa.speculated.i29, %8 + %17 = icmp uge i64 %.0.sroa.speculated.i32, %8 tail call void @llvm.assume(i1 %17) %18 = tail call noundef align 4 ptr @__rust_realloc(ptr noundef nonnull %.val28, i64 noundef %16, i64 noundef range(i64 1, 9) 4, i64 noundef %11) #21, !noalias !169 br label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit 19: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit" - %20 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !169 - %21 = tail call noundef align 4 ptr @__rust_alloc(i64 noundef %11, i64 noundef range(i64 1, 9) 4) #21, !noalias !169 + %20 = icmp eq i64 %.0.sroa.speculated.i32, 0 + br i1 %20, label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.thread59, label %21 + +21: ; preds = %19 + %22 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !169 + %23 = tail call noundef align 4 ptr @__rust_alloc(i64 noundef %11, i64 noundef range(i64 1, 9) 4) #21, !noalias !169 br label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit -_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit: ; preds = %15, %19 - %.sroa.012.1.i.i.pn.i = phi ptr [ %18, %15 ], [ %21, %19 ] +_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit: ; preds = %15, %21 + %.sroa.012.1.i.i.pn.i = phi ptr [ %18, %15 ], [ %23, %21 ] %.not = icmp eq ptr %.sroa.012.1.i.i.pn.i, null %.sink1.i.i = select i1 %.not, ptr inttoptr (i64 4 to ptr), ptr %.sroa.012.1.i.i.pn.i %22 = ptrtoint ptr %.sink1.i.i to i64 br i1 %.not, label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.thread, label %23 -23: ; preds = %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit - store ptr %.sroa.012.1.i.i.pn.i, ptr %12, align 8 - store i64 %.0.sroa.speculated.i29, ptr %0, align 8 +23: ; preds = %19, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit + %.sink1.i.i63 = phi ptr [ %.sroa.012.1.i.i.pn.i, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit ], [ inttoptr (i64 4 to ptr), %19 ] + store ptr %.sink1.i.i63, ptr %12, align 8 + store i64 %.0.sroa.speculated.i32, ptr %0, align 8 br label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.thread _ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.thread: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread", %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit", %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit, %3, %23 - %.sroa.4.0 = phi i64 [ undef, %23 ], [ %5, %3 ], [ %11, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit ], [ undef, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit" ], [ undef, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread" ] - %.sroa.0.0 = phi i64 [ -9223372036854775807, %23 ], [ 0, %3 ], [ %22, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit ], [ 0, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit" ], [ 0, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread" ] + %.sroa.4.0 = phi i64 [ undef, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.thread59 ], [ %5, %3 ], [ %11, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit ], [ undef, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit" ], [ undef, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread" ] + %.sroa.0.0 = phi i64 [ -9223372036854775807, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.thread59 ], [ 0, %3 ], [ %24, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit ], [ 0, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit" ], [ 0, %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread" ] %24 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 %25 = insertvalue { i64, i64 } %24, i64 %.sroa.4.0, 1 ret { i64, i64 } %25 @@ -604,10 +615,16 @@ define hidden void @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17h %6 = extractvalue { i64, i1 } %3, 0 %7 = load i64, ptr %0, align 8, !alias.scope !173, !noundef !4 %8 = shl i64 %7, 1 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umax.i64(i64 %8, i64 %6) - %.0.sroa.speculated.i29.i = tail call noundef i64 @llvm.umax.i64(i64 %.0.sroa.speculated.i.i, i64 4) - %9 = icmp ugt i64 %.0.sroa.speculated.i.i, 576460752303423487 - %10 = shl nuw nsw i64 %.0.sroa.speculated.i29.i, 4 + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %8, i64 %6) + %.off.i.i = add nsw i8 %.0.sroa.speculated.i.i, -1 + %9 = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %9, i64 %8, i64 %6 + %.0.i.i.i29.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 %.0.sroa.speculated.i.i) + %.off.i30.i = add nsw i8 %.0.i.i.i29.i, -1 + %switch.i31.i = icmp ult i8 %.off.i30.i, -2 + %.0.sroa.speculated.i32.i = select i1 %switch.i31.i, i64 4, i64 %.0.sroa.speculated.i.i + %9 = icmp ugt i64 %.0.sroa.speculated.i32.i, 576460752303423487 + %10 = shl nuw nsw i64 %.0.sroa.speculated.i32.i, 4 %11 = getelementptr inbounds nuw i8, ptr %0, i64 8 %.val28.i = load ptr, ptr %11, align 8, !alias.scope !173 %12 = icmp eq i64 %7, 0 @@ -629,18 +646,23 @@ define hidden void @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17h br label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i 18: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h2206e187906f837cE.exit.i" - %19 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !176 - %20 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %10, i64 noundef range(i64 1, 9) 8) #21, !noalias !176 + %19 = icmp eq i64 %.0.sroa.speculated.i32.i, 0 + br i1 %19, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8a0cbc9ba16efc0fE.exit.thread3", label %20 + +20: ; preds = %18 + %21 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !176 + %22 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %10, i64 noundef range(i64 1, 9) 8) #21, !noalias !176 br label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i -_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i: ; preds = %18, %14 - %.sroa.012.1.i.i.pn.i.i = phi ptr [ %17, %14 ], [ %20, %18 ] +_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i: ; preds = %20, %14 + %.sroa.012.1.i.i.pn.i.i = phi ptr [ %17, %14 ], [ %22, %20 ] %.not.i = icmp eq ptr %.sroa.012.1.i.i.pn.i.i, null br i1 %.not.i, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8a0cbc9ba16efc0fE.exit", label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8a0cbc9ba16efc0fE.exit.thread3" -"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8a0cbc9ba16efc0fE.exit.thread3": ; preds = %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i - store ptr %.sroa.012.1.i.i.pn.i.i, ptr %11, align 8, !alias.scope !173 - store i64 %.0.sroa.speculated.i29.i, ptr %0, align 8, !alias.scope !173 +"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8a0cbc9ba16efc0fE.exit.thread3": ; preds = %18, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i + %.sink1.i.i63.i = phi ptr [ %.sroa.012.1.i.i.pn.i.i, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i ], [ inttoptr (i64 8 to ptr), %18 ] + store ptr %.sink1.i.i63.i, ptr %11, align 8, !alias.scope !173 + store i64 %.0.sroa.speculated.i32.i, ptr %0, align 8, !alias.scope !173 ret void "_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8a0cbc9ba16efc0fE.exit.thread": ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h2206e187906f837cE.exit.thread.i", %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17h2206e187906f837cE.exit.i", %2 @@ -663,10 +685,16 @@ define hidden void @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$7reserve21do_reserve_ %7 = extractvalue { i64, i1 } %4, 0 %8 = load i64, ptr %0, align 8, !alias.scope !180, !noundef !4 %9 = shl i64 %8, 1 - %.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umax.i64(i64 %9, i64 %7) - %.0.sroa.speculated.i29.i = tail call noundef i64 @llvm.umax.i64(i64 %.0.sroa.speculated.i.i, i64 4) - %10 = icmp ugt i64 %.0.sroa.speculated.i.i, 329406144173384850 - %11 = mul nuw nsw i64 %.0.sroa.speculated.i29.i, 28 + %.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %9, i64 %7) + %.off.i.i = add nsw i8 %.0.sroa.speculated.i.i, -1 + %10 = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %9, i64 %9, i64 %7 + %.0.i.i.i29.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 4, i64 %.0.sroa.speculated.i.i) + %.off.i30.i = add nsw i8 %.0.i.i.i29.i, -1 + %switch.i31.i = icmp ult i8 %.off.i30.i, -2 + %.0.sroa.speculated.i32.i = select i1 %switch.i31.i, i64 4, i64 %.0.sroa.speculated.i.i + %10 = icmp ugt i64 %.0.sroa.speculated.i32.i, 329406144173384850 + %11 = mul nuw nsw i64 %.0.sroa.speculated.i32.i, 28 %12 = getelementptr inbounds nuw i8, ptr %0, i64 8 %.val28.i = load ptr, ptr %12, align 8, !alias.scope !180 %13 = icmp eq i64 %8, 0 @@ -682,24 +710,29 @@ define hidden void @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$7reserve21do_reserve_ 15: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread.i" %16 = mul nuw i64 %8, 28 - %17 = icmp uge i64 %.0.sroa.speculated.i29.i, %8 + %17 = icmp uge i64 %.0.sroa.speculated.i32.i, %8 tail call void @llvm.assume(i1 %17) %18 = tail call noundef align 4 ptr @__rust_realloc(ptr noundef nonnull %.val28.i, i64 noundef %16, i64 noundef range(i64 1, 9) 4, i64 noundef %11) #21, !noalias !183 br label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i 19: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.i" - %20 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !183 - %21 = tail call noundef align 4 ptr @__rust_alloc(i64 noundef %11, i64 noundef range(i64 1, 9) 4) #21, !noalias !183 + %20 = icmp eq i64 %.0.sroa.speculated.i32.i, 0 + br i1 %20, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8776e1bef4f702e2E.llvm.4631799374070668439.exit.thread3", label %21 + +21: ; preds = %19 + %22 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !183 + %23 = tail call noundef align 4 ptr @__rust_alloc(i64 noundef %11, i64 noundef range(i64 1, 9) 4) #21, !noalias !183 br label %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i -_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i: ; preds = %19, %15 - %.sroa.012.1.i.i.pn.i.i = phi ptr [ %18, %15 ], [ %21, %19 ] +_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i: ; preds = %21, %15 + %.sroa.012.1.i.i.pn.i.i = phi ptr [ %18, %15 ], [ %23, %21 ] %.not.i = icmp eq ptr %.sroa.012.1.i.i.pn.i.i, null br i1 %.not.i, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8776e1bef4f702e2E.llvm.4631799374070668439.exit", label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8776e1bef4f702e2E.llvm.4631799374070668439.exit.thread3" -"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8776e1bef4f702e2E.llvm.4631799374070668439.exit.thread3": ; preds = %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i - store ptr %.sroa.012.1.i.i.pn.i.i, ptr %12, align 8, !alias.scope !180 - store i64 %.0.sroa.speculated.i29.i, ptr %0, align 8, !alias.scope !180 +"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8776e1bef4f702e2E.llvm.4631799374070668439.exit.thread3": ; preds = %19, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i + %.sink1.i.i63.i = phi ptr [ %.sroa.012.1.i.i.pn.i.i, %_ZN5alloc7raw_vec11finish_grow17h3b68f4934f854c10E.exit.i ], [ inttoptr (i64 4 to ptr), %19 ] + store ptr %.sink1.i.i63.i, ptr %12, align 8, !alias.scope !180 + store i64 %.0.sroa.speculated.i32.i, ptr %0, align 8, !alias.scope !180 ret void "_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h8776e1bef4f702e2E.llvm.4631799374070668439.exit.thread": ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.thread.i", %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14current_memory17hb37a83389840a093E.exit.i", %3 @@ -852,7 +885,7 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #16 declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #17 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #18 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #18 attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: readwrite) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/softposit-rs/optimized/1jooigl29qhneyer.ll b/bench/softposit-rs/optimized/1jooigl29qhneyer.ll index 90e01c3e6e2..94cf7d22a05 100644 --- a/bench/softposit-rs/optimized/1jooigl29qhneyer.ll +++ b/bench/softposit-rs/optimized/1jooigl29qhneyer.ll @@ -3247,13 +3247,19 @@ define noundef i32 @"_ZN68_$LT$softposit..p32e2..P32E2$u20$as$u20$num_traits..fl ; Function Attrs: mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define noundef i32 @"_ZN68_$LT$softposit..p32e2..P32E2$u20$as$u20$num_traits..float..Float$GT$3max17hf12e750befd7eaecE"(i32 noundef %0, i32 noundef %1) unnamed_addr #0 personality ptr @rust_eh_personality { - %.0.sroa.speculated.i = tail call noundef i32 @llvm.smax.i32(i32 %0, i32 %1) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.scmp.i8.i32(i32 %0, i32 %1) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i32 %0, i32 %1 ret i32 %.0.sroa.speculated.i } ; Function Attrs: mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define noundef i32 @"_ZN68_$LT$softposit..p32e2..P32E2$u20$as$u20$num_traits..float..Float$GT$3min17hc3dc355e723de6f8E"(i32 noundef %0, i32 noundef %1) unnamed_addr #0 personality ptr @rust_eh_personality { - %.0.sroa.speculated.i = tail call noundef i32 @llvm.smin.i32(i32 %0, i32 %1) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.scmp.i8.i32(i32 %0, i32 %1) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i32 %1, i32 %0 ret i32 %.0.sroa.speculated.i } @@ -3766,6 +3772,9 @@ declare i16 @llvm.abs.i16(i16, i1 immarg) #9 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i8 @llvm.abs.i8(i8, i1 immarg) #9 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.scmp.i8.i32(i32, i32) #9 + attributes #0 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nofree norecurse nosync nounwind nonlazybind memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint nofree norecurse nosync nounwind nonlazybind memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/softposit-rs/optimized/1lokjdca9mvxc3pe.ll b/bench/softposit-rs/optimized/1lokjdca9mvxc3pe.ll index 60e15dcb950..c0733990c3e 100644 --- a/bench/softposit-rs/optimized/1lokjdca9mvxc3pe.ll +++ b/bench/softposit-rs/optimized/1lokjdca9mvxc3pe.ll @@ -51,7 +51,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %13 = ptrtoint ptr %3 to i64 %14 = sub nuw i64 %12, %13 %15 = lshr exact i64 %14, 3 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %10, i64 %15) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %10, i64 %15) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %15, i64 %10 store ptr %1, ptr %0, align 8 %16 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %16, align 8 @@ -80,7 +83,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %11 = getelementptr inbounds nuw i8, ptr %3, i64 72 %12 = load i64, ptr %11, align 8, !alias.scope !15, !noalias !22, !noundef !9 %13 = sub i64 %10, %12 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %.sink3.i.i, i64 %13) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %.sink3.i.i, i64 %13) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %13, i64 %.sink3.i.i %14 = getelementptr inbounds nuw i8, ptr %0, i64 96 store i32 %1, ptr %14, align 8 %15 = getelementptr inbounds nuw i8, ptr %0, i64 100 @@ -108,7 +114,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %12 = getelementptr inbounds nuw i8, ptr %3, i64 32 %13 = load i64, ptr %12, align 8, !alias.scope !25, !noalias !32, !noundef !9 %14 = sub i64 %11, %13 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %9, i64 %14) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %9, i64 %14) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %14, i64 %9 store ptr %1, ptr %0, align 8 %15 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %15, align 8 @@ -163,7 +172,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6min_by17hcb809012105e59e2E.llvm.15081571903896253854(i64 noundef %0, i64 noundef %1) unnamed_addr #6 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.0.sroa.speculated } @@ -459,9 +471,6 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #12 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #13 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #13 - ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) declare void @llvm.assume(i1 noundef) #14 diff --git a/bench/stat-rs/optimized/n94tvlll45kxl7r.ll b/bench/stat-rs/optimized/n94tvlll45kxl7r.ll index 2485b915330..3f1953c23af 100644 --- a/bench/stat-rs/optimized/n94tvlll45kxl7r.ll +++ b/bench/stat-rs/optimized/n94tvlll45kxl7r.ll @@ -432,7 +432,7 @@ _ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.e } ; Function Attrs: nonlazybind uwtable -define noundef range(i64 0, -1) i64 @"_ZN117_$LT$statrs..distribution..categorical..Categorical$u20$as$u20$statrs..distribution..DiscreteCDF$LT$u64$C$f64$GT$$GT$11inverse_cdf17h0a08886c322dbd23E"(ptr noalias noundef readonly align 8 captures(none) dereferenceable(72) %0, double noundef %1) unnamed_addr #0 personality ptr @rust_eh_personality { +define noundef i64 @"_ZN117_$LT$statrs..distribution..categorical..Categorical$u20$as$u20$statrs..distribution..DiscreteCDF$LT$u64$C$f64$GT$$GT$11inverse_cdf17h0a08886c322dbd23E"(ptr noalias noundef readonly align 8 captures(none) dereferenceable(72) %0, double noundef %1) unnamed_addr #0 personality ptr @rust_eh_personality { %3 = fcmp oge double %1, 1.000000e+00 %4 = fcmp ole double %1, 0.000000e+00 %or.cond = or i1 %3, %4 @@ -464,11 +464,18 @@ _ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.e tail call void @llvm.experimental.noalias.scope.decl(metadata !51) %15 = add i64 %.val1, -1 %.not16.i = icmp slt i64 %15, 0 - br i1 %.not16.i, label %_ZN6statrs12distribution11categorical12binary_index17h4f996a2b526e59c5E.exit, label %.lr.ph.i - -._crit_edge.loopexit.i: ; preds = %32 - %16 = tail call range(i64 0, -9223372036854775808) i64 @llvm.smax.i64(i64 %.sroa.06.1.i, i64 0) - %17 = tail call i64 @llvm.umin.i64(i64 %.val1, i64 %16) + br i1 %.not16.i, label %._crit_edge.loopexit.i, label %.lr.ph.i + +._crit_edge.loopexit.i: ; preds = %32, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit + %.sroa.06.0.lcssa.i = phi i64 [ 0, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit ], [ %.sroa.06.1.i, %32 ] + %17 = tail call noundef range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64 %.sroa.06.0.lcssa.i, i64 0) + %.off.i.i = add nsw i8 %16, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.sroa.0.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %.sroa.06.0.lcssa.i, i64 0 + %17 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %.val1, i64 %.sroa.0.0.sroa.speculated.i.i) + %.off.i11.i = add nsw i8 %17, -1 + %switch.i12.i = icmp ult i8 %.off.i11.i, -2 + %.sroa.0.0.sroa.speculated.i13.i = select i1 %switch.i12.i, i64 %.sroa.0.0.sroa.speculated.i.i, i64 %.val1 br label %_ZN6statrs12distribution11categorical12binary_index17h4f996a2b526e59c5E.exit .lr.ph.i: ; preds = %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit, %32 @@ -508,8 +515,8 @@ _ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.e %.not.i2 = icmp sgt i64 %.sroa.06.1.i, %.sroa.02.1.i br i1 %.not.i2, label %._crit_edge.loopexit.i, label %.lr.ph.i -_ZN6statrs12distribution11categorical12binary_index17h4f996a2b526e59c5E.exit: ; preds = %26, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit, %._crit_edge.loopexit.i - %.sroa.0.0.i = phi i64 [ 0, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit ], [ %17, %._crit_edge.loopexit.i ], [ %20, %26 ] +_ZN6statrs12distribution11categorical12binary_index17h4f996a2b526e59c5E.exit: ; preds = %26, %._crit_edge.loopexit.i + %.sroa.0.0.i = phi i64 [ %.sroa.0.0.sroa.speculated.i13.i, %._crit_edge.i ], [ %20, %26 ] ret i64 %.sroa.0.0.i } @@ -655,11 +662,18 @@ _ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.e tail call void @llvm.experimental.noalias.scope.decl(metadata !66) %10 = add i64 %.val1.i, -1 %.not16.i.i = icmp slt i64 %10, 0 - br i1 %.not16.i.i, label %"_ZN117_$LT$statrs..distribution..categorical..Categorical$u20$as$u20$statrs..distribution..DiscreteCDF$LT$u64$C$f64$GT$$GT$11inverse_cdf17h0a08886c322dbd23E.exit", label %.lr.ph.i.i - -._crit_edge.loopexit.i.i: ; preds = %27 - %11 = tail call range(i64 0, -9223372036854775808) i64 @llvm.smax.i64(i64 %.sroa.06.1.i.i, i64 0) - %12 = tail call i64 @llvm.umin.i64(i64 %.val1.i, i64 %11) + br i1 %.not16.i.i, label %._crit_edge.loopexit.i.i, label %.lr.ph.i.i + +._crit_edge.loopexit.i.i: ; preds = %27, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit.i + %.sroa.06.0.lcssa.i.i = phi i64 [ 0, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit.i ], [ %.sroa.06.1.i.i, %27 ] + %12 = tail call noundef range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64 %.sroa.06.0.lcssa.i.i, i64 0) + %.off.i.i.i = add nsw i8 %11, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.sroa.0.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %.sroa.06.0.lcssa.i.i, i64 0 + %12 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %.val1.i, i64 %.sroa.0.0.sroa.speculated.i.i.i) + %.off.i11.i.i = add nsw i8 %12, -1 + %switch.i12.i.i = icmp ult i8 %.off.i11.i.i, -2 + %.sroa.0.0.sroa.speculated.i13.i.i = select i1 %switch.i12.i.i, i64 %.sroa.0.0.sroa.speculated.i.i.i, i64 %.val1.i br label %"_ZN117_$LT$statrs..distribution..categorical..Categorical$u20$as$u20$statrs..distribution..DiscreteCDF$LT$u64$C$f64$GT$$GT$11inverse_cdf17h0a08886c322dbd23E.exit" .lr.ph.i.i: ; preds = %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit.i, %27 @@ -699,8 +713,8 @@ _ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.e %.not.i2.i = icmp sgt i64 %.sroa.06.1.i.i, %.sroa.02.1.i.i br i1 %.not.i2.i, label %._crit_edge.loopexit.i.i, label %.lr.ph.i.i -"_ZN117_$LT$statrs..distribution..categorical..Categorical$u20$as$u20$statrs..distribution..DiscreteCDF$LT$u64$C$f64$GT$$GT$11inverse_cdf17h0a08886c322dbd23E.exit": ; preds = %21, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit.i, %._crit_edge.loopexit.i.i - %.sroa.0.0.i.i = phi i64 [ 0, %_ZN6statrs12distribution11categorical11Categorical7cdf_max17h52d7dfa5133b7b53E.exit.i ], [ %12, %._crit_edge.loopexit.i.i ], [ %15, %21 ] +"_ZN117_$LT$statrs..distribution..categorical..Categorical$u20$as$u20$statrs..distribution..DiscreteCDF$LT$u64$C$f64$GT$$GT$11inverse_cdf17h0a08886c322dbd23E.exit": ; preds = %21, %._crit_edge.loopexit.i.i + %.sroa.0.0.i.i = phi i64 [ %.sroa.0.0.sroa.speculated.i13.i.i, %._crit_edge.i.i ], [ %15, %21 ] %28 = uitofp i64 %.sroa.0.0.i.i to double ret double %28 } @@ -1861,16 +1875,16 @@ declare void @llvm.lifetime.start.p0(ptr captures(none)) #16 declare void @llvm.lifetime.end.p0(ptr captures(none)) #16 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare double @llvm.exp2.f64(double) #17 - -; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) -declare void @llvm.experimental.noalias.scope.decl(metadata) #18 +declare range(i8 -1, 2) i8 @llvm.scmp.i8.i64(i64, i64) #17 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #17 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #17 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.smax.i64(i64, i64) #17 +declare double @llvm.exp2.f64(double) #17 + +; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) +declare void @llvm.experimental.noalias.scope.decl(metadata) #18 attributes #0 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/syn/optimized/2tga7oe2tfdpj05w.ll b/bench/syn/optimized/2tga7oe2tfdpj05w.ll index a988692b8dd..bec370ed5ad 100644 --- a/bench/syn/optimized/2tga7oe2tfdpj05w.ll +++ b/bench/syn/optimized/2tga7oe2tfdpj05w.ll @@ -1911,8 +1911,8 @@ define hidden void @_ZN3syn4path8printing10print_path17h3f3d7e99b2afb1d3E(ptr no br label %"_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit.i.outer" "_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit.i.outer": ; preds = %"_ZN52_$LT$$RF$T$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17hb7b85498f870a015E.exit13", %"_ZN76_$LT$core..option..Option$LT$T$GT$$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17h4e43d934e5a0a2fbE.exit12" - %.sroa.036.0.ph = phi ptr [ %20, %"_ZN52_$LT$$RF$T$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17hb7b85498f870a015E.exit13" ], [ %.sroa.039.0.copyload, %"_ZN76_$LT$core..option..Option$LT$T$GT$$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17h4e43d934e5a0a2fbE.exit12" ] - %.sroa.638.0.ph = phi ptr [ %.sroa.638.0, %"_ZN52_$LT$$RF$T$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17hb7b85498f870a015E.exit13" ], [ %.sroa.541.0.copyload, %"_ZN76_$LT$core..option..Option$LT$T$GT$$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17h4e43d934e5a0a2fbE.exit12" ] + %.sroa.036.0.ph = phi ptr [ %20, %"_ZN52_$LT$$RF$T$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17hb7b85498f870a015E.exit14" ], [ %.sroa.039.0.copyload, %"_ZN76_$LT$core..option..Option$LT$T$GT$$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17h4e43d934e5a0a2fbE.exit13" ] + %.sroa.638.0.ph = phi ptr [ %.sroa.638.0, %"_ZN52_$LT$$RF$T$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17hb7b85498f870a015E.exit14" ], [ %.sroa.541.0.copyload, %"_ZN76_$LT$core..option..Option$LT$T$GT$$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17h4e43d934e5a0a2fbE.exit13" ] %15 = icmp ne ptr %.sroa.036.0.ph, null tail call void @llvm.assume(i1 %15) %16 = icmp eq ptr %.sroa.036.0.ph, %.sroa.440.0.copyload @@ -2024,7 +2024,10 @@ default.unreachable: ; preds = %165, %150, %135, %1 %.not.i = icmp ne ptr %60, null %..i = zext i1 %.not.i to i64 %61 = add i64 %58, %..i - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %56, i64 %61) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %56, i64 %61) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %61, i64 %56 call void @llvm.lifetime.start.p0(ptr nonnull %7) call void @"_ZN3syn10punctuated23Punctuated$LT$T$C$P$GT$5pairs17h47863a5be5d2d1d5E"(ptr noalias noundef nonnull sret({ { ptr, ptr }, ptr }) align 8 captures(none) dereferenceable(24) %7, ptr noalias noundef nonnull readonly align 8 dereferenceable(32) %2) %.not = icmp eq i64 %.0.sroa.speculated.i, 0 @@ -2129,7 +2132,7 @@ default.unreachable: ; preds = %165, %150, %135, %1 br i1 %97, label %165, label %150 "_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit": ; preds = %"_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit.outer", %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit16" - %.sroa.026.0 = phi ptr [ %104, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit16" ], [ %.sroa.026.0.ph, %"_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit.outer" ] + %.sroa.026.0 = phi ptr [ %104, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit17" ], [ %.sroa.026.0.ph, %"_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit.outer" ] %98 = icmp ne ptr %.sroa.026.0, null tail call void @llvm.assume(i1 %98) %99 = icmp eq ptr %.sroa.026.0, %.sroa.2.0.copyload @@ -2290,10 +2293,10 @@ default.unreachable: ; preds = %165, %150, %135, %1 br label %"_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit8" 165: ; preds = %.thread104, %91 - %.sroa.5.0 = phi ptr [ null, %.thread104 ], [ %93, %91 ] - %166 = phi ptr [ null, %.thread104 ], [ %85, %91 ] - %167 = phi ptr [ %86, %.thread104 ], [ %92, %91 ] - %.sroa.65.1.i112 = phi ptr [ %85, %.thread104 ], [ %86, %91 ] + %.sroa.5.0 = phi ptr [ null, %.thread105 ], [ %93, %91 ] + %166 = phi ptr [ null, %.thread105 ], [ %85, %91 ] + %167 = phi ptr [ %86, %.thread105 ], [ %92, %91 ] + %.sroa.65.1.i112 = phi ptr [ %85, %.thread105 ], [ %86, %91 ] tail call void @"_ZN65_$LT$proc_macro2..Ident$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17h629b5813b48ddffcE"(ptr noalias noundef nonnull readonly align 8 dereferenceable(96) %.sroa.65.1.i112, ptr noalias noundef nonnull align 8 dereferenceable(32) %0) %168 = getelementptr inbounds nuw i8, ptr %.sroa.65.1.i112, i64 32 %169 = load i64, ptr %168, align 8, !range !77, !alias.scope !530, !noalias !533, !noundef !7 @@ -2336,9 +2339,9 @@ default.unreachable: ; preds = %165, %150, %135, %1 br label %"_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit8" "_ZN3syn10punctuated8printing91_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..punctuated..Pair$LT$T$C$P$GT$$GT$9to_tokens17h2f65737e4172ea54E.exit8": ; preds = %150, %182, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit", %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit20", %157, %162, %155 - %184 = phi ptr [ %85, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit20" ], [ null, %157 ], [ null, %162 ], [ null, %150 ], [ null, %155 ], [ %166, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit" ], [ %166, %182 ] - %185 = phi ptr [ %92, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit20" ], [ %86, %157 ], [ %86, %162 ], [ %86, %150 ], [ %86, %155 ], [ %167, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit" ], [ %167, %182 ] - %186 = phi i64 [ %94, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit20" ], [ %96, %157 ], [ %96, %162 ], [ %96, %150 ], [ %96, %155 ], [ %.0.sroa.speculated.i, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit" ], [ %.0.sroa.speculated.i, %182 ] + %184 = phi ptr [ %85, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit21" ], [ null, %157 ], [ null, %162 ], [ null, %150 ], [ null, %155 ], [ %166, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit" ], [ %166, %182 ] + %185 = phi ptr [ %92, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit21" ], [ %86, %157 ], [ %86, %162 ], [ %86, %150 ], [ %86, %155 ], [ %167, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit" ], [ %167, %182 ] + %186 = phi i64 [ %94, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit21" ], [ %96, %157 ], [ %96, %162 ], [ %96, %150 ], [ %96, %155 ], [ %.0.sroa.speculated.i, %"_ZN3syn4path8printing81_$LT$impl$u20$quote..to_tokens..ToTokens$u20$for$u20$syn..path..PathArguments$GT$9to_tokens17h9597255c2fe3aa38E.exit" ], [ %.0.sroa.speculated.i, %182 ] %187 = icmp eq i64 %87, 0 br i1 %187, label %"_ZN76_$LT$core..option..Option$LT$T$GT$$u20$as$u20$quote..to_tokens..ToTokens$GT$9to_tokens17h4e43d934e5a0a2fbE.exit.loopexit", label %84 } @@ -10443,6 +10446,9 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #24 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i8(i8, i8) #23 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #23 + attributes #0 = { nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/syn/optimized/4llvvcm7ykus6q9g.ll b/bench/syn/optimized/4llvvcm7ykus6q9g.ll index 65180bcd2a9..7ba21fb2a6a 100644 --- a/bench/syn/optimized/4llvvcm7ykus6q9g.ll +++ b/bench/syn/optimized/4llvvcm7ykus6q9g.ll @@ -9450,10 +9450,8 @@ define hidden void @"_ZN4core3ptr53drop_in_place$LT$$u5b$proc_macro2..TokenTree$ 10: ; preds = %.lr.ph %11 = getelementptr inbounds nuw i8, ptr %4, i64 8 %12 = load i64, ptr %11, align 8, !range !127, !alias.scope !4333, !noundef !4 - switch i64 %12, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.sink.split" [ - i64 -9223372036854775808, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit" - i64 0, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit" - ] + %switch = icmp sgt i64 %12, 0 + br i1 %switch, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.sink.split", label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit" 13: ; preds = %.lr.ph %14 = getelementptr inbounds nuw i8, ptr %4, i64 8 @@ -9466,7 +9464,7 @@ define hidden void @"_ZN4core3ptr53drop_in_place$LT$$u5b$proc_macro2..TokenTree$ i64 0, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit" ] -"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.sink.split": ; preds = %15, %10 +"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.sink.split": ; preds = %10, %15 %.sink = phi i64 [ 16, %10 ], [ 8, %15 ] %.sink17 = phi i64 [ %12, %10 ], [ %6, %15 ] %16 = getelementptr inbounds nuw i8, ptr %4, i64 %.sink @@ -9474,7 +9472,7 @@ define hidden void @"_ZN4core3ptr53drop_in_place$LT$$u5b$proc_macro2..TokenTree$ tail call void @__rust_dealloc(ptr noundef nonnull %17, i64 noundef %.sink17, i64 noundef 1) #17, !noalias !4 br label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit" -"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit": ; preds = %15, %15, %10, %10, %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.sink.split", %13, %.lr.ph +"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit": ; preds = %10, %15, %15, %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.sink.split", %13, %.lr.ph %18 = icmp eq i64 %5, %1 br i1 %18, label %._crit_edge, label %.lr.ph @@ -10953,10 +10951,8 @@ define hidden void @"_ZN4core3ptr66drop_in_place$LT$alloc..vec..Vec$LT$proc_macr 13: ; preds = %.lr.ph %14 = getelementptr inbounds nuw i8, ptr %7, i64 8 %15 = load i64, ptr %14, align 8, !range !127, !alias.scope !4970, !noundef !4 - switch i64 %15, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i.sink.split" [ - i64 -9223372036854775808, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i" - i64 0, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i" - ] + %switch = icmp sgt i64 %15, 0 + br i1 %switch, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i.sink.split", label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i" 16: ; preds = %.lr.ph %17 = getelementptr inbounds nuw i8, ptr %7, i64 8 @@ -10969,7 +10965,7 @@ define hidden void @"_ZN4core3ptr66drop_in_place$LT$alloc..vec..Vec$LT$proc_macr i64 0, label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i" ] -"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i.sink.split": ; preds = %18, %13 +"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i.sink.split": ; preds = %13, %18 %.sink = phi i64 [ 16, %13 ], [ 8, %18 ] %.sink14 = phi i64 [ %15, %13 ], [ %9, %18 ] %19 = getelementptr inbounds nuw i8, ptr %7, i64 %.sink @@ -10977,7 +10973,7 @@ define hidden void @"_ZN4core3ptr66drop_in_place$LT$alloc..vec..Vec$LT$proc_macr tail call void @__rust_dealloc(ptr noundef nonnull %20, i64 noundef %.sink14, i64 noundef 1) #17, !noalias !4 br label %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i" -"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i": ; preds = %18, %18, %13, %13, %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i.sink.split", %16, %.lr.ph +"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i": ; preds = %13, %18, %18, %"_ZN4core3ptr43drop_in_place$LT$proc_macro2..TokenTree$GT$17h61fb23fa5af22cafE.llvm.8351105841907204142.exit.i.sink.split", %16, %.lr.ph %21 = icmp eq i64 %8, %5 br i1 %21, label %"_ZN70_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$core..ops..drop..Drop$GT$4drop17h00f1fc48ced0a79aE.llvm.8351105841907204142.exit", label %.lr.ph diff --git a/bench/tev/optimized/ImageViewer.ll b/bench/tev/optimized/ImageViewer.ll index 9388e427c5a..485def28f65 100644 --- a/bench/tev/optimized/ImageViewer.ll +++ b/bench/tev/optimized/ImageViewer.ll @@ -17267,12 +17267,11 @@ define dso_local void @_ZN3tev11ImageViewer28reloadImagesWhoseFileChangedEv(ptr call void @llvm.lifetime.start.p0(ptr nonnull %2) call void @_ZNSt3__14__fs10filesystem8__statusERKNS1_4pathEPNS_10error_codeE(ptr dead_on_unwind nonnull writable sret(%"class.std::__1::__fs::filesystem::file_status") align 4 %2, ptr noundef nonnull align 8 dereferenceable(24) %14, ptr noundef null) %15 = load i64, ptr %2, align 8 + %16 = and i64 %15, 255 call void @llvm.lifetime.end.p0(ptr nonnull %2) - %trunc = trunc i64 %15 to i8 - switch i8 %trunc, label %16 [ - i8 -1, label %_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev.exit - i8 0, label %_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev.exit - ] + %.off = add nsw i64 %16, -1 + %switch = icmp ult i64 %.off, 254 + br i1 %switch, label %17, label %_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev.exit 16: ; preds = %10 %17 = load ptr, ptr %12, align 8 @@ -17330,7 +17329,7 @@ _ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit: ; preds = %29, %33 br i1 %.not7.i.i.i.i, label %_ZNK3tev11ImageViewer7imageIdERKNSt3__110shared_ptrINS_5ImageEEE.exit.i, label %.lr.ph.i.i.i.i .lr.ph.i.i.i.i: ; preds = %_ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit, %40 - %.08.i.i.i.i = phi ptr [ %41, %40 ], [ %36, %_ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit ] + %.08.i.i.i.i = phi ptr [ %41, %41 ], [ %36, %_ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit ] %38 = load ptr, ptr %.08.i.i.i.i, align 8 %39 = icmp eq ptr %38, %30 br i1 %39, label %_ZNK3tev11ImageViewer7imageIdERKNSt3__110shared_ptrINS_5ImageEEE.exit.i, label %40 @@ -17341,7 +17340,7 @@ _ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit: ; preds = %29, %33 br i1 %.not.i.i.i.i, label %_ZNK3tev11ImageViewer7imageIdERKNSt3__110shared_ptrINS_5ImageEEE.exit.i, label %.lr.ph.i.i.i.i, !llvm.loop !107 _ZNK3tev11ImageViewer7imageIdERKNSt3__110shared_ptrINS_5ImageEEE.exit.i: ; preds = %40, %.lr.ph.i.i.i.i, %_ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit - %.0.lcssa.i.i.i.i = phi ptr [ %36, %_ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit ], [ %.08.i.i.i.i, %.lr.ph.i.i.i.i ], [ %37, %40 ] + %.0.lcssa.i.i.i.i = phi ptr [ %36, %_ZNSt3__110shared_ptrIN3tev5ImageEEC2B8ne190000ERKS3_.exit ], [ %.08.i.i.i.i, %.lr.ph.i.i.i.i ], [ %37, %41 ] %42 = ptrtoint ptr %.0.lcssa.i.i.i.i to i64 %43 = ptrtoint ptr %36 to i64 %44 = sub i64 %42, %43 @@ -17375,7 +17374,7 @@ _ZN3tev11ImageViewer11reloadImageENSt3__110shared_ptrINS_5ImageEEEb.exit: ; pred %60 = load ptr, ptr %54, align 8 %61 = getelementptr inbounds nuw i8, ptr %60, i64 16 %62 = load ptr, ptr %61, align 8 - call void %62(ptr noundef nonnull align 8 dereferenceable(24) %54) #40 + call void %63(ptr noundef nonnull align 8 dereferenceable(24) %54) #40 call void @_ZNSt3__119__shared_weak_count14__release_weakEv(ptr noundef nonnull align 8 dereferenceable(24) %54) #40 br label %_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev.exit @@ -17385,16 +17384,16 @@ _ZN3tev11ImageViewer11reloadImageENSt3__110shared_ptrINS_5ImageEEEb.exit: ; pred call void @_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev(ptr noundef nonnull align 8 dereferenceable(16) %3) #40 resume { ptr, i32 } %64 -_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev.exit: ; preds = %10, %10, %59, %55, %_ZN3tev11ImageViewer11reloadImageENSt3__110shared_ptrINS_5ImageEEEb.exit, %_ZNSt3__14__fs10filesystem15last_write_timeB8ne190000ERKNS1_4pathE.exit, %25 +_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev.exit: ; preds = %10, %59, %55, %_ZN3tev11ImageViewer11reloadImageENSt3__110shared_ptrINS_5ImageEEEb.exit, %_ZNSt3__14__fs10filesystem15last_write_timeB8ne190000ERKNS1_4pathE.exit, %25 %65 = add nuw i64 %.019, 1 %66 = load ptr, ptr %5, align 8 %67 = load ptr, ptr %4, align 16 - %68 = ptrtoint ptr %66 to i64 %69 = ptrtoint ptr %67 to i64 - %70 = sub i64 %68, %69 - %71 = ashr exact i64 %70, 4 - %72 = icmp ult i64 %65, %71 - br i1 %72, label %10, label %._crit_edge, !llvm.loop !209 + %70 = ptrtoint ptr %68 to i64 + %71 = sub i64 %69, %70 + %72 = ashr exact i64 %71, 4 + %73 = icmp ult i64 %66, %72 + br i1 %73, label %10, label %._crit_edge, !llvm.loop !209 ._crit_edge: ; preds = %_ZNSt3__110shared_ptrIN3tev5ImageEED2B8ne190000Ev.exit, %1 ret void diff --git a/bench/tls-rs/optimized/49b6dhrgmsskmdw3.ll b/bench/tls-rs/optimized/49b6dhrgmsskmdw3.ll index fbad19a694d..b45056e307a 100644 --- a/bench/tls-rs/optimized/49b6dhrgmsskmdw3.ll +++ b/bench/tls-rs/optimized/49b6dhrgmsskmdw3.ll @@ -1788,7 +1788,10 @@ _ZN4core5slice4sort12choose_pivot17hb244ba6ab6f4f2faE.exit: ; preds = %"_ZN4core %213 = ptrtoint ptr %.1151.i.i to i64 %214 = ptrtoint ptr %.1147.i.i to i64 %215 = sub i64 %213, %214 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %212, i64 %215) + %.0.sroa.speculated.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %212, i64 %215) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %215, i64 %212 %.not.i.i = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not.i.i, label %223, label %227 @@ -1955,7 +1958,10 @@ _ZN4core5slice4sort12choose_pivot17hb244ba6ab6f4f2faE.exit: ; preds = %"_ZN4core store i64 %289, ptr %.sroa.0.0109.lcssa135, align 4, !alias.scope !213, !noalias !214 store i64 %.sroa.0.0.insert.insert7.i, ptr %288, align 4, !alias.scope !213, !noalias !214 %290 = sub nuw i64 %.sroa.14.0108.lcssa127, %282 - %.0.sroa.speculated.i = call noundef i64 @llvm.umin.i64(i64 %282, i64 %290) + %.0.sroa.speculated.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %282, i64 %290) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %290, i64 %282 %291 = lshr i64 %.sroa.14.0108.lcssa127, 3 %292 = icmp uge i64 %.0.sroa.speculated.i, %291 %293 = getelementptr inbounds nuw i8, ptr %288, i64 8 @@ -2669,7 +2675,10 @@ _ZN4core5slice4sort12choose_pivot17h96db4cefb14b0787E.exit: ; preds = %"_ZN4core %213 = ptrtoint ptr %.1151.i.i to i64 %214 = ptrtoint ptr %.1147.i.i to i64 %215 = sub i64 %213, %214 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %212, i64 %215) + %.0.sroa.speculated.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %212, i64 %215) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %215, i64 %212 %.not.i.i = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not.i.i, label %223, label %227 @@ -2822,7 +2831,10 @@ _ZN4core5slice4sort12choose_pivot17h96db4cefb14b0787E.exit: ; preds = %"_ZN4core store i64 %287, ptr %.sroa.0.0101.lcssa127, align 4, !alias.scope !343, !noalias !344 store i64 %161, ptr %286, align 4, !alias.scope !343, !noalias !344 %288 = sub nuw i64 %.sroa.14.0100.lcssa119, %282 - %.0.sroa.speculated.i = call noundef i64 @llvm.umin.i64(i64 %282, i64 %288) + %.0.sroa.speculated.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %282, i64 %288) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %288, i64 %282 %289 = lshr i64 %.sroa.14.0100.lcssa119, 3 %290 = icmp uge i64 %.0.sroa.speculated.i, %289 %291 = getelementptr inbounds nuw i8, ptr %286, i64 8 @@ -3532,7 +3544,10 @@ _ZN4core5slice4sort12choose_pivot17hccf106d57e647929E.exit: ; preds = %"_ZN4core %213 = ptrtoint ptr %.1151.i.i to i64 %214 = ptrtoint ptr %.1147.i.i to i64 %215 = sub i64 %213, %214 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %212, i64 %215) + %.0.sroa.speculated.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %212, i64 %215) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %215, i64 %212 %.not.i.i = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not.i.i, label %223, label %227 @@ -3699,7 +3714,10 @@ _ZN4core5slice4sort12choose_pivot17hccf106d57e647929E.exit: ; preds = %"_ZN4core store i64 %289, ptr %.sroa.0.0109.lcssa135, align 4, !alias.scope !474, !noalias !475 store i64 %.sroa.0.0.insert.insert7.i, ptr %288, align 4, !alias.scope !474, !noalias !475 %290 = sub nuw i64 %.sroa.14.0108.lcssa127, %282 - %.0.sroa.speculated.i = call noundef i64 @llvm.umin.i64(i64 %282, i64 %290) + %.0.sroa.speculated.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %282, i64 %290) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %290, i64 %282 %291 = lshr i64 %.sroa.14.0108.lcssa127, 3 %292 = icmp uge i64 %.0.sroa.speculated.i, %291 %293 = getelementptr inbounds nuw i8, ptr %288, i64 8 @@ -4419,7 +4437,10 @@ _ZN4core5slice4sort12choose_pivot17h665733fe8d2d3eabE.exit: ; preds = %"_ZN4core %216 = ptrtoint ptr %.1152.i.i to i64 %217 = ptrtoint ptr %.1148.i.i to i64 %218 = sub i64 %216, %217 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %215, i64 %218) + %.0.sroa.speculated.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %215, i64 %218) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %218, i64 %215 %.not.i.i = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not.i.i, label %226, label %230 @@ -4574,7 +4595,10 @@ _ZN4core5slice4sort12choose_pivot17h665733fe8d2d3eabE.exit: ; preds = %"_ZN4core call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %282, ptr noundef nonnull align 8 dereferenceable(16) %8, i64 16, i1 false), !noalias !604 call void @llvm.lifetime.end.p0(ptr nonnull %8) %283 = sub nuw i64 %.sroa.14.0100.lcssa119, %278 - %.0.sroa.speculated.i = call noundef i64 @llvm.umin.i64(i64 %278, i64 %283) + %.0.sroa.speculated.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %278, i64 %283) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %283, i64 %278 %284 = lshr i64 %.sroa.14.0100.lcssa119, 3 %285 = icmp uge i64 %.0.sroa.speculated.i, %284 %286 = getelementptr inbounds nuw i8, ptr %282, i64 16 @@ -9708,7 +9732,7 @@ declare void @llvm.lifetime.end.p0(ptr captures(none)) #14 declare void @llvm.experimental.noalias.scope.decl(metadata) #15 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #16 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #16 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i8 @llvm.umin.i8(i8, i8) #16 diff --git a/bench/tls-rs/optimized/4klah4jfox7oqufu.ll b/bench/tls-rs/optimized/4klah4jfox7oqufu.ll index 757ea9f1afd..8a7eb0e626a 100644 --- a/bench/tls-rs/optimized/4klah4jfox7oqufu.ll +++ b/bench/tls-rs/optimized/4klah4jfox7oqufu.ll @@ -3085,7 +3085,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6max_by17h16b41a9bbd3e20dbE.llvm.9964311202002838858(i64 noundef %0, i64 noundef %1) unnamed_addr #3 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umax.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %0, i64 %1 ret i64 %.0.sroa.speculated } @@ -6278,7 +6281,10 @@ define hidden void @"_ZN5alloc3vec16Vec$LT$T$C$A$GT$9shrink_to17h3286ab676ab2cfb 5: ; preds = %2 %6 = getelementptr inbounds nuw i8, ptr %0, i64 16 %7 = load i64, ptr %6, align 8, !noundef !4 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %7, i64 %1) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %7, i64 %1) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %7, i64 %1 %8 = tail call { i64, i64 } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$6shrink17h0b187ebf920d58a9E"(ptr noalias noundef nonnull align 8 dereferenceable(16) %0, i64 noundef %.0.sroa.speculated.i) %9 = extractvalue { i64, i64 } %8, 0 switch i64 %9, label %11 [ @@ -14478,8 +14484,11 @@ define hidden void @"_ZN71_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$rustls..msgs. %.sroa.4.0.insert.shift.i = shl nuw nsw i32 %.sroa.4.0.insert.ext.i, 8 %.sroa.4.0.insert.insert.i = or disjoint i32 %27, %.sroa.4.0.insert.shift.i %28 = tail call i32 @llvm.bswap.i32(i32 %.sroa.4.0.insert.insert.i) - %29 = tail call i32 @llvm.umin.i32(i32 %28, i32 65536) - %.0.sroa.speculated.i = zext nneg i32 %29 to i64 + %29 = zext nneg i32 %28 to i64 + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 range(i64 0, 4294967296) %29, i64 65536) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 65536, i64 %29 call void @llvm.lifetime.start.p0(ptr nonnull %6) tail call void @llvm.experimental.noalias.scope.decl(metadata !3172) tail call void @llvm.experimental.noalias.scope.decl(metadata !3175) @@ -14488,7 +14497,7 @@ define hidden void @"_ZN71_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$rustls..msgs. br i1 %31, label %46, label %32 32: ; preds = %21 - %33 = add i64 %14, %.0.sroa.speculated.i + %33 = add i64 %.0.sroa.speculated.i, %14 store i64 %33, ptr %9, align 8, !alias.scope !3178, !noalias !3179 %34 = icmp ugt i64 %14, %33 br i1 %34, label %37, label %35 @@ -14528,7 +14537,7 @@ define hidden void @"_ZN71_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$rustls..msgs. store ptr inttoptr (i64 8 to ptr), ptr %43, align 8 %44 = getelementptr inbounds nuw i8, ptr %5, i64 16 store i64 0, ptr %44, align 8 - %.not = icmp eq i32 %.sroa.4.0.insert.insert.i, 0 + %.not = icmp eq i64 %.0.sroa.speculated.i, 0 br i1 %.not, label %._crit_edge, label %.lr.ph .lr.ph: ; preds = %41 @@ -14894,8 +14903,11 @@ define hidden void @"_ZN71_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$rustls..msgs. %.sroa.4.0.insert.shift.i = shl nuw nsw i32 %.sroa.4.0.insert.ext.i, 8 %.sroa.4.0.insert.insert.i = or disjoint i32 %27, %.sroa.4.0.insert.shift.i %28 = tail call i32 @llvm.bswap.i32(i32 %.sroa.4.0.insert.insert.i) - %29 = tail call i32 @llvm.umin.i32(i32 %28, i32 65536) - %.0.sroa.speculated.i = zext nneg i32 %29 to i64 + %29 = zext nneg i32 %28 to i64 + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 range(i64 0, 4294967296) %29, i64 65536) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 65536, i64 %29 call void @llvm.lifetime.start.p0(ptr nonnull %6) tail call void @llvm.experimental.noalias.scope.decl(metadata !3245) tail call void @llvm.experimental.noalias.scope.decl(metadata !3248) @@ -14904,7 +14916,7 @@ define hidden void @"_ZN71_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$rustls..msgs. br i1 %31, label %45, label %32 32: ; preds = %21 - %33 = add i64 %14, %.0.sroa.speculated.i + %33 = add i64 %.0.sroa.speculated.i, %14 store i64 %33, ptr %9, align 8, !alias.scope !3251, !noalias !3252 %34 = icmp ugt i64 %14, %33 br i1 %34, label %37, label %35 @@ -14944,7 +14956,7 @@ define hidden void @"_ZN71_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$rustls..msgs. store ptr inttoptr (i64 8 to ptr), ptr %43, align 8 %44 = getelementptr inbounds nuw i8, ptr %5, i64 16 store i64 0, ptr %44, align 8 - %.not = icmp eq i32 %.sroa.4.0.insert.insert.i, 0 + %.not = icmp eq i64 %.0.sroa.speculated.i, 0 br i1 %.not, label %._crit_edge, label %.lr.ph .lr.ph: ; preds = %41 @@ -18167,12 +18179,6 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #35 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #33 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #33 - -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i32 @llvm.umin.i32(i32, i32) #33 - ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i8 @llvm.umin.i8(i8, i8) #33 diff --git a/bench/tokenizers-rs/optimized/1w676x6x6lprwvn5.ll b/bench/tokenizers-rs/optimized/1w676x6x6lprwvn5.ll index 91e8837fdb1..056991d230c 100644 --- a/bench/tokenizers-rs/optimized/1w676x6x6lprwvn5.ll +++ b/bench/tokenizers-rs/optimized/1w676x6x6lprwvn5.ll @@ -1546,7 +1546,10 @@ _ZN4core5slice6memchr12memchr_naive17h89d8dd2667be9f97E.exit.i.i: ; preds = %36, %54 = load i64, ptr %12, align 8, !alias.scope !112, !noalias !115, !noundef !9 %55 = add i64 %54, %16 %56 = load i64, ptr %13, align 8, !alias.scope !112, !noalias !115, !noundef !9 - %.0.sroa.speculated.i.i.i.i = call noundef i64 @llvm.umin.i64(i64 %55, i64 %56) + %.0.sroa.speculated.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %55, i64 %56) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i = select i1 %switch.i.i.i.i, i64 %56, i64 %55 store i64 %.0.sroa.speculated.i.i.i.i, ptr %12, align 8, !alias.scope !112, !noalias !115 %57 = add i64 %16, %.0.ph.i.i %58 = icmp eq i64 %16, 0 @@ -1608,8 +1611,11 @@ _ZN4core5slice6memchr12memchr_naive17h89d8dd2667be9f97E.exit.i.i: ; preds = %36, %77 = load i64, ptr %12, align 8, !alias.scope !128, !noalias !115, !noundef !9 %78 = add i64 %77, %62 %79 = load i64, ptr %13, align 8, !alias.scope !128, !noalias !115, !noundef !9 - %.0.sroa.speculated.i.i25.i.i = call noundef i64 @llvm.umin.i64(i64 %78, i64 %79) - store i64 %.0.sroa.speculated.i.i25.i.i, ptr %12, align 8, !alias.scope !128, !noalias !115 + %.0.sroa.speculated.i.i25.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %78, i64 %79) + %.off.i.i26.i.i = add nsw i8 %.0.sroa.speculated.i.i25.i.i, -1 + %switch.i.i27.i.i = icmp ult i8 %.off.i.i26.i.i, -2 + %.0.sroa.speculated.i.i28.i.i = select i1 %switch.i.i27.i.i, i64 %79, i64 %78 + store i64 %.0.sroa.speculated.i.i28.i.i, ptr %12, align 8, !alias.scope !128, !noalias !115 %80 = add i64 %62, %.0.ph.i.i br label %.loopexit.i.i @@ -26421,7 +26427,7 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #44 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #42 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #42 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.usub.sat.i64(i64, i64) #42 @@ -26429,6 +26435,9 @@ declare i64 @llvm.usub.sat.i64(i64, i64) #42 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare double @llvm.fabs.f64(double) #42 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare i64 @llvm.umin.i64(i64, i64) #42 + attributes #0 = { inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { alwaysinline nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/tokenizers-rs/optimized/58hth72z9dib25am.ll b/bench/tokenizers-rs/optimized/58hth72z9dib25am.ll index fe8b5a2b948..4ef785b46dc 100644 --- a/bench/tokenizers-rs/optimized/58hth72z9dib25am.ll +++ b/bench/tokenizers-rs/optimized/58hth72z9dib25am.ll @@ -29082,7 +29082,10 @@ define void @"_ZN106_$LT$tokenizers..pre_tokenizers..byte_level..ByteLevel$u20$a .noexc26: ; preds = %.noexc %56 = load i64, ptr %12, align 8, !noalias !7391, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %12), !noalias !7391 - %.0.sroa.speculated.i.i.i.i.i = call noundef i64 @llvm.umin.i64(i64 %55, i64 %56) + %.0.sroa.speculated.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %55, i64 %56) + %.off.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i.i = select i1 %switch.i.i.i.i.i, i64 %56, i64 %55 %57 = load ptr, ptr %15, align 8, !noalias !7387, !nonnull !4, !noundef !4 %58 = load ptr, ptr %27, align 8, !noalias !7387, !noundef !4 store ptr %57, ptr %16, align 8, !alias.scope !7394, !noalias !7395 @@ -29178,7 +29181,10 @@ _ZN10tokenizers9tokenizer8encoding8Encoding15set_sequence_id17hb7c26fd98fbbf98aE .noexc30: ; preds = %.noexc29 %84 = load i64, ptr %5, align 8, !noalias !7434, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !7434 - %.0.sroa.speculated.i.i.i.i.i.i.i = call noundef i64 @llvm.umin.i64(i64 %83, i64 %84) + %.0.sroa.speculated.i.i.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %83, i64 %84) + %.off.i.i.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i.i.i.i = select i1 %switch.i.i.i.i.i.i.i, i64 %84, i64 %83 %85 = load ptr, ptr %8, align 8, !noalias !7430, !nonnull !4, !noundef !4 %86 = load ptr, ptr %35, align 8, !noalias !7430, !noundef !4 store ptr %85, ptr %9, align 8, !alias.scope !7437, !noalias !7438 @@ -29253,7 +29259,10 @@ define void @_ZN10tokenizers14pre_tokenizers10byte_level15process_offsets17h7dd0 call void @"_ZN94_$LT$core..slice..iter..IterMut$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h3ef740ddbca988e4E.llvm.13080012565599917794"(ptr noalias noundef nonnull sret([24 x i8]) align 8 captures(none) dereferenceable(24) %3, ptr noalias noundef nonnull readonly align 8 dereferenceable(16) %5), !noalias !7457 %23 = load i64, ptr %3, align 8, !noalias !7461, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %3), !noalias !7461 - %.0.sroa.speculated.i.i.i.i = call noundef i64 @llvm.umin.i64(i64 %22, i64 %23) + %.0.sroa.speculated.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %22, i64 %23) + %.off.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i = select i1 %switch.i.i.i.i, i64 %23, i64 %22 %24 = load ptr, ptr %6, align 8, !noalias !7457, !nonnull !4, !noundef !4 %25 = load ptr, ptr %20, align 8, !noalias !7457, !noundef !4 store ptr %24, ptr %7, align 8, !alias.scope !7464, !noalias !7465 @@ -29628,7 +29637,10 @@ define void @"_ZN107_$LT$tokenizers..processors..roberta..RobertaProcessing$u20$ .noexc31: ; preds = %.noexc %61 = load i64, ptr %13, align 8, !noalias !7512, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %13), !noalias !7512 - %.0.sroa.speculated.i.i.i.i.i = call noundef i64 @llvm.umin.i64(i64 %60, i64 %61) + %.0.sroa.speculated.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %60, i64 %61) + %.off.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i.i = select i1 %switch.i.i.i.i.i, i64 %61, i64 %60 %62 = load ptr, ptr %16, align 8, !noalias !7508, !nonnull !4, !noundef !4 %63 = load ptr, ptr %30, align 8, !noalias !7508, !noundef !4 store ptr %62, ptr %17, align 8, !alias.scope !7515, !noalias !7516 @@ -29823,7 +29835,10 @@ define void @"_ZN107_$LT$tokenizers..processors..roberta..RobertaProcessing$u20$ .noexc39: ; preds = %.noexc38 %118 = load i64, ptr %5, align 8, !noalias !7574, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !7574 - %.0.sroa.speculated.i.i.i.i.i.i.i = call noundef i64 @llvm.umin.i64(i64 %117, i64 %118) + %.0.sroa.speculated.i.i.i.i.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %117, i64 %118) + %.off.i.i.i.i.i.i.i = add nsw i8 %.0.i.i.i.i.i.i.i.i.i, -1 + %switch.i.i.i.i.i.i.i = icmp ult i8 %.off.i.i.i.i.i.i.i, -2 + %.0.sroa.speculated.i.i.i.i.i.i.i = select i1 %switch.i.i.i.i.i.i.i, i64 %118, i64 %117 %119 = load ptr, ptr %8, align 8, !noalias !7570, !nonnull !4, !noundef !4 %120 = load ptr, ptr %38, align 8, !noalias !7570, !noundef !4 store ptr %119, ptr %9, align 8, !alias.scope !7577, !noalias !7578 @@ -37266,7 +37281,7 @@ declare i64 @llvm.usub.sat.i64(i64, i64) #33 declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #36 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #33 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #33 ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: readwrite) declare void @llvm.memmove.p0.p0.i64(ptr writeonly captures(none), ptr readonly captures(none), i64, i1 immarg) #37 diff --git a/bench/tokio-rs/optimized/5cdni0zdopovrkgi.ll b/bench/tokio-rs/optimized/5cdni0zdopovrkgi.ll index a95ca01233e..5491458a26a 100644 --- a/bench/tokio-rs/optimized/5cdni0zdopovrkgi.ll +++ b/bench/tokio-rs/optimized/5cdni0zdopovrkgi.ll @@ -10469,10 +10469,9 @@ define { i64, i32 } @_ZN5tokio4time8interval8Interval9poll_tick17h3ccd193c126e82 tail call void @llvm.experimental.noalias.scope.decl(metadata !1736) %9 = load ptr, ptr %8, align 8, !alias.scope !1739, !noalias !1742, !nonnull !5, !align !45, !noundef !5 %10 = tail call noundef i8 @_ZN5tokio4time5sleep5Sleep12poll_elapsed17h3ffd96ef949876a5E.llvm.10338052584253536188(ptr noundef nonnull align 8 %9, ptr noalias noundef nonnull align 8 dereferenceable(8) %1), !range !1744, !noalias !1736 - switch i8 %10, label %11 [ - i8 4, label %65 - i8 0, label %13 - ] + %.off.i.i = add nsw i8 %10, -1 + %switch.i.i = icmp ult i8 %.off.i.i, 3 + br i1 %switch.i.i, label %11, label %13 11: ; preds = %2 call void @llvm.lifetime.start.p0(ptr nonnull %7), !noalias !1745 @@ -10487,6 +10486,10 @@ define { i64, i32 } @_ZN5tokio4time8interval8Interval9poll_tick17h3ccd193c126e82 unreachable 13: ; preds = %2 + %.not = icmp eq i8 %10, 4 + br i1 %.not, label %65, label %13 + +13: ; preds = %"_ZN72_$LT$core..pin..Pin$LT$P$GT$$u20$as$u20$core..future..future..Future$GT$4poll17h2b6896cb7d98c60dE.exit" %14 = getelementptr inbounds nuw i8, ptr %9, i64 16 %15 = load i64, ptr %14, align 8, !noundef !5 %16 = getelementptr inbounds nuw i8, ptr %9, i64 24 @@ -10600,9 +10603,9 @@ _ZN5tokio4time8interval18MissedTickBehavior12next_timeout17h96cfaac423d9087fE.ex call void @_ZN5tokio7runtime4time5entry10TimerEntry5reset17hdc331dc409af032fE(ptr noundef nonnull align 8 %9, i64 noundef %.sroa.015.0, i32 noundef %.sroa.3.0, i1 noundef zeroext false) br label %65 -65: ; preds = %2, %_ZN5tokio4time8interval18MissedTickBehavior12next_timeout17h96cfaac423d9087fE.exit - %.sroa.2.0 = phi i32 [ %17, %_ZN5tokio4time8interval18MissedTickBehavior12next_timeout17h96cfaac423d9087fE.exit ], [ 1000000000, %2 ] - %.sroa.0.0 = phi i64 [ %15, %_ZN5tokio4time8interval18MissedTickBehavior12next_timeout17h96cfaac423d9087fE.exit ], [ undef, %2 ] +65: ; preds = %13, %_ZN5tokio4time8interval18MissedTickBehavior12next_timeout17h96cfaac423d9087fE.exit + %.sroa.2.0 = phi i32 [ %17, %_ZN5tokio4time8interval18MissedTickBehavior12next_timeout17h96cfaac423d9087fE.exit ], [ 1000000000, %"_ZN72_$LT$core..pin..Pin$LT$P$GT$$u20$as$u20$core..future..future..Future$GT$4poll17h2b6896cb7d98c60dE.exit" ] + %.sroa.0.0 = phi i64 [ %15, %_ZN5tokio4time8interval18MissedTickBehavior12next_timeout17h96cfaac423d9087fE.exit ], [ undef, %"_ZN72_$LT$core..pin..Pin$LT$P$GT$$u20$as$u20$core..future..future..Future$GT$4poll17h2b6896cb7d98c60dE.exit" ] %66 = insertvalue { i64, i32 } poison, i64 %.sroa.0.0, 0 %67 = insertvalue { i64, i32 } %66, i32 %.sroa.2.0, 1 ret { i64, i32 } %67 diff --git a/bench/tree-sitter-rs/optimized/99e7gbsiai38vp2.ll b/bench/tree-sitter-rs/optimized/99e7gbsiai38vp2.ll index e9babc51e86..36fe2bcdfe8 100644 --- a/bench/tree-sitter-rs/optimized/99e7gbsiai38vp2.ll +++ b/bench/tree-sitter-rs/optimized/99e7gbsiai38vp2.ll @@ -7824,10 +7824,8 @@ define hidden void @"_ZN4core3ptr324drop_in_place$LT$either..Either$LT$core..ite 4: ; preds = %1 %5 = getelementptr inbounds nuw i8, ptr %0, i64 8 %6 = load i64, ptr %5, align 8, !range !136, !alias.scope !3203, !noundef !4 - switch i64 %6, label %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit.sink.split" [ - i64 -9223372036854775808, label %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit" - i64 0, label %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit" - ] + %switch = icmp sgt i64 %6, 0 + br i1 %switch, label %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit.sink.split", label %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit" 7: ; preds = %1 tail call void @llvm.experimental.noalias.scope.decl(metadata !3212) @@ -7894,7 +7892,7 @@ define hidden void @"_ZN4core3ptr324drop_in_place$LT$either..Either$LT$core..ite tail call void @__rust_dealloc(ptr noundef nonnull %33, i64 noundef %.sink7, i64 noundef 1) #24, !noalias !4 br label %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit" -"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit": ; preds = %4, %4, %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit.sink.split", %"_ZN4core3ptr78drop_in_place$LT$alloc..vec..into_iter..IntoIter$LT$std..path..PathBuf$GT$$GT$17h83383ba726344b72E.llvm.6766350830065688733.exit.i" +"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit": ; preds = %4, %"_ZN4core3ptr78drop_in_place$LT$core..iter..sources..once..Once$LT$std..path..PathBuf$GT$$GT$17h112c12cdf7bb3bd4E.llvm.6766350830065688733.exit.sink.split", %"_ZN4core3ptr78drop_in_place$LT$alloc..vec..into_iter..IntoIter$LT$std..path..PathBuf$GT$$GT$17h83383ba726344b72E.llvm.6766350830065688733.exit.i" ret void } @@ -9097,10 +9095,8 @@ define hidden void @"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$1 12: ; preds = %1 %13 = getelementptr inbounds nuw i8, ptr %0, i64 8 %14 = load i64, ptr %13, align 8, !range !136, !alias.scope !3946, !noundef !4 - switch i64 %14, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split" [ - i64 -9223372036854775808, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit" - i64 0, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit" - ] + %switch = icmp sgt i64 %14, 0 + br i1 %switch, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split", label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit" "_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split": ; preds = %12, %10, %6 %.sink = phi i64 [ 16, %6 ], [ 8, %10 ], [ 16, %12 ] @@ -9110,7 +9106,7 @@ define hidden void @"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$1 tail call void @__rust_dealloc(ptr noundef nonnull %16, i64 noundef %.sink4, i64 noundef 1) #24, !noalias !4 br label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit" -"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit": ; preds = %12, %12, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split", %10, %6, %1, %1 +"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit": ; preds = %12, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split", %10, %6, %1, %1 ret void } @@ -11664,10 +11660,8 @@ define internal fastcc void @"_ZN4core3ptr57drop_in_place$LT$std..sys_common..pr %16 = getelementptr inbounds nuw i8, ptr %9, i64 272 %17 = getelementptr inbounds { [3 x i64] }, ptr %16, i64 %.sroa.23.0.copyload.i.i.i.i %.val.i.i.i.i.i = load i64, ptr %17, align 8, !range !136, !noalias !5188, !noundef !4 - switch i64 %.val.i.i.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i.i" [ - i64 -9223372036854775808, label %"_ZN5alloc11collections5btree4node173Handle$LT$alloc..collections..btree..node..NodeRef$LT$alloc..collections..btree..node..marker..Dying$C$K$C$V$C$NodeType$GT$$C$alloc..collections..btree..node..marker..KV$GT$12drop_key_val17h48cb9d47f88a99a7E.exit.i.i.i.i" - i64 0, label %"_ZN5alloc11collections5btree4node173Handle$LT$alloc..collections..btree..node..NodeRef$LT$alloc..collections..btree..node..marker..Dying$C$K$C$V$C$NodeType$GT$$C$alloc..collections..btree..node..marker..KV$GT$12drop_key_val17h48cb9d47f88a99a7E.exit.i.i.i.i" - ] + %switch.i.i.i.i.i = icmp sgt i64 %.val.i.i.i.i.i, 0 + br i1 %switch.i.i.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i.i", label %"_ZN5alloc11collections5btree4node173Handle$LT$alloc..collections..btree..node..NodeRef$LT$alloc..collections..btree..node..marker..Dying$C$K$C$V$C$NodeType$GT$$C$alloc..collections..btree..node..marker..KV$GT$12drop_key_val17h48cb9d47f88a99a7E.exit.i.i.i.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i.i": ; preds = %"_ZN4core3ptr47drop_in_place$LT$std..ffi..os_str..OsString$GT$17h834e557ec181e969E.exit.i.i.i.i.i" %18 = getelementptr i8, ptr %17, i64 8 @@ -11675,7 +11669,7 @@ define internal fastcc void @"_ZN4core3ptr57drop_in_place$LT$std..sys_common..pr call void @__rust_dealloc(ptr noundef nonnull %.val1.i.i.i.i.i, i64 noundef %.val.i.i.i.i.i, i64 noundef 1) #24, !noalias !5220 br label %"_ZN5alloc11collections5btree4node173Handle$LT$alloc..collections..btree..node..NodeRef$LT$alloc..collections..btree..node..marker..Dying$C$K$C$V$C$NodeType$GT$$C$alloc..collections..btree..node..marker..KV$GT$12drop_key_val17h48cb9d47f88a99a7E.exit.i.i.i.i" -"_ZN5alloc11collections5btree4node173Handle$LT$alloc..collections..btree..node..NodeRef$LT$alloc..collections..btree..node..marker..Dying$C$K$C$V$C$NodeType$GT$$C$alloc..collections..btree..node..marker..KV$GT$12drop_key_val17h48cb9d47f88a99a7E.exit.i.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i.i", %"_ZN4core3ptr47drop_in_place$LT$std..ffi..os_str..OsString$GT$17h834e557ec181e969E.exit.i.i.i.i.i", %"_ZN4core3ptr47drop_in_place$LT$std..ffi..os_str..OsString$GT$17h834e557ec181e969E.exit.i.i.i.i.i" +"_ZN5alloc11collections5btree4node173Handle$LT$alloc..collections..btree..node..NodeRef$LT$alloc..collections..btree..node..marker..Dying$C$K$C$V$C$NodeType$GT$$C$alloc..collections..btree..node..marker..KV$GT$12drop_key_val17h48cb9d47f88a99a7E.exit.i.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i.i", %"_ZN4core3ptr47drop_in_place$LT$std..ffi..os_str..OsString$GT$17h834e557ec181e969E.exit.i.i.i.i.i" call void @llvm.lifetime.end.p0(ptr nonnull %2), !noalias !5194 call void @llvm.lifetime.start.p0(ptr nonnull %2), !noalias !5194 call void @"_ZN5alloc11collections5btree3map25IntoIter$LT$K$C$V$C$A$GT$10dying_next17h48d1ac078689424dE"(ptr noalias noundef nonnull sret({ ptr, [2 x i64] }) align 8 captures(none) dereferenceable(24) %2, ptr noalias noundef nonnull align 8 dereferenceable(72) %3), !noalias !5188 @@ -14698,10 +14692,8 @@ define hidden void @"_ZN4core3ptr74drop_in_place$LT$alloc..vec..Vec$LT$std..back tail call void @llvm.experimental.noalias.scope.decl(metadata !6703) %13 = getelementptr inbounds nuw i8, ptr %11, i64 32 %.val.i.i.i.i.i.i = load i64, ptr %13, align 8, !range !136, !alias.scope !6706, !noalias !6699, !noundef !4 - switch i64 %.val.i.i.i.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$alloc..vec..Vec$LT$u8$GT$$GT$$GT$17h65bd044572ce8470E.exit.i.i.i.i.i.i" - i64 0, label %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$alloc..vec..Vec$LT$u8$GT$$GT$$GT$17h65bd044572ce8470E.exit.i.i.i.i.i.i" - ] + %switch.i.i.i.i.i.i = icmp sgt i64 %.val.i.i.i.i.i.i, 0 + br i1 %switch.i.i.i.i.i.i, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i", label %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$alloc..vec..Vec$LT$u8$GT$$GT$$GT$17h65bd044572ce8470E.exit.i.i.i.i.i.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i": ; preds = %.lr.ph.i.i.i.i.i %14 = getelementptr inbounds nuw i8, ptr %11, i64 40 @@ -14709,7 +14701,7 @@ define hidden void @"_ZN4core3ptr74drop_in_place$LT$alloc..vec..Vec$LT$std..back tail call void @__rust_dealloc(ptr noundef nonnull %.val1.i.i.i.i.i.i, i64 noundef %.val.i.i.i.i.i.i, i64 noundef 1) #24, !noalias !6707 br label %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$alloc..vec..Vec$LT$u8$GT$$GT$$GT$17h65bd044572ce8470E.exit.i.i.i.i.i.i" -"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$alloc..vec..Vec$LT$u8$GT$$GT$$GT$17h65bd044572ce8470E.exit.i.i.i.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i", %.lr.ph.i.i.i.i.i, %.lr.ph.i.i.i.i.i +"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$alloc..vec..Vec$LT$u8$GT$$GT$$GT$17h65bd044572ce8470E.exit.i.i.i.i.i.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$10deallocate17hae8e459b587c5295E.llvm.6766350830065688733.exit.i.i1.i.i.i.i.i.i.i.i", %.lr.ph.i.i.i.i.i tail call void @llvm.experimental.noalias.scope.decl(metadata !6714) %15 = load i64, ptr %11, align 8, !range !647, !alias.scope !6717, !noalias !6699, !noundef !4 %16 = icmp eq i64 %15, 2 @@ -15252,10 +15244,8 @@ _ZN3std10sys_common4once5futex4Once5state17h8c3bb1db7dfb2918E.llvm.6766350830065 31: ; preds = %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$std..backtrace..Backtrace$GT$$GT$17ha74d2c433b795aceE.llvm.6766350830065688733.exit" %32 = getelementptr inbounds nuw i8, ptr %0, i64 64 %33 = load i64, ptr %32, align 8, !range !136, !alias.scope !6932, !noundef !4 - switch i64 %33, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split.i" [ - i64 -9223372036854775808, label %"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$17hdcd0aac04377158fE.llvm.6766350830065688733.exit" - i64 0, label %"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$17hdcd0aac04377158fE.llvm.6766350830065688733.exit" - ] + %switch = icmp sgt i64 %33, 0 + br i1 %switch, label %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split.i", label %"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$17hdcd0aac04377158fE.llvm.6766350830065688733.exit" "_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split.i": ; preds = %31, %29, %25 %.sink.i = phi i64 [ 16, %25 ], [ 8, %29 ], [ 16, %31 ] @@ -15265,7 +15255,7 @@ _ZN3std10sys_common4once5futex4Once5state17h8c3bb1db7dfb2918E.llvm.6766350830065 tail call void @__rust_dealloc(ptr noundef nonnull %35, i64 noundef %.sink4.i, i64 noundef 1) #24, !noalias !6916 br label %"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$17hdcd0aac04377158fE.llvm.6766350830065688733.exit" -"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$17hdcd0aac04377158fE.llvm.6766350830065688733.exit": ; preds = %31, %31, %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$std..backtrace..Backtrace$GT$$GT$17ha74d2c433b795aceE.llvm.6766350830065688733.exit", %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$std..backtrace..Backtrace$GT$$GT$17ha74d2c433b795aceE.llvm.6766350830065688733.exit", %25, %29, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split.i" +"_ZN4core3ptr44drop_in_place$LT$tree_sitter_tags..Error$GT$17hdcd0aac04377158fE.llvm.6766350830065688733.exit": ; preds = %31, %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$std..backtrace..Backtrace$GT$$GT$17ha74d2c433b795aceE.llvm.6766350830065688733.exit", %"_ZN4core3ptr74drop_in_place$LT$core..option..Option$LT$std..backtrace..Backtrace$GT$$GT$17ha74d2c433b795aceE.llvm.6766350830065688733.exit", %25, %29, %"_ZN4core3ptr42drop_in_place$LT$alloc..string..String$GT$17h26eb43a31b673935E.exit.sink.split.i" ret void } diff --git a/bench/tree-sitter-rs/optimized/sw0aazrl08me20d.ll b/bench/tree-sitter-rs/optimized/sw0aazrl08me20d.ll index 1a7f31b12f4..7f169a9da26 100644 --- a/bench/tree-sitter-rs/optimized/sw0aazrl08me20d.ll +++ b/bench/tree-sitter-rs/optimized/sw0aazrl08me20d.ll @@ -32,7 +32,10 @@ define hidden void @"_ZN111_$LT$core..iter..adapters..zip..Zip$LT$A$C$B$GT$$u20$ %11 = ptrtoint ptr %4 to i64 %12 = ptrtoint ptr %3 to i64 %13 = sub nuw i64 %11, %12 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %9, i64 %13) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %9, i64 %13) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %13, i64 %9 store ptr %1, ptr %0, align 8 %14 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %14, align 8 @@ -68,7 +71,10 @@ define hidden noundef range(i8 -1, 2) i8 @"_ZN4core3cmp5impls50_$LT$impl$u20$cor ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6min_by17h539dc6b9d6b2204bE.llvm.10656028015950752036(i64 noundef %0, i64 noundef %1) unnamed_addr #3 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.0.sroa.speculated } @@ -1357,7 +1363,10 @@ _ZN4core3ops8function5FnMut8call_mut17h4af8ed04e0d01e85E.exit.i.i: ; preds = %12 %140 = ptrtoint ptr %.1151.i.i to i64 %141 = ptrtoint ptr %.1147.i.i to i64 %142 = sub i64 %140, %141 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %139, i64 %142) + %.0.sroa.speculated.i.i.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %139, i64 %142) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %142, i64 %139 %.not.i.i = icmp eq i64 %.0.sroa.speculated.i.i.i, 0 br i1 %.not.i.i, label %157, label %161 @@ -1534,7 +1543,10 @@ _ZN4core3ops8function5FnMut8call_mut17h4af8ed04e0d01e85E.exit175.i.i: ; preds = call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(32) %213, ptr noundef nonnull align 8 dereferenceable(32) %.sroa.0.i38.i, i64 32, i1 false), !noalias !401 call void @llvm.lifetime.end.p0(ptr nonnull %.sroa.0.i38.i) %214 = sub nuw i64 %.sroa.14.0107.lcssa130, %209 - %.0.sroa.speculated.i = call noundef i64 @llvm.umin.i64(i64 %209, i64 %214) + %.0.sroa.speculated.i = call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %209, i64 %214) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %214, i64 %209 %215 = lshr i64 %.sroa.14.0107.lcssa130, 3 %216 = icmp uge i64 %.0.sroa.speculated.i, %215 %217 = getelementptr inbounds nuw i8, ptr %213, i64 32 diff --git a/bench/turborepo-rs/optimized/667fw7b0fgqo2a1672jmft41u.ll b/bench/turborepo-rs/optimized/667fw7b0fgqo2a1672jmft41u.ll index 21a691aa13b..ba9ed5d33b8 100644 --- a/bench/turborepo-rs/optimized/667fw7b0fgqo2a1672jmft41u.ll +++ b/bench/turborepo-rs/optimized/667fw7b0fgqo2a1672jmft41u.ll @@ -202,13 +202,19 @@ _RNCNvMs3_NtNtNtCs1LoaDTb72WA_4core4iter8adapters8peekableINtB7_8PeekableINtNtB9 ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_RINvNtCs1LoaDTb72WA_4core3cmp6max_byjNvYjNtB2_3Ord3cmpECseG2FYMysgNb_3wax.llvm.2038835765883349039(i64 noundef %0, i64 noundef %1) unnamed_addr #3 personality ptr @rust_eh_personality { - %.sroa.0.0.sroa.speculated = tail call i64 @llvm.umax.i64(i64 %0, i64 %1) + %.sroa.0.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %3, -1 + %switch = icmp ult i8 %.off, -2 + %.sroa.0.0.sroa.speculated = select i1 %switch, i64 %0, i64 %1 ret i64 %.sroa.0.0.sroa.speculated } ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_RINvNtCs1LoaDTb72WA_4core3cmp6min_byjNvYjNtB2_3Ord3cmpECseG2FYMysgNb_3wax.llvm.2038835765883349039(i64 noundef %0, i64 noundef %1) unnamed_addr #3 personality ptr @rust_eh_personality { - %.sroa.0.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.sroa.0.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %3, -1 + %switch = icmp ult i8 %.off, -2 + %.sroa.0.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.sroa.0.0.sroa.speculated } @@ -3053,18 +3059,24 @@ define hidden void @_ZN4core4hint21unreachable_unchecked18precondition_check17hb define { i64, i64 } @_RNvXNtCseG2FYMysgNb_3wax11diagnosticsTjjENtB2_7SpanExt5union(ptr noalias noundef readonly align 8 captures(none) dereferenceable(16) %0, ptr noalias noundef readonly align 8 captures(none) dereferenceable(16) %1) unnamed_addr #18 personality ptr @rust_eh_personality { %3 = load i64, ptr %0, align 8, !noundef !5 %4 = load i64, ptr %1, align 8, !noundef !5 - %.sroa.0.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %3, i64 %4) - %5 = getelementptr inbounds nuw i8, ptr %0, i64 8 - %6 = load i64, ptr %5, align 8, !noundef !5 - %7 = add i64 %6, %3 - %8 = getelementptr inbounds nuw i8, ptr %1, i64 8 + %.sroa.0.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %3, i64 %4) + %.off.i = add nsw i8 %5, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.sroa.0.0.sroa.speculated.i = select i1 %switch.i, i64 %4, i64 %3 + %8 = getelementptr inbounds nuw i8, ptr %0, i64 8 %9 = load i64, ptr %8, align 8, !noundef !5 - %10 = add i64 %9, %4 - %.sroa.0.0.sroa.speculated.i1 = tail call noundef i64 @llvm.umax.i64(i64 %7, i64 %10) - %11 = sub i64 %.sroa.0.0.sroa.speculated.i1, %.sroa.0.0.sroa.speculated.i - %12 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0.sroa.speculated.i, 0 - %13 = insertvalue { i64, i64 } %12, i64 %11, 1 - ret { i64, i64 } %13 + %10 = add i64 %9, %3 + %9 = getelementptr inbounds nuw i8, ptr %1, i64 8 + %10 = load i64, ptr %9, align 8, !noundef !5 + %11 = add i64 %10, %4 + %12 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %8, i64 %11) + %.off.i1 = add nsw i8 %12, -1 + %switch.i2 = icmp ult i8 %.off.i1, -2 + %.sroa.0.0.sroa.speculated.i3 = select i1 %switch.i2, i64 %8, i64 %11 + %13 = sub i64 %.sroa.0.0.sroa.speculated.i3, %.sroa.0.0.sroa.speculated.i + %14 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0.sroa.speculated.i, 0 + %15 = insertvalue { i64, i64 } %14, i64 %13, 1 + ret { i64, i64 } %15 } ; Function Attrs: mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: write) uwtable @@ -5247,12 +5259,6 @@ declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #31 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #32 -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umax.i64(i64, i64) #31 - -; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #31 - ; Function Attrs: nocallback nofree nounwind willreturn memory(argmem: write) declare void @llvm.memset.p0.i64(ptr writeonly captures(none), i8, i64, i1 immarg) #33 diff --git a/bench/turborepo-rs/optimized/cxpken39mq0tm7ezio1uwpc6m.ll b/bench/turborepo-rs/optimized/cxpken39mq0tm7ezio1uwpc6m.ll index 7f51e0b2277..3aee6a685da 100644 --- a/bench/turborepo-rs/optimized/cxpken39mq0tm7ezio1uwpc6m.ll +++ b/bench/turborepo-rs/optimized/cxpken39mq0tm7ezio1uwpc6m.ll @@ -16,7 +16,10 @@ define hidden noundef i64 @_RINvMNtCs1LoaDTb72WA_4core6optionINtB3_6OptionINtNtN ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_RINvNtCs1LoaDTb72WA_4core3cmp6min_byjNvYjNtB2_3Ord3cmpECs8mTrBI1stz4_15turborepo_vt100.llvm.10109814100354086291(i64 noundef %0, i64 noundef %1) unnamed_addr #0 personality ptr @rust_eh_personality { - %.sroa.0.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.sroa.0.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %3, -1 + %switch = icmp ult i8 %.off, -2 + %.sroa.0.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.sroa.0.0.sroa.speculated } @@ -264,33 +267,39 @@ define noundef i64 @_RNvXs1_NtNtNtCs68wO5nsWeTG_5alloc11collections9vec_deque4it %7 = ptrtoint ptr %5 to i64 %8 = sub nuw i64 %6, %7 %9 = lshr exact i64 %8, 5 - %.sroa.0.0.sroa.speculated.i.i = tail call noundef i64 @llvm.umin.i64(i64 %9, i64 %1) - %10 = getelementptr inbounds nuw { { { i64, ptr, {} }, i64 }, i8, [7 x i8] }, ptr %5, i64 %.sroa.0.0.sroa.speculated.i.i - store ptr %10, ptr %0, align 8, !alias.scope !104 - %.not = icmp ugt i64 %1, %9 - br i1 %.not, label %11, label %23 - -11: ; preds = %2 - %12 = sub i64 %1, %.sroa.0.0.sroa.speculated.i.i - %13 = getelementptr inbounds nuw i8, ptr %0, i64 16 - tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %0, ptr noundef nonnull align 8 dereferenceable(16) %13, i64 16, i1 false) - store ptr %10, ptr %13, align 8 - %14 = getelementptr inbounds nuw i8, ptr %0, i64 24 - store ptr %4, ptr %14, align 8 - %15 = load ptr, ptr %3, align 8, !alias.scope !107, !nonnull !5, !noundef !5 - %16 = load ptr, ptr %0, align 8, !alias.scope !107, !nonnull !5, !noundef !5 - %17 = ptrtoint ptr %15 to i64 - %18 = ptrtoint ptr %16 to i64 - %19 = sub nuw i64 %17, %18 - %20 = lshr exact i64 %19, 5 - %.sroa.0.0.sroa.speculated.i.i3 = tail call noundef i64 @llvm.umin.i64(i64 %20, i64 %12) - %21 = getelementptr inbounds nuw { { { i64, ptr, {} }, i64 }, i8, [7 x i8] }, ptr %16, i64 %.sroa.0.0.sroa.speculated.i.i3 - store ptr %21, ptr %0, align 8, !alias.scope !107 - %22 = sub i64 %12, %.sroa.0.0.sroa.speculated.i.i3 - br label %23 - -23: ; preds = %2, %11 - %.sroa.0.0 = phi i64 [ %22, %11 ], [ 0, %2 ] + %.sroa.0.0.sroa.speculated.i.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %9, i64 %1) + %.off.i.i = add nsw i8 %.sroa.0.0.sroa.speculated.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.sroa.0.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %1, i64 %9 + %11 = getelementptr inbounds { { { i64, ptr, {} }, i64 }, i8, [7 x i8] }, ptr %5, i64 %.sroa.0.0.sroa.speculated.i.i + store ptr %11, ptr %0, align 8, !alias.scope !104 + %12 = icmp eq i64 %1, %.sroa.0.0.sroa.speculated.i.i + br i1 %12, label %26, label %13 + +13: ; preds = %2 + %14 = sub i64 %1, %.sroa.0.0.sroa.speculated.i.i + %14 = getelementptr inbounds nuw i8, ptr %0, i64 16 + tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %0, ptr noundef nonnull align 8 dereferenceable(16) %15, i64 16, i1 false) + store ptr %11, ptr %15, align 8 + %16 = getelementptr inbounds nuw i8, ptr %0, i64 24 + store ptr %4, ptr %16, align 8 + %17 = load ptr, ptr %3, align 8, !alias.scope !107, !nonnull !5, !noundef !5 + %18 = load ptr, ptr %0, align 8, !alias.scope !107, !nonnull !5, !noundef !5 + %19 = ptrtoint ptr %17 to i64 + %20 = ptrtoint ptr %18 to i64 + %21 = sub nuw i64 %19, %20 + %22 = lshr exact i64 %21, 5 + %23 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %22, i64 %14) + %.off.i.i3 = add nsw i8 %23, -1 + %switch.i.i4 = icmp ult i8 %.off.i.i3, -2 + %.sroa.0.0.sroa.speculated.i.i5 = select i1 %switch.i.i4, i64 %14, i64 %22 + %24 = getelementptr inbounds { { { i64, ptr, {} }, i64 }, i8, [7 x i8] }, ptr %18, i64 %.sroa.0.0.sroa.speculated.i.i5 + store ptr %24, ptr %0, align 8, !alias.scope !107 + %25 = sub i64 %14, %.sroa.0.0.sroa.speculated.i.i5 + br label %26 + +26: ; preds = %2, %13 + %.sroa.0.0 = phi i64 [ %25, %13 ], [ 0, %2 ] ret i64 %.sroa.0.0 } @@ -303,11 +312,14 @@ define hidden noundef i64 @_RNvXs2U_NtNtCs1LoaDTb72WA_4core5slice4iterINtB6_4Ite %7 = ptrtoint ptr %5 to i64 %8 = sub nuw i64 %6, %7 %9 = lshr exact i64 %8, 5 - %.sroa.0.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %9, i64 %1) - %10 = getelementptr inbounds nuw { { { i64, ptr, {} }, i64 }, i8, [7 x i8] }, ptr %5, i64 %.sroa.0.0.sroa.speculated.i - store ptr %10, ptr %0, align 8 - %11 = sub i64 %1, %.sroa.0.0.sroa.speculated.i - ret i64 %11 + %.sroa.0.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %9, i64 %1) + %.off.i = add nsw i8 %.sroa.0.0.sroa.speculated.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.sroa.0.0.sroa.speculated.i = select i1 %switch.i, i64 %1, i64 %9 + %11 = getelementptr inbounds { { { i64, ptr, {} }, i64 }, i8, [7 x i8] }, ptr %5, i64 %.sroa.0.0.sroa.speculated.i + store ptr %11, ptr %0, align 8 + %12 = sub i64 %1, %.sroa.0.0.sroa.speculated.i + ret i64 %12 } ; Function Attrs: mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(argmem: readwrite, inaccessiblemem: readwrite) uwtable @@ -506,7 +518,7 @@ declare void @llvm.lifetime.start.p0(ptr captures(none)) #14 declare void @llvm.lifetime.end.p0(ptr captures(none)) #14 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #15 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #15 ; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) declare void @llvm.experimental.noalias.scope.decl(metadata) #16 diff --git a/bench/typst-rs/optimized/18i60ist7isq7y2m.ll b/bench/typst-rs/optimized/18i60ist7isq7y2m.ll index c8e2b909b06..ddb1ce982ea 100644 --- a/bench/typst-rs/optimized/18i60ist7isq7y2m.ll +++ b/bench/typst-rs/optimized/18i60ist7isq7y2m.ll @@ -6710,7 +6710,7 @@ define internal fastcc void @_ZN12typst_render11to_sk_paint17ha2304611818b8021E( %34 = getelementptr inbounds nuw i8, ptr %31, i64 89 store i8 0, ptr %34, align 1 %35 = load i32, ptr %1, align 8, !range !847, !noundef !37 - switch i32 %35, label %default.unreachable62 [ + switch i32 %35, label %default.unreachable65 [ i32 0, label %36 i32 1, label %47 i32 2, label %50 @@ -6873,17 +6873,23 @@ default.unreachable62: ; preds = %9 %93 = load float, ptr %84, align 8, !noundef !37 %94 = tail call float @llvm.ceil.f32(float %93) %95 = tail call i32 @llvm.fptoui.sat.i32.f32(float %94) - %.0.sroa.speculated.i = tail call noundef i32 @llvm.umax.i32(i32 %92, i32 %95) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32 %92, i32 %95) + %.off.i = add nsw i8 %.0.i.i.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i32 %92, i32 %95 %96 = fmul float %93, %89 %97 = tail call float @llvm.ceil.f32(float %96) %98 = tail call i32 @llvm.fptoui.sat.i32.f32(float %97) - %.0.sroa.speculated.i54 = tail call noundef i32 @llvm.umax.i32(i32 %98, i32 %95) + %.0.sroa.speculated.i54 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32 %98, i32 %95) + %.off.i55 = add nsw i8 %.0.i.i.i54, -1 + %switch.i56 = icmp ult i8 %.off.i55, -2 + %.0.sroa.speculated.i57 = select i1 %switch.i56, i32 %98, i32 %95 call void @llvm.lifetime.start.p0(ptr nonnull %11), !noalias !1108 store ptr %48, ptr %11, align 8, !noalias !1108 %.sroa.4.0..sroa_idx.i = getelementptr inbounds nuw i8, ptr %11, i64 8 store i32 %.0.sroa.speculated.i, ptr %.sroa.4.0..sroa_idx.i, align 8, !noalias !1108 %.sroa.5.0..sroa_idx.i = getelementptr inbounds nuw i8, ptr %11, i64 12 - store i32 %.0.sroa.speculated.i54, ptr %.sroa.5.0..sroa_idx.i, align 4, !noalias !1108 + store i32 %.0.sroa.speculated.i57, ptr %.sroa.5.0..sroa_idx.i, align 4, !noalias !1108 %.sroa.6.0..sroa_idx.i = getelementptr inbounds nuw i8, ptr %11, i64 16 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(40) %.sroa.6.0..sroa_idx.i, ptr noundef nonnull readonly align 8 dereferenceable(40) %8, i64 40, i1 false), !noalias !1112 %99 = invoke noundef nonnull ptr @_ZN6comemo5cache8memoized17h7dbd3d7a875918ffE(ptr noalias noundef nonnull align 8 captures(none) dereferenceable(56) %11, ptr noalias noundef nonnull readonly align 1 %10, ptr noundef nonnull align 8 @_ZN12typst_render11to_sk_paint6cached7__CACHE17h8947a3a65ecd3cb4E) @@ -7045,7 +7051,7 @@ default.unreachable62: ; preds = %9 158: ; preds = %152 invoke void @_ZN5alloc5alloc18handle_alloc_error17h836e982fea7018bdE(i64 noundef 8, i64 noundef 48) #19 - to label %.noexc57 unwind label %159 + to label %.noexc60 unwind label %159 .noexc57: ; preds = %158 unreachable @@ -7078,7 +7084,7 @@ default.unreachable62: ; preds = %9 169: ; preds = %166 fence acquire invoke void @"_ZN5alloc4sync16Arc$LT$T$C$A$GT$9drop_slow17h3f81ca6f3f442c9dE"(ptr noalias noundef nonnull align 8 dereferenceable(8) %7) - to label %"_ZN4core3ptr98drop_in_place$LT$core..option..Option$LT$alloc..sync..Arc$LT$tiny_skia..pixmap..Pixmap$GT$$GT$$GT$17hd535db59a25e3fb7E.exit59" unwind label %170 + to label %"_ZN4core3ptr98drop_in_place$LT$core..option..Option$LT$alloc..sync..Arc$LT$tiny_skia..pixmap..Pixmap$GT$$GT$$GT$17hd535db59a25e3fb7E.exit62" unwind label %170 170: ; preds = %169 %171 = landingpad { ptr, i32 } @@ -8067,7 +8073,7 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #16 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i32 @llvm.umax.i32(i32, i32) #14 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i32(i32, i32) #14 attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/typst-rs/optimized/2hy987uth4sp8yoc.ll b/bench/typst-rs/optimized/2hy987uth4sp8yoc.ll index 2358b053893..8586b6e570d 100644 --- a/bench/typst-rs/optimized/2hy987uth4sp8yoc.ll +++ b/bench/typst-rs/optimized/2hy987uth4sp8yoc.ll @@ -204,7 +204,10 @@ define hidden noundef i64 @"_ZN115_$LT$core..iter..adapters..take_while..TakeWhi ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden noundef i64 @_ZN4core3cmp6min_by17heddc20f649d809eeE.llvm.17794941744620341598(i64 noundef %0, i64 noundef %1) unnamed_addr #2 personality ptr @rust_eh_personality { - %.0.sroa.speculated = tail call i64 @llvm.umin.i64(i64 %0, i64 %1) + %.0.sroa.speculated = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %0, i64 %1) + %.off = add nsw i8 %.0.i.i, -1 + %switch = icmp ult i8 %.off, -2 + %.0.sroa.speculated = select i1 %switch, i64 %1, i64 %0 ret i64 %.0.sroa.speculated } @@ -14409,11 +14412,17 @@ define hidden void @_ZN12typst_syntax6parser6Parser11wrap_within17hd2ead4882fe35 %9 = getelementptr inbounds nuw i8, ptr %0, i64 80 %10 = getelementptr inbounds nuw i8, ptr %0, i64 96 %11 = load i64, ptr %10, align 8, !noundef !4 - %.0.sroa.speculated.i = tail call noundef i64 @llvm.umin.i64(i64 %2, i64 %11) - %.0.sroa.speculated.i1 = tail call noundef i64 @llvm.umin.i64(i64 %1, i64 %.0.sroa.speculated.i) + %.0.sroa.speculated.i = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %2, i64 %11) + %.off.i = add nsw i8 %.0.sroa.speculated.i, -1 + %switch.i = icmp ult i8 %.off.i, -2 + %.0.sroa.speculated.i = select i1 %switch.i, i64 %11, i64 %2 + %.0.i.i.i1 = tail call noundef range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64 %1, i64 %.0.sroa.speculated.i) + %.off.i2 = add nsw i8 %.0.i.i.i1, -1 + %switch.i3 = icmp ult i8 %.off.i2, -2 + %.0.sroa.speculated.i4 = select i1 %switch.i3, i64 %.0.sroa.speculated.i, i64 %1 tail call void @llvm.experimental.noalias.scope.decl(metadata !3411) tail call void @llvm.experimental.noalias.scope.decl(metadata !3414) - %12 = tail call { i64, i64 } @_ZN4core5slice5index5range17hcd550d7dfb1dd288E(i64 noundef %.0.sroa.speculated.i1, i64 noundef %.0.sroa.speculated.i, i64 noundef %11, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.5ab2de7f43314cdaa70b1332ba871678.29.llvm.13506474886552808233), !noalias !3416 + %12 = tail call { i64, i64 } @_ZN4core5slice5index5range17hcd550d7dfb1dd288E(i64 noundef %.0.sroa.speculated.i4, i64 noundef %.0.sroa.speculated.i, i64 noundef %11, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.5ab2de7f43314cdaa70b1332ba871678.29.llvm.13506474886552808233), !noalias !3416 %13 = extractvalue { i64, i64 } %12, 0 %14 = extractvalue { i64, i64 } %12, 1 store i64 %13, ptr %10, align 8, !alias.scope !3414, !noalias !3411 @@ -14488,8 +14497,8 @@ _ZN12typst_syntax4node10SyntaxNode5inner17h663e2a0e3d635b85E.exit: ; preds = %.n "_ZN5alloc3vec16Vec$LT$T$C$A$GT$7reserve17hdca6fe0f0368177eE.llvm.13506474886552808233.exit.i": ; preds = %37, %_ZN12typst_syntax4node10SyntaxNode5inner17h663e2a0e3d635b85E.exit %38 = load ptr, ptr %15, align 8, !alias.scope !3423, !noalias !3426, !nonnull !4, !noundef !4 - %39 = getelementptr inbounds { { [24 x i8], i8, [7 x i8] } }, ptr %38, i64 %.0.sroa.speculated.i1 - %40 = icmp ult i64 %.0.sroa.speculated.i1, %34 + %39 = getelementptr inbounds { { [24 x i8], i8, [7 x i8] } }, ptr %38, i64 %.0.sroa.speculated.i4 + %40 = icmp ult i64 %.0.sroa.speculated.i4, %34 br i1 %40, label %45, label %43 41: ; preds = %49, %37 @@ -14499,18 +14508,18 @@ _ZN12typst_syntax4node10SyntaxNode5inner17h663e2a0e3d635b85E.exit: ; preds = %.n to label %common.resume unwind label %51 43: ; preds = %"_ZN5alloc3vec16Vec$LT$T$C$A$GT$7reserve17hdca6fe0f0368177eE.llvm.13506474886552808233.exit.i" - %44 = icmp eq i64 %.0.sroa.speculated.i1, %34 + %44 = icmp eq i64 %.0.sroa.speculated.i4, %34 br i1 %44, label %"_ZN5alloc3vec16Vec$LT$T$C$A$GT$6insert17hbdf98353bdd3022bE.exit", label %49 45: ; preds = %"_ZN5alloc3vec16Vec$LT$T$C$A$GT$7reserve17hdca6fe0f0368177eE.llvm.13506474886552808233.exit.i" %46 = getelementptr inbounds nuw i8, ptr %39, i64 32 - %47 = sub nuw i64 %34, %.0.sroa.speculated.i1 + %47 = sub nuw i64 %34, %.0.sroa.speculated.i4 %48 = shl i64 %47, 5 tail call void @llvm.memmove.p0.p0.i64(ptr nonnull align 8 %46, ptr nonnull align 8 %39, i64 %48, i1 false), !noalias !3426 br label %"_ZN5alloc3vec16Vec$LT$T$C$A$GT$6insert17hbdf98353bdd3022bE.exit" 49: ; preds = %43 - invoke void @"_ZN5alloc3vec16Vec$LT$T$C$A$GT$6insert13assert_failed17ha96fae3da14a930aE"(i64 noundef %.0.sroa.speculated.i1, i64 noundef %34, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.5ab2de7f43314cdaa70b1332ba871678.30.llvm.13506474886552808233) #23 + invoke void @"_ZN5alloc3vec16Vec$LT$T$C$A$GT$6insert13assert_failed17ha96fae3da14a930aE"(i64 noundef %.0.sroa.speculated.i4, i64 noundef %34, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.5ab2de7f43314cdaa70b1332ba871678.30.llvm.13506474886552808233) #23 to label %50 unwind label %41, !noalias !3426 50: ; preds = %49 @@ -16488,7 +16497,7 @@ declare i32 @bcmp(ptr captures(none), ptr captures(none), i64) local_unnamed_add declare void @llvm.experimental.noalias.scope.decl(metadata) #19 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare i64 @llvm.umin.i64(i64, i64) #20 +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #20 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i8 @llvm.usub.sat.i8(i8, i8) #20 diff --git a/bench/typst-rs/optimized/3fn8yxw1t6hv8ofn.ll b/bench/typst-rs/optimized/3fn8yxw1t6hv8ofn.ll index e3783e4eebd..26ccb243e60 100644 --- a/bench/typst-rs/optimized/3fn8yxw1t6hv8ofn.ll +++ b/bench/typst-rs/optimized/3fn8yxw1t6hv8ofn.ll @@ -137,7 +137,8 @@ define hidden noundef double @"_ZN102_$LT$core..iter..adapters..map..Map$LT$I$C$ store double %.017.i, ptr %5, align 8, !noalias !60 store double %15, ptr %4, align 8, !noalias !60 %16 = call noundef i8 @"_ZN62_$LT$typst..util..scalar..Scalar$u20$as$u20$core..cmp..Ord$GT$3cmp17h0ae961c8dbcd3ce9E"(ptr noalias noundef nonnull readonly align 8 dereferenceable(8) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(8) %4), !range !63 - %switch.i.i.i.i = icmp eq i8 %16, 1 + %.off.i.i.i.i = add nsw i8 %16, -1 + %switch.i.i.i.i = icmp ult i8 %.off.i.i.i.i, -2 %.0.i.i.i.i = select i1 %switch.i.i.i.i, double %.017.i, double %15 call void @llvm.lifetime.end.p0(ptr nonnull %4), !noalias !60 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !60 @@ -1067,7 +1068,8 @@ define hidden noundef double @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as store double %.017, ptr %5, align 8, !noalias !310 store double %15, ptr %4, align 8, !noalias !310 %16 = call noundef i8 @"_ZN62_$LT$typst..util..scalar..Scalar$u20$as$u20$core..cmp..Ord$GT$3cmp17h0ae961c8dbcd3ce9E"(ptr noalias noundef nonnull readonly align 8 dereferenceable(8) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(8) %4), !range !63 - %switch.i.i.i = icmp eq i8 %16, 1 + %.off.i.i.i = add nsw i8 %16, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 %.0.i.i.i = select i1 %switch.i.i.i, double %.017, double %15 call void @llvm.lifetime.end.p0(ptr nonnull %4), !noalias !310 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !310 diff --git a/bench/typst-rs/optimized/3z60jkym58xbhjyi.ll b/bench/typst-rs/optimized/3z60jkym58xbhjyi.ll index 406765d6caa..6c44975699d 100644 --- a/bench/typst-rs/optimized/3z60jkym58xbhjyi.ll +++ b/bench/typst-rs/optimized/3z60jkym58xbhjyi.ll @@ -1588,7 +1588,10 @@ define hidden void @_ZN4core4iter6traits8iterator8Iterator3zip17h7df865265a8f2d6 %9 = load i64, ptr %6, align 8, !noalias !311, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %6), !noalias !311 %spec.select.i.i.i = call noundef i64 @llvm.usub.sat.i64(i64 %4, i64 %3) - %.0.sroa.speculated.i.i = call noundef i64 @llvm.umin.i64(i64 %9, i64 %spec.select.i.i.i) + %.0.sroa.speculated.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %9, i64 %spec.select.i.i.i) + %.off.i.i = add nsw i8 %.0.i.i.i.i, -1 + %switch.i.i = icmp ult i8 %.off.i.i, -2 + %.0.sroa.speculated.i.i = select i1 %switch.i.i, i64 %spec.select.i.i.i, i64 %9 store ptr %1, ptr %0, align 8, !alias.scope !308 %10 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %2, ptr %10, align 8, !alias.scope !308 @@ -7104,7 +7107,10 @@ define hidden void @"_ZN9typst_pdf17Remapper$LT$T$GT$11pdf_indices17h29d0534b61f call void @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4f478b57c238e171E.llvm.14530723680166322716"(ptr noalias noundef nonnull sret({ i64, { i64, [1 x i64] } }) align 8 captures(none) dereferenceable(24) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(16) %6), !noalias !1076 %11 = load i64, ptr %5, align 8, !noalias !1077, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !1077 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %11, i64 %9) + %.0.sroa.speculated.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %11, i64 %9) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %9, i64 %11 store ptr %2, ptr %0, align 8, !alias.scope !1076 %12 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %7, ptr %12, align 8, !alias.scope !1076 @@ -7139,7 +7145,10 @@ define hidden void @"_ZN9typst_pdf17Remapper$LT$T$GT$11pdf_indices17h359bafa159c call void @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4f478b57c238e171E.llvm.14530723680166322716"(ptr noalias noundef nonnull sret({ i64, { i64, [1 x i64] } }) align 8 captures(none) dereferenceable(24) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(16) %6), !noalias !1086 %11 = load i64, ptr %5, align 8, !noalias !1087, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !1087 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %11, i64 %9) + %.0.sroa.speculated.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %11, i64 %9) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %9, i64 %11 store ptr %2, ptr %0, align 8, !alias.scope !1086 %12 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %7, ptr %12, align 8, !alias.scope !1086 @@ -7174,7 +7183,10 @@ define hidden void @"_ZN9typst_pdf17Remapper$LT$T$GT$11pdf_indices17h40ca6e76c46 call void @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4f478b57c238e171E.llvm.14530723680166322716"(ptr noalias noundef nonnull sret({ i64, { i64, [1 x i64] } }) align 8 captures(none) dereferenceable(24) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(16) %6), !noalias !1096 %11 = load i64, ptr %5, align 8, !noalias !1097, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !1097 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %11, i64 %9) + %.0.sroa.speculated.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %11, i64 %9) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %9, i64 %11 store ptr %2, ptr %0, align 8, !alias.scope !1096 %12 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %7, ptr %12, align 8, !alias.scope !1096 @@ -7209,7 +7221,10 @@ define hidden void @"_ZN9typst_pdf17Remapper$LT$T$GT$11pdf_indices17h455e313698d call void @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4f478b57c238e171E.llvm.14530723680166322716"(ptr noalias noundef nonnull sret({ i64, { i64, [1 x i64] } }) align 8 captures(none) dereferenceable(24) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(16) %6), !noalias !1106 %11 = load i64, ptr %5, align 8, !noalias !1107, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !1107 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %11, i64 %9) + %.0.sroa.speculated.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %11, i64 %9) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %9, i64 %11 store ptr %2, ptr %0, align 8, !alias.scope !1106 %12 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %7, ptr %12, align 8, !alias.scope !1106 @@ -7244,7 +7259,10 @@ define hidden void @"_ZN9typst_pdf17Remapper$LT$T$GT$11pdf_indices17h7256879c2be call void @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4f478b57c238e171E.llvm.14530723680166322716"(ptr noalias noundef nonnull sret({ i64, { i64, [1 x i64] } }) align 8 captures(none) dereferenceable(24) %5, ptr noalias noundef nonnull readonly align 8 dereferenceable(16) %6), !noalias !1116 %11 = load i64, ptr %5, align 8, !noalias !1117, !noundef !4 call void @llvm.lifetime.end.p0(ptr nonnull %5), !noalias !1117 - %.0.sroa.speculated.i.i.i = call noundef i64 @llvm.umin.i64(i64 %11, i64 %9) + %.0.sroa.speculated.i.i.i = call noundef i8 @llvm.ucmp.i8.i64(i64 %11, i64 %9) + %.off.i.i.i = add nsw i8 %.0.i.i.i.i.i, -1 + %switch.i.i.i = icmp ult i8 %.off.i.i.i, -2 + %.0.sroa.speculated.i.i.i = select i1 %switch.i.i.i, i64 %9, i64 %11 store ptr %2, ptr %0, align 8, !alias.scope !1116 %12 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %7, ptr %12, align 8, !alias.scope !1116 @@ -8947,6 +8965,9 @@ declare void @llvm.experimental.noalias.scope.decl(metadata) #28 ; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) declare i64 @llvm.usub.sat.i64(i64, i64) #27 +; Function Attrs: nocallback nofree nosync nounwind speculatable willreturn memory(none) +declare range(i8 -1, 2) i8 @llvm.ucmp.i8.i64(i64, i64) #27 + attributes #0 = { inlinehint nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #1 = { nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #2 = { mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(read, argmem: readwrite, inaccessiblemem: none) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } diff --git a/bench/velox/optimized/File.ll b/bench/velox/optimized/File.ll index 4bf151a9818..049fbe8bf81 100644 --- a/bench/velox/optimized/File.ll +++ b/bench/velox/optimized/File.ll @@ -1298,13 +1298,12 @@ land.lhs.true: ; preds = %_ZNSt10filesystem7_ to label %invoke.cont6 unwind label %lpad5 invoke.cont6: ; preds = %land.lhs.true - %trunc = trunc i64 %call.i3 to i8 - switch i8 %trunc, label %if.end11 [ - i8 -1, label %if.then - i8 0, label %if.then - ] + %2 = and i64 %call.i3, 255 + %.off = add nsw i64 %2, -1 + %switch = icmp ult i64 %.off, 254 + br i1 %switch, label %if.end11, label %if.then -if.then: ; preds = %invoke.cont6, %invoke.cont6 +if.then: ; preds = %invoke.cont6 %call.i = call noundef ptr @_ZNKSt7__cxx1112basic_stringIcSt11char_traitsIcESaIcEE5c_strEv(ptr noundef nonnull align 8 dereferenceable(40) %dir) #12 %call9 = invoke noundef zeroext i1 @_ZN8facebook5velox6common21generateFileDirectoryEPKc(ptr noundef %call.i) to label %invoke.cont8 unwind label %lpad5 diff --git a/bench/wireshark/optimized/packet-pktc.ll b/bench/wireshark/optimized/packet-pktc.ll index 0abb9e553a4..048e01a2ba4 100644 --- a/bench/wireshark/optimized/packet-pktc.ll +++ b/bench/wireshark/optimized/packet-pktc.ll @@ -610,13 +610,10 @@ define internal fastcc noundef i32 @dissect_pktc_app_specific_data(ptr noundef % br label %49 40: ; preds = %6 - switch i8 %5, label %45 [ - i8 2, label %41 - i8 3, label %41 - i8 5, label %41 - ] + %switch68 = icmp eq i8 %5, 4 + br i1 %switch68, label %45, label %41 -41: ; preds = %40, %40, %40 +41: ; preds = %40 %42 = load i32, ptr @hf_pktc_ipsec_spi, align 4 %43 = tail call ptr @proto_tree_add_item(ptr noundef %10, i32 noundef %42, ptr noundef %2, i32 noundef %3, i32 noundef 4, i32 noundef 0) %44 = add i32 %3, 4 diff --git a/bench/yalantinglibs/optimized/channel.ll b/bench/yalantinglibs/optimized/channel.ll index 02a25924db5..6f47265fd91 100644 --- a/bench/yalantinglibs/optimized/channel.ll +++ b/bench/yalantinglibs/optimized/channel.ll @@ -84730,7 +84730,9 @@ invoke.cont: ; preds = %call2.i.i.noexc, %i store ptr %9, ptr %_awaiter.i.i.i, align 8, !alias.scope !942 %_M_index.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %7, i64 16 %10 = load i8, ptr %_M_index.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, align 8, !noalias !942 - %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq i8 %10, 2 + %conv.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = sext i8 %10 to i64 + %conv.i.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = add nsw i64 %conv.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, -2 + %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp ult i64 %conv.i.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, -3 br i1 %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %sw.bb3.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %_ZN12async_simple4coro6detail10getAwaiterINS_6FutureINS_4UnitEEEEEDaOT_.exit.i.i.i sw.bb3.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i: ; preds = %invoke.cont diff --git a/bench/yalantinglibs/optimized/client_pool.ll b/bench/yalantinglibs/optimized/client_pool.ll index 420d1b3011f..284c02d5847 100644 --- a/bench/yalantinglibs/optimized/client_pool.ll +++ b/bench/yalantinglibs/optimized/client_pool.ll @@ -69408,7 +69408,9 @@ invoke.cont141: ; preds = %invoke.cont136 store ptr %80, ptr %_awaiter.i.i.i, align 8, !alias.scope !812 %_M_index.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %0, i64 264 %81 = load i8, ptr %_M_index.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, align 8, !noalias !812 - %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq i8 %81, 2 + %conv.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = sext i8 %81 to i64 + %conv.i.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = add nsw i64 %conv.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, -2 + %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp ult i64 %conv.i.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, -3 br i1 %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %sw.bb3.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %_ZN12async_simple4coro6detail10getAwaiterINS_6FutureINS_4UnitEEEEEDaOT_.exit.i.i.i sw.bb3.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i: ; preds = %invoke.cont141 @@ -87155,7 +87157,9 @@ invoke.cont142: ; preds = %if.end138 store ptr %106, ptr %_awaiter.i.i.i, align 8, !alias.scope !1240 %_M_index.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %0, i64 400 %107 = load i8, ptr %_M_index.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, align 8, !noalias !1240 - %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp eq i8 %107, 2 + %conv.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = sext i8 %107 to i64 + %conv.i.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = add nsw i64 %conv.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, -2 + %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i = icmp ult i64 %conv.i.off.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, -3 br i1 %switch.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %sw.bb3.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i, label %_ZN12async_simple4coro6detail10getAwaiterINS_6FutureINS_4UnitEEEEEDaOT_.exit.i.i.i sw.bb3.i.i.i.i.i.i.i.i.i.i.i.i.i.i.i: ; preds = %invoke.cont142 diff --git a/scripts/setup_pre_commit_patch.sh b/scripts/setup_pre_commit_patch.sh index c8d0fce0bf7..05fb904b5a1 100755 --- a/scripts/setup_pre_commit_patch.sh +++ b/scripts/setup_pre_commit_patch.sh @@ -2,7 +2,7 @@ set -euo pipefail shopt -s inherit_errexit -export GITHUB_PATCH_ID="/llvm-project/commit/" +export GITHUB_PATCH_ID=llvm/llvm-project/pull/161000 export COMPTIME_MODE=0 export STAT_MODE=0 export STAT_NAME=""