diff --git a/bench/actix-rs/optimized/1kr0tdq4l6v38mbk.ll b/bench/actix-rs/optimized/1kr0tdq4l6v38mbk.ll index b91b0c687d6..0d25bd44b9e 100644 --- a/bench/actix-rs/optimized/1kr0tdq4l6v38mbk.ll +++ b/bench/actix-rs/optimized/1kr0tdq4l6v38mbk.ll @@ -1619,26 +1619,32 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h57 %6 = load i64, ptr %5, align 8 %.sink2.i = select i1 %4, i64 %6, i64 %3 %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink2.i, i64 1) - %8 = extractvalue { i64, i1 } %7, 1 - br i1 %8, label %.thread, label %9 - -9: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17heac8de2aa48146c7E.llvm.8925420951046425970.exit" - %10 = extractvalue { i64, i1 } %7, 0 - %11 = icmp ult i64 %10, 2 - %12 = add i64 %10, -1 - %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) - %14 = lshr i64 -1, %13 - %.0.i.i = select i1 %11, i64 0, i64 %14 - %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i, i64 1) - %16 = extractvalue { i64, i1 } %15, 1 - %17 = extractvalue { i64, i1 } %15, 0 - br i1 %16, label %.thread, label %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h00c581c79d47fca1E.llvm.8925420951046425970.exit.i" - -.thread: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17heac8de2aa48146c7E.llvm.8925420951046425970.exit", %9 + %8 = extractvalue { i64, i1 } %7, 0 + %9 = extractvalue { i64, i1 } %7, 1 + br i1 %9, label %.thread, label %10 + +10:; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17heac8de2aa48146c7E.llvm.8925420951046425970.exit" + %11 = icmp ult i64 %8, 2 + br i1 %11, label %17, label %12 + +12:; preds = %10 + %13 = add i64 %8, -1 + %15 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %13, i1 true) + %15 = lshr i64 -1, %14 + %16 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %15, i64 1) + br label %.thread + +.thread: ; preds = %12, %10 + %.0.i.i = phi { i64, i1 } [ %16, %12 ], [ { i64 1, i1 false }, %10 ] + %18 = extractvalue { i64, i1 } %.0.i.i, 1 + %19 = extractvalue { i64, i1 } %.0.i.i, 0 + br i1 %18, label %.thread, label %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h00c581c79d47fca1E.llvm.8925420951046425970.exit.i" + +.thread: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17heac8de2aa48146c7E.llvm.8925420951046425970.exit", %17 tail call void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.cf8ce5e1de4a78c7021e8ff3b6c4351c.56, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.cf8ce5e1de4a78c7021e8ff3b6c4351c.58) #30 unreachable -"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h00c581c79d47fca1E.llvm.8925420951046425970.exit.i": ; preds = %9 +"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h00c581c79d47fca1E.llvm.8925420951046425970.exit.i": ; preds = %17 tail call void @llvm.experimental.noalias.scope.decl(metadata !235) %18 = icmp ult i64 %3, 5 %19 = getelementptr inbounds nuw i8, ptr %0, i64 16 @@ -1649,7 +1655,7 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h57 %23 = select i1 %4, i64 %.pre.i, i64 %3 %.sink3.i.i = select i1 %4, ptr %20, ptr %22 %.sink.i.i = tail call i64 @llvm.umax.i64(i64 %3, i64 4) - %.not.i = icmp ult i64 %17, %23 + %.not.i = icmp ult i64 %19, %23 br i1 %.not.i, label %24, label %25 24: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h00c581c79d47fca1E.llvm.8925420951046425970.exit.i" @@ -1657,60 +1663,60 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h57 unreachable 25: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h00c581c79d47fca1E.llvm.8925420951046425970.exit.i" - %26 = icmp ult i64 %17, 5 - br i1 %26, label %28, label %27 - -27: ; preds = %25 - %.not73.i = icmp eq i64 %3, %17 - br i1 %.not73.i, label %_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit, label %29 - -28: ; preds = %25 - br i1 %18, label %_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit, label %46 + %26 = icmp ult i64 %19, 5 + br i1 %26, label %30, label %29 29: ; preds = %27 - %30 = shl i64 %17, 3 - %31 = icmp ugt i64 %17, 2305843009213693951 - %32 = icmp ugt i64 %30, 9223372036854775800 - %or.cond = or i1 %31, %32 - br i1 %or.cond, label %53, label %33 - -33: ; preds = %29 - br i1 %18, label %38, label %34 - -34: ; preds = %33 - %35 = shl i64 %.sink.i.i, 3 - %36 = icmp ugt i64 %3, 2305843009213693951 - %37 = icmp ugt i64 %35, 9223372036854775800 - %or.cond13 = or i1 %36, %37 - br i1 %or.cond13, label %53, label %41 - -38: ; preds = %33 - %39 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !235 - %40 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %30, i64 noundef 8) #29, !noalias !235 - %.not117.i = icmp eq ptr %40, null - br i1 %.not117.i, label %54, label %44 - -41: ; preds = %34 - %42 = tail call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %35, i64 noundef 8, i64 noundef %30) #29 - %.not116.i = icmp eq ptr %42, null - br i1 %.not116.i, label %54, label %43 - -43: ; preds = %41, %44 - %.0.i = phi ptr [ %40, %44 ], [ %42, %41 ] + %.not73.i = icmp eq i64 %3, %19 + br i1 %.not73.i, label %_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit, label %31 + +41: ; preds = %27 + br i1 %20, label %_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit, label %48 + +31:; preds = %29 + %32 = shl i64 %19, 3 + %33 = icmp ugt i64 %19, 2305843009213693951 + %34 = icmp ugt i64 %32, 9223372036854775800 + %or.cond = or i1 %33, %34 + br i1 %or.cond, label %55, label %35 + +35: ; preds = %31 + br i1 %20, label %40, label %36 + +36: ; preds = %35 + %37 = shl i64 %.sink.i.i, 3 + %38 = icmp ugt i64 %3, 2305843009213693951 + %39 = icmp ugt i64 %37, 9223372036854775800 + %or.cond13 = or i1 %38, %39 + br i1 %or.cond13, label %55, label %43 + +40: ; preds = %35 + %41 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !235 + %42 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %32, i64 noundef 8) #29, !noalias !235 + %.not117.i = icmp eq ptr %42, null + br i1 %.not117.i, label %56, label %46 + +43: ; preds = %36 + %44 = tail call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %37, i64 noundef 8, i64 noundef %32) #29 + %.not116.i = icmp eq ptr %44, null + br i1 %.not116.i, label %56, label %45 + +45: ; preds = %43, %46 + %.0.i = phi ptr [ %42, %46 ], [ %44, %43 ] store i64 1, ptr %0, align 8, !alias.scope !235 %.sroa.449.0..sroa_idx.i = getelementptr inbounds nuw i8, ptr %0, i64 8 store i64 %23, ptr %.sroa.449.0..sroa_idx.i, align 8, !alias.scope !235 %.sroa.5.0..sroa_idx.i = getelementptr inbounds nuw i8, ptr %0, i64 16 store ptr %.0.i, ptr %.sroa.5.0..sroa_idx.i, align 8, !alias.scope !235 - store i64 %17, ptr %2, align 8, !alias.scope !235 + store i64 %19, ptr %2, align 8, !alias.scope !235 br label %_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit -44: ; preds = %38 +44: ; preds = %40 %45 = shl i64 %23, 3 - tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %40, ptr nonnull align 8 %.sink3.i.i, i64 %45, i1 false) - br label %43 + tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %42, ptr nonnull align 8 %.sink3.i.i, i64 %45, i1 false) + br label %45 -46: ; preds = %28 +46: ; preds = %30 store i64 0, ptr %0, align 8, !alias.scope !235 %47 = getelementptr inbounds nuw i8, ptr %0, i64 8 %48 = shl i64 %23, 3 @@ -1734,15 +1740,15 @@ _ZN8smallvec10deallocate17hdf713e930719dcd0E.exit.i: ; preds = %46 tail call void @__rust_dealloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %49, i64 noundef 8) #29 br label %_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit -53: ; preds = %29, %34 +53: ; preds = %31, %36 tail call void @_ZN4core9panicking5panic17h44790a89027c670fE(ptr noalias noundef nonnull readonly align 1 @anon.cf8ce5e1de4a78c7021e8ff3b6c4351c.56, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.cf8ce5e1de4a78c7021e8ff3b6c4351c.57) #30 unreachable -54: ; preds = %41, %38 - tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef range(i64 0, -9223372036854775806) 8, i64 noundef %30) #30 +54: ; preds = %43, %40 + tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef range(i64 0, -9223372036854775806) 8, i64 noundef %32) #30 unreachable -_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit: ; preds = %27, %43, %_ZN8smallvec10deallocate17hdf713e930719dcd0E.exit.i, %28 +_ZN8smallvec10infallible17hab804a69e4a73d7dE.exit: ; preds = %29, %45, %_ZN8smallvec10deallocate17hdf713e930719dcd0E.exit.i, %30 ret void } diff --git a/bench/actix-rs/optimized/36qa1hw006t0trtl.ll b/bench/actix-rs/optimized/36qa1hw006t0trtl.ll index 1173fc11292..8b0bf6fd564 100644 --- a/bench/actix-rs/optimized/36qa1hw006t0trtl.ll +++ b/bench/actix-rs/optimized/36qa1hw006t0trtl.ll @@ -9997,9 +9997,9 @@ define hidden void @"_ZN9hashbrown3raw21RawTable$LT$T$C$A$GT$15clone_from_impl17 br label %.body .body: ; preds = %.body.i, %188, %26 - %eh.lpad-body = phi { ptr, i32 } [ %27, %26 ], [ %eh.lpad-body.i.i.i.i, %188 ], [ %eh.lpad-body.i.i.i.i, %.body.i ] + %eh.lpad-body = phi { ptr, i32 } [ %27, %26 ], [ %eh.lpad-body.i.i.i.i, %190 ], [ %eh.lpad-body.i.i.i.i, %.body.i ] invoke fastcc void @"_ZN4core3ptr345drop_in_place$LT$hashbrown..scopeguard..ScopeGuard$LT$$LP$usize$C$$RF$mut$u20$hashbrown..raw..RawTable$LT$$LP$http..header..name..HeaderName$C$actix_http..header..map..Value$RP$$GT$$RP$$C$hashbrown..raw..RawTable$LT$$LP$http..header..name..HeaderName$C$actix_http..header..map..Value$RP$$GT$..clone_from_impl..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17ha74a12ed7e2c4e9dE"(i64 %.sroa.0.099, ptr nonnull %0) #53 - to label %201 unwind label %199 + to label %203 unwind label %199 28: ; preds = %.lr.ph, %.loopexit %.sroa.0.099 = phi i64 [ 0, %.lr.ph ], [ %45, %.loopexit ] @@ -10170,15 +10170,15 @@ _ZN8smallvec10infallible17h9a6aafa93e9c626dE.exit.i.i.i.i.i: ; preds = %.noexc.i br i1 %90, label %.lr.ph.i.i.i.i.i, label %._crit_edge.i.i.i.i.i ._crit_edge.i.i.i.i.i: ; preds = %176, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" - %.sroa.7.0.lcssa.i.i.i.i.i = phi i64 [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ], [ %.sink.i.i.i.i.i.i, %176 ] - %.sroa.0.0.lcssa.i.i.i.i.i = phi ptr [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ], [ %177, %176 ] + %.sroa.7.0.lcssa.i.i.i.i.i = phi i64 [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ], [ %.sink.i.i.i.i.i.i, %178 ] + %.sroa.0.0.lcssa.i.i.i.i.i = phi ptr [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ], [ %177, %178 ] store i64 %.sroa.7.0.lcssa.i.i.i.i.i, ptr %.sink2.i.i.i.i.i.i, align 8, !alias.scope !2190, !noalias !2188 %91 = icmp eq ptr %.sroa.0.0.lcssa.i.i.i.i.i, %88 br i1 %91, label %.loopexit, label %.lr.ph51.i.i.i.i.i .lr.ph.i.i.i.i.i: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i", %176 - %.sroa.0.047.i.i.i.i.i = phi ptr [ %177, %176 ], [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ] - %.sroa.7.046.i.i.i.i.i = phi i64 [ %181, %176 ], [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ] + %.sroa.0.047.i.i.i.i.i = phi ptr [ %177, %178 ], [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ] + %.sroa.7.046.i.i.i.i.i = phi i64 [ %181, %178 ], [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i.i.i.i.i" ] %92 = icmp eq ptr %.sroa.0.047.i.i.i.i.i, %88 br i1 %92, label %182, label %93 @@ -10192,7 +10192,7 @@ _ZN8smallvec10infallible17h9a6aafa93e9c626dE.exit.i.i.i.i.i: ; preds = %.noexc.i %99 = getelementptr inbounds nuw i8, ptr %.sroa.0.047.i.i.i.i.i, i64 16 %100 = load i64, ptr %99, align 8, !noalias !2204, !noundef !4 invoke void %95(ptr noalias noundef nonnull sret({ ptr, ptr, i64, { ptr } }) align 8 captures(none) dereferenceable(32) %.sroa.0.i.i.i.i.i.i.i, ptr noundef nonnull align 8 %96, ptr noundef %98, i64 noundef %100) - to label %176 unwind label %183, !noalias !2188 + to label %178 unwind label %183, !noalias !2188 .lr.ph51.i.i.i.i.i: ; preds = %._crit_edge.i.i.i.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$4push17hb594d15ad324e569E.exit.i.i.i.i.i" %.sroa.027.049.i.i.i.i.i = phi ptr [ %101, %"_ZN8smallvec17SmallVec$LT$A$GT$4push17hb594d15ad324e569E.exit.i.i.i.i.i" ], [ %.sroa.0.0.lcssa.i.i.i.i.i, %._crit_edge.i.i.i.i.i ] @@ -10246,29 +10246,35 @@ _ZN8smallvec10infallible17h9a6aafa93e9c626dE.exit.i.i.i.i.i: ; preds = %.noexc.i %128 = load i64, ptr %23, align 8 %.sink2.i.i = select i1 %127, i64 %128, i64 %126 %129 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink2.i.i, i64 1) - %130 = extractvalue { i64, i1 } %129, 1 - br i1 %130, label %.thread.i, label %131 - -131: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h5a342dcfa2c17f8aE.exit.i" - %132 = extractvalue { i64, i1 } %129, 0 - %133 = icmp ult i64 %132, 2 - %134 = add i64 %132, -1 - %135 = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %134, i1 true) - %136 = lshr i64 -1, %135 - %.0.i.i.i = select i1 %133, i64 0, i64 %136 - %137 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i.i, i64 1) - %138 = extractvalue { i64, i1 } %137, 1 - br i1 %138, label %.thread.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" - -.thread.i: ; preds = %131, %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h5a342dcfa2c17f8aE.exit.i" + %130 = extractvalue { i64, i1 } %129, 0 + %131 = extractvalue { i64, i1 } %129, 1 + br i1 %131, label %.thread.i, label %132 + +132:; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h5a342dcfa2c17f8aE.exit.i" + %133 = icmp ult i64 %130, 2 + br i1 %133, label %139, label %134 + +134:; preds = %132 + %135 = add i64 %130, -1 + %137 = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %135, i1 true) + %137 = lshr i64 -1, %136 + %138 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %137, i64 1) + br label %139 + +139: ; preds = %134, %132 + %.0.i.i.i = phi { i64, i1 } [ %138, %134 ], [ { i64 1, i1 false }, %132 ] + %140 = extractvalue { i64, i1 } %.0.i.i.i, 1 + br i1 %140, label %.thread.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" + +.thread.i: ; preds = %139, %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h5a342dcfa2c17f8aE.exit.i" invoke void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.56b80ba41f60f168ea36658d6e9a4b12.49, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.56b80ba41f60f168ea36658d6e9a4b12.52) #54 to label %.noexc13 unwind label %116 .noexc13: ; preds = %.thread.i unreachable -"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i": ; preds = %131 - %139 = extractvalue { i64, i1 } %137, 0 +"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i": ; preds = %139 + %139 = extractvalue { i64, i1 } %.0.i.i.i, 0 call void @llvm.experimental.noalias.scope.decl(metadata !2249) %140 = icmp ult i64 %126, 5 %141 = load ptr, ptr %24, align 8, !nonnull !4 @@ -10279,10 +10285,10 @@ _ZN8smallvec10infallible17h9a6aafa93e9c626dE.exit.i.i.i.i.i: ; preds = %.noexc.i %.not.i = icmp ult i64 %139, %142 br i1 %.not.i, label %.invoke, label %146 -.invoke: ; preds = %153, %150, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" - %143 = phi ptr [ @anon.56b80ba41f60f168ea36658d6e9a4b12.55, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.49, %150 ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.49, %153 ] - %144 = phi i64 [ 32, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" ], [ 17, %150 ], [ 17, %153 ] - %145 = phi ptr [ @anon.56b80ba41f60f168ea36658d6e9a4b12.56, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.50, %150 ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.50, %153 ] +.invoke: ; preds = %155, %152, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" + %143 = phi ptr [ @anon.56b80ba41f60f168ea36658d6e9a4b12.55, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.49, %152 ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.49, %155 ] + %144 = phi i64 [ 32, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" ], [ 17, %152 ], [ 17, %155 ] + %145 = phi ptr [ @anon.56b80ba41f60f168ea36658d6e9a4b12.56, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.50, %152 ], [ @anon.56b80ba41f60f168ea36658d6e9a4b12.50, %155 ] invoke void @_ZN4core9panicking5panic17h44790a89027c670fE(ptr noalias noundef nonnull readonly align 1 %143, i64 noundef %144, ptr noalias noundef readonly align 8 dereferenceable(24) %145) #54 to label %.cont unwind label %116 @@ -10291,53 +10297,53 @@ _ZN8smallvec10infallible17h9a6aafa93e9c626dE.exit.i.i.i.i.i: ; preds = %.noexc.i 146: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17hc662aa133ede94f5E.llvm.17320615007082653151.exit.i" %147 = icmp ult i64 %139, 5 - br i1 %147, label %149, label %148 - -148: ; preds = %146 - %.not73.i = icmp eq i64 %126, %139 - br i1 %.not73.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit", label %150 - -149: ; preds = %146 - br i1 %140, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit", label %163 + br i1 %147, label %151, label %150 150: ; preds = %148 - %151 = mul i64 %139, 40 - %or.cond = icmp ugt i64 %139, 230584300921369395 - br i1 %or.cond, label %.invoke, label %152 + %.not73.i = icmp eq i64 %126, %141 + br i1 %.not73.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit", label %152 -152: ; preds = %150 - br i1 %140, label %154, label %153 +152: ; preds = %148 + br i1 %140, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit", label %165 -153: ; preds = %152 - %or.cond38 = icmp ugt i64 %126, 230584300921369395 - br i1 %or.cond38, label %.invoke, label %157 +153: ; preds = %150 + %153 = mul i64 %141, 40 + %or.cond = icmp ugt i64 %141, 230584300921369395 + br i1 %or.cond, label %.invoke, label %154 154: ; preds = %152 - %155 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !2249 - %156 = call noundef align 8 ptr @__rust_alloc(i64 noundef %151, i64 noundef 8) #52, !noalias !2249 - %.not117.i = icmp eq ptr %156, null - br i1 %.not117.i, label %167, label %161 - -157: ; preds = %153 - %158 = mul nuw nsw i64 %.sink.i.i, 40 - %159 = call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %158, i64 noundef 8, i64 noundef %151) #52 - %.not116.i = icmp eq ptr %159, null - br i1 %.not116.i, label %167, label %160 - -160: ; preds = %157, %161 - %.0.i17 = phi ptr [ %156, %161 ], [ %159, %157 ] + br i1 %142, label %156, label %155 + +155: ; preds = %154 + %or.cond38 = icmp ugt i64 %126, 230584300921369395 + br i1 %or.cond38, label %.invoke, label %159 + +156:; preds = %154 + %157 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !2249 + %158 = call noundef align 8 ptr @__rust_alloc(i64 noundef %153, i64 noundef 8) #52, !noalias !2249 + %.not117.i = icmp eq ptr %158, null + br i1 %.not117.i, label %169, label %163 + +159: ; preds = %155 + %160 = mul nuw nsw i64 %.sink.i.i, 40 + %161 = call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %160, i64 noundef 8, i64 noundef %153) #52 + %.not116.i = icmp eq ptr %161, null + br i1 %.not116.i, label %169, label %162 + +162: ; preds = %159, %163 + %.0.i17 = phi ptr [ %158, %163 ], [ %161, %159 ] store i64 1, ptr %5, align 8, !alias.scope !2249 store i64 %142, ptr %23, align 8, !alias.scope !2249 store ptr %.0.i17, ptr %24, align 8, !alias.scope !2249 store i64 %139, ptr %22, align 8, !alias.scope !2249 br label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit" -161: ; preds = %154 +161: ; preds = %156 %162 = mul i64 %142, 40 - call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %156, ptr nonnull align 8 %.sink3.i.i, i64 %162, i1 false) - br label %160 + call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %158, ptr nonnull align 8 %.sink3.i.i, i64 %162, i1 false) + br label %162 -163: ; preds = %149 +163: ; preds = %151 store i64 0, ptr %5, align 8, !alias.scope !2249 %164 = mul i64 %142, 40 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %23, ptr nonnull align 8 %.sink3.i.i, i64 %164, i1 false) @@ -10361,14 +10367,14 @@ _ZN8smallvec10deallocate17hf3e0b5eba0cea081E.exit.i: ; preds = %163 call void @__rust_dealloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %165, i64 noundef 8) #52 br label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit" -167: ; preds = %154, %157 - invoke void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %151) #54 +167: ; preds = %156, %159 + invoke void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %153) #54 to label %.noexc16 unwind label %116 .noexc16: ; preds = %167 unreachable -"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit": ; preds = %149, %_ZN8smallvec10deallocate17hf3e0b5eba0cea081E.exit.i, %160, %148 +"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h9729776bd0df99ebE.exit": ; preds = %151, %_ZN8smallvec10deallocate17hf3e0b5eba0cea081E.exit.i, %162, %150 %168 = load ptr, ptr %24, align 8, !alias.scope !2229, !noalias !2230, !nonnull !4, !noundef !4 %.pre.i13.i.i.i.i.i = load i64, ptr %23, align 8, !alias.scope !2229, !noalias !2230 br label %"_ZN8smallvec17SmallVec$LT$A$GT$4push17hb594d15ad324e569E.exit.i.i.i.i.i" @@ -10431,7 +10437,7 @@ _ZN8smallvec10deallocate17hf3e0b5eba0cea081E.exit.i: ; preds = %163 br label %.body.i.i.i.i .body.i.i.i.i: ; preds = %.loopexit.split-lp.i.i.i.i.loopexit, %.loopexit.split-lp.i.i.i.i.loopexit.split-lp, %.loopexit.i.i.i.i, %183, %116 - %eh.lpad-body.i.i.i.i = phi { ptr, i32 } [ %184, %183 ], [ %117, %116 ], [ %lpad.loopexit.i.i.i.i, %.loopexit.i.i.i.i ], [ %lpad.loopexit, %.loopexit.split-lp.i.i.i.i.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp.i.i.i.i.loopexit.split-lp ] + %eh.lpad-body.i.i.i.i = phi { ptr, i32 } [ %184, %185 ], [ %117, %116 ], [ %lpad.loopexit.i.i.i.i, %.loopexit.i.i.i.i ], [ %lpad.loopexit, %.loopexit.split-lp.i.i.i.i.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp.i.i.i.i.loopexit.split-lp ] invoke void @"_ZN4core3ptr100drop_in_place$LT$smallvec..SmallVec$LT$$u5b$http..header..value..HeaderValue$u3b$$u20$4$u5d$$GT$$GT$17he402e7ac3338b161E"(ptr noalias noundef nonnull align 8 dereferenceable(176) %5) #53 to label %.body.i unwind label %185, !noalias !2188 @@ -10458,7 +10464,7 @@ _ZN8smallvec10deallocate17hf3e0b5eba0cea081E.exit.i: ; preds = %163 %192 = load ptr, ptr %.sroa.5.0..sroa_idx2.i.i, align 8, !alias.scope !2273, !noundef !4 %193 = getelementptr inbounds nuw i8, ptr %7, i64 16 %194 = load i64, ptr %193, align 8, !alias.scope !2273, !noundef !4 - invoke void %190(ptr noalias noundef nonnull align 8 dereferenceable(8) %191, ptr noundef %192, i64 noundef %194) + invoke void %192(ptr noalias noundef nonnull align 8 dereferenceable(8) %191, ptr noundef %192, i64 noundef %194) to label %.body unwind label %195 195: ; preds = %188 diff --git a/bench/actix-rs/optimized/520p8qtoxfmkvgyc.ll b/bench/actix-rs/optimized/520p8qtoxfmkvgyc.ll index 00ffb773866..034e14f25bf 100644 --- a/bench/actix-rs/optimized/520p8qtoxfmkvgyc.ll +++ b/bench/actix-rs/optimized/520p8qtoxfmkvgyc.ll @@ -4318,29 +4318,35 @@ define internal fastcc void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unche %5 = load i64, ptr %4, align 8 %.sink2.i = select i1 %3, i64 %5, i64 %2 %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink2.i, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - br i1 %7, label %.thread, label %8 - -8: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit" - %9 = extractvalue { i64, i1 } %6, 0 - %10 = icmp ult i64 %9, 2 - %11 = add i64 %9, -1 - %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %11, i1 true) - %13 = lshr i64 -1, %12 - %.0.i.i = select i1 %10, i64 0, i64 %13 - %14 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i, i64 1) - %15 = extractvalue { i64, i1 } %14, 1 - br i1 %15, label %.thread, label %16 - -.thread: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit", %8 + %7 = extractvalue { i64, i1 } %6, 0 + %8 = extractvalue { i64, i1 } %6, 1 + br i1 %8, label %.thread, label %9 + +9:; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit" + %10 = icmp ult i64 %7, 2 + br i1 %10, label %16, label %11 + +11:; preds = %9 + %12 = add i64 %7, -1 + %14 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) + %14 = lshr i64 -1, %13 + %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %14, i64 1) + br label %16 + +16: ; preds = %11, %9 + %.0.i.i = phi { i64, i1 } [ %15, %11 ], [ { i64 1, i1 false }, %9 ] + %17 = extractvalue { i64, i1 } %.0.i.i, 1 + br i1 %17, label %.thread, label %18 + +.thread: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit", %16 tail call void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.c909a1c3189337549521d497c7ec076f.115, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.c909a1c3189337549521d497c7ec076f.118) #51 unreachable -16: ; preds = %8 - %17 = extractvalue { i64, i1 } %14, 0 +16: ; preds = %16 + %17 = extractvalue { i64, i1 } %.0.i.i, 0 %18 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h24735675376b3260E"(ptr noalias noundef align 8 dereferenceable(176) %0, i64 noundef %17) %19 = extractvalue { i64, i64 } %18, 0 - switch i64 %19, label %21 [ + switch i64 %19, label %23 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17h38575f4621b0607aE.exit i64 0, label %20 ] @@ -8813,9 +8819,9 @@ define hidden void @"_ZN9hashbrown3raw21RawTable$LT$T$C$A$GT$15clone_from_impl17 br label %.body .body: ; preds = %.body.i, %188, %26 - %eh.lpad-body = phi { ptr, i32 } [ %27, %26 ], [ %eh.lpad-body.i.i.i.i, %188 ], [ %eh.lpad-body.i.i.i.i, %.body.i ] + %eh.lpad-body = phi { ptr, i32 } [ %27, %26 ], [ %eh.lpad-body.i.i.i.i, %190 ], [ %eh.lpad-body.i.i.i.i, %.body.i ] invoke fastcc void @"_ZN4core3ptr345drop_in_place$LT$hashbrown..scopeguard..ScopeGuard$LT$$LP$usize$C$$RF$mut$u20$hashbrown..raw..RawTable$LT$$LP$http..header..name..HeaderName$C$actix_http..header..map..Value$RP$$GT$$RP$$C$hashbrown..raw..RawTable$LT$$LP$http..header..name..HeaderName$C$actix_http..header..map..Value$RP$$GT$..clone_from_impl..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17hfefcf44ce91c3a86E"(i64 %.sroa.0.099, ptr nonnull %0) #49 - to label %201 unwind label %199 + to label %203 unwind label %199 28: ; preds = %.lr.ph, %.loopexit %.sroa.0.099 = phi i64 [ 0, %.lr.ph ], [ %45, %.loopexit ] @@ -8986,15 +8992,15 @@ _ZN8smallvec10infallible17h38575f4621b0607aE.exit.i.i.i.i.i: ; preds = %.noexc.i br i1 %90, label %.lr.ph.i.i.i.i.i, label %._crit_edge.i.i.i.i.i ._crit_edge.i.i.i.i.i: ; preds = %176, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" - %.sroa.7.0.lcssa.i.i.i.i.i = phi i64 [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ], [ %.sink.i.i.i.i.i.i, %176 ] - %.sroa.0.0.lcssa.i.i.i.i.i = phi ptr [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ], [ %177, %176 ] + %.sroa.7.0.lcssa.i.i.i.i.i = phi i64 [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ], [ %.sink.i.i.i.i.i.i, %178 ] + %.sroa.0.0.lcssa.i.i.i.i.i = phi ptr [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ], [ %177, %178 ] store i64 %.sroa.7.0.lcssa.i.i.i.i.i, ptr %.sink2.i.i.i.i.i.i, align 8, !alias.scope !1903, !noalias !1901 %91 = icmp eq ptr %.sroa.0.0.lcssa.i.i.i.i.i, %88 br i1 %91, label %.loopexit, label %.lr.ph51.i.i.i.i.i .lr.ph.i.i.i.i.i: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i", %176 - %.sroa.0.047.i.i.i.i.i = phi ptr [ %177, %176 ], [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ] - %.sroa.7.046.i.i.i.i.i = phi i64 [ %181, %176 ], [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ] + %.sroa.0.047.i.i.i.i.i = phi ptr [ %177, %178 ], [ %.sink3.i.i4.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ] + %.sroa.7.046.i.i.i.i.i = phi i64 [ %181, %178 ], [ %89, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i.i.i.i.i" ] %92 = icmp eq ptr %.sroa.0.047.i.i.i.i.i, %88 br i1 %92, label %182, label %93 @@ -9008,7 +9014,7 @@ _ZN8smallvec10infallible17h38575f4621b0607aE.exit.i.i.i.i.i: ; preds = %.noexc.i %99 = getelementptr inbounds nuw i8, ptr %.sroa.0.047.i.i.i.i.i, i64 16 %100 = load i64, ptr %99, align 8, !noalias !1917, !noundef !4 invoke void %95(ptr noalias noundef nonnull sret({ ptr, ptr, i64, { ptr } }) align 8 captures(none) dereferenceable(32) %.sroa.0.i.i.i.i.i.i.i, ptr noundef nonnull align 8 %96, ptr noundef %98, i64 noundef %100) - to label %176 unwind label %183, !noalias !1901 + to label %178 unwind label %183, !noalias !1901 .lr.ph51.i.i.i.i.i: ; preds = %._crit_edge.i.i.i.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$4push17h4905485e367a78f0E.llvm.222537792231950641.exit.i.i.i.i.i" %.sroa.027.049.i.i.i.i.i = phi ptr [ %101, %"_ZN8smallvec17SmallVec$LT$A$GT$4push17h4905485e367a78f0E.llvm.222537792231950641.exit.i.i.i.i.i" ], [ %.sroa.0.0.lcssa.i.i.i.i.i, %._crit_edge.i.i.i.i.i ] @@ -9062,29 +9068,35 @@ _ZN8smallvec10infallible17h38575f4621b0607aE.exit.i.i.i.i.i: ; preds = %.noexc.i %128 = load i64, ptr %23, align 8 %.sink2.i.i = select i1 %127, i64 %128, i64 %126 %129 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink2.i.i, i64 1) - %130 = extractvalue { i64, i1 } %129, 1 - br i1 %130, label %.thread.i, label %131 - -131: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit.i" - %132 = extractvalue { i64, i1 } %129, 0 - %133 = icmp ult i64 %132, 2 - %134 = add i64 %132, -1 - %135 = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %134, i1 true) - %136 = lshr i64 -1, %135 - %.0.i.i.i = select i1 %133, i64 0, i64 %136 - %137 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i.i, i64 1) - %138 = extractvalue { i64, i1 } %137, 1 - br i1 %138, label %.thread.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" - -.thread.i: ; preds = %131, %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit.i" + %130 = extractvalue { i64, i1 } %129, 0 + %131 = extractvalue { i64, i1 } %129, 1 + br i1 %131, label %.thread.i, label %132 + +132:; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit.i" + %133 = icmp ult i64 %130, 2 + br i1 %133, label %139, label %134 + +134:; preds = %132 + %135 = add i64 %130, -1 + %137 = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %135, i1 true) + %137 = lshr i64 -1, %136 + %138 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %137, i64 1) + br label %139 + +139: ; preds = %134, %132 + %.0.i.i.i = phi { i64, i1 } [ %138, %134 ], [ { i64 1, i1 false }, %132 ] + %140 = extractvalue { i64, i1 } %.0.i.i.i, 1 + br i1 %140, label %.thread.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" + +.thread.i: ; preds = %139, %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h4c28e121514a28f9E.llvm.222537792231950641.exit.i" invoke void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.c909a1c3189337549521d497c7ec076f.115, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.c909a1c3189337549521d497c7ec076f.118) #51 to label %.noexc13 unwind label %116 .noexc13: ; preds = %.thread.i unreachable -"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i": ; preds = %131 - %139 = extractvalue { i64, i1 } %137, 0 +"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i": ; preds = %139 + %139 = extractvalue { i64, i1 } %.0.i.i.i, 0 call void @llvm.experimental.noalias.scope.decl(metadata !1961) %140 = icmp ult i64 %126, 5 %141 = load ptr, ptr %24, align 8, !nonnull !4 @@ -9095,10 +9107,10 @@ _ZN8smallvec10infallible17h38575f4621b0607aE.exit.i.i.i.i.i: ; preds = %.noexc.i %.not.i = icmp ult i64 %139, %142 br i1 %.not.i, label %.invoke, label %146 -.invoke: ; preds = %153, %150, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" - %143 = phi ptr [ @anon.c909a1c3189337549521d497c7ec076f.123, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" ], [ @anon.c909a1c3189337549521d497c7ec076f.115, %150 ], [ @anon.c909a1c3189337549521d497c7ec076f.115, %153 ] - %144 = phi i64 [ 32, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" ], [ 17, %150 ], [ 17, %153 ] - %145 = phi ptr [ @anon.c909a1c3189337549521d497c7ec076f.124, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" ], [ @anon.c909a1c3189337549521d497c7ec076f.116, %150 ], [ @anon.c909a1c3189337549521d497c7ec076f.116, %153 ] +.invoke: ; preds = %155, %152, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" + %143 = phi ptr [ @anon.c909a1c3189337549521d497c7ec076f.123, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" ], [ @anon.c909a1c3189337549521d497c7ec076f.115, %152 ], [ @anon.c909a1c3189337549521d497c7ec076f.115, %155 ] + %144 = phi i64 [ 32, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" ], [ 17, %152 ], [ 17, %155 ] + %145 = phi ptr [ @anon.c909a1c3189337549521d497c7ec076f.124, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" ], [ @anon.c909a1c3189337549521d497c7ec076f.116, %152 ], [ @anon.c909a1c3189337549521d497c7ec076f.116, %155 ] invoke void @_ZN4core9panicking5panic17h44790a89027c670fE(ptr noalias noundef nonnull readonly align 1 %143, i64 noundef %144, ptr noalias noundef readonly align 8 dereferenceable(24) %145) #51 to label %.cont unwind label %116 @@ -9107,53 +9119,53 @@ _ZN8smallvec10infallible17h38575f4621b0607aE.exit.i.i.i.i.i: ; preds = %.noexc.i 146: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h667562a3bcb3b7abE.llvm.222537792231950641.exit.i" %147 = icmp ult i64 %139, 5 - br i1 %147, label %149, label %148 - -148: ; preds = %146 - %.not73.i = icmp eq i64 %126, %139 - br i1 %.not73.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit", label %150 - -149: ; preds = %146 - br i1 %140, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit", label %163 + br i1 %147, label %151, label %150 150: ; preds = %148 - %151 = mul i64 %139, 40 - %or.cond = icmp ugt i64 %139, 230584300921369395 - br i1 %or.cond, label %.invoke, label %152 + %.not73.i = icmp eq i64 %126, %141 + br i1 %.not73.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit", label %152 -152: ; preds = %150 - br i1 %140, label %154, label %153 +152: ; preds = %148 + br i1 %140, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit", label %165 -153: ; preds = %152 - %or.cond38 = icmp ugt i64 %126, 230584300921369395 - br i1 %or.cond38, label %.invoke, label %157 +153: ; preds = %150 + %153 = mul i64 %141, 40 + %or.cond = icmp ugt i64 %141, 230584300921369395 + br i1 %or.cond, label %.invoke, label %154 154: ; preds = %152 - %155 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !1961 - %156 = call noundef align 8 ptr @__rust_alloc(i64 noundef %151, i64 noundef 8) #52, !noalias !1961 - %.not117.i = icmp eq ptr %156, null - br i1 %.not117.i, label %167, label %161 - -157: ; preds = %153 - %158 = mul nuw nsw i64 %.sink.i.i, 40 - %159 = call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %158, i64 noundef 8, i64 noundef %151) #52 - %.not116.i = icmp eq ptr %159, null - br i1 %.not116.i, label %167, label %160 - -160: ; preds = %157, %161 - %.0.i17 = phi ptr [ %156, %161 ], [ %159, %157 ] + br i1 %142, label %156, label %155 + +155: ; preds = %154 + %or.cond38 = icmp ugt i64 %126, 230584300921369395 + br i1 %or.cond38, label %.invoke, label %159 + +156:; preds = %154 + %157 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !1961 + %158 = call noundef align 8 ptr @__rust_alloc(i64 noundef %153, i64 noundef 8) #52, !noalias !1961 + %.not117.i = icmp eq ptr %158, null + br i1 %.not117.i, label %169, label %163 + +159: ; preds = %155 + %160 = mul nuw nsw i64 %.sink.i.i, 40 + %161 = call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %160, i64 noundef 8, i64 noundef %153) #52 + %.not116.i = icmp eq ptr %161, null + br i1 %.not116.i, label %169, label %162 + +162: ; preds = %159, %163 + %.0.i17 = phi ptr [ %158, %163 ], [ %161, %159 ] store i64 1, ptr %5, align 8, !alias.scope !1961 store i64 %142, ptr %23, align 8, !alias.scope !1961 store ptr %.0.i17, ptr %24, align 8, !alias.scope !1961 store i64 %139, ptr %22, align 8, !alias.scope !1961 br label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit" -161: ; preds = %154 +161: ; preds = %156 %162 = mul i64 %142, 40 - call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %156, ptr nonnull align 8 %.sink3.i.i, i64 %162, i1 false) - br label %160 + call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %158, ptr nonnull align 8 %.sink3.i.i, i64 %162, i1 false) + br label %162 -163: ; preds = %149 +163: ; preds = %151 store i64 0, ptr %5, align 8, !alias.scope !1961 %164 = mul i64 %142, 40 call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %23, ptr nonnull align 8 %.sink3.i.i, i64 %164, i1 false) @@ -9177,14 +9189,14 @@ _ZN8smallvec10deallocate17hb07e4c06ee8cd4e3E.exit.i: ; preds = %163 call void @__rust_dealloc(ptr noundef nonnull %.sink3.i.i, i64 noundef %165, i64 noundef 8) #52 br label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit" -167: ; preds = %154, %157 - invoke void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %151) #51 +167: ; preds = %156, %159 + invoke void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %153) #51 to label %.noexc16 unwind label %116 .noexc16: ; preds = %167 unreachable -"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit": ; preds = %149, %_ZN8smallvec10deallocate17hb07e4c06ee8cd4e3E.exit.i, %160, %148 +"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hd61c75db72f8bdf8E.exit": ; preds = %151, %_ZN8smallvec10deallocate17hb07e4c06ee8cd4e3E.exit.i, %162, %150 %168 = load ptr, ptr %24, align 8, !alias.scope !1941, !noalias !1942, !nonnull !4, !noundef !4 %.pre.i15.i.i.i.i.i = load i64, ptr %23, align 8, !alias.scope !1941, !noalias !1942 br label %"_ZN8smallvec17SmallVec$LT$A$GT$4push17h4905485e367a78f0E.llvm.222537792231950641.exit.i.i.i.i.i" @@ -9247,7 +9259,7 @@ _ZN8smallvec10deallocate17hb07e4c06ee8cd4e3E.exit.i: ; preds = %163 br label %.body.i.i.i.i .body.i.i.i.i: ; preds = %.loopexit.split-lp.i.i.i.i.loopexit, %.loopexit.split-lp.i.i.i.i.loopexit.split-lp, %.loopexit.i.i.i.i, %183, %116 - %eh.lpad-body.i.i.i.i = phi { ptr, i32 } [ %184, %183 ], [ %117, %116 ], [ %lpad.loopexit.i.i.i.i, %.loopexit.i.i.i.i ], [ %lpad.loopexit, %.loopexit.split-lp.i.i.i.i.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp.i.i.i.i.loopexit.split-lp ] + %eh.lpad-body.i.i.i.i = phi { ptr, i32 } [ %184, %185 ], [ %117, %116 ], [ %lpad.loopexit.i.i.i.i, %.loopexit.i.i.i.i ], [ %lpad.loopexit, %.loopexit.split-lp.i.i.i.i.loopexit ], [ %lpad.loopexit.split-lp, %.loopexit.split-lp.i.i.i.i.loopexit.split-lp ] invoke void @"_ZN4core3ptr100drop_in_place$LT$smallvec..SmallVec$LT$$u5b$http..header..value..HeaderValue$u3b$$u20$4$u5d$$GT$$GT$17h692d7bc240114141E"(ptr noalias noundef nonnull align 8 dereferenceable(176) %5) #49 to label %.body.i unwind label %185, !noalias !1901 @@ -9274,7 +9286,7 @@ _ZN8smallvec10deallocate17hb07e4c06ee8cd4e3E.exit.i: ; preds = %163 %192 = load ptr, ptr %.sroa.5.0..sroa_idx2.i.i, align 8, !alias.scope !1985, !noundef !4 %193 = getelementptr inbounds nuw i8, ptr %7, i64 16 %194 = load i64, ptr %193, align 8, !alias.scope !1985, !noundef !4 - invoke void %190(ptr noalias noundef nonnull align 8 dereferenceable(8) %191, ptr noundef %192, i64 noundef %194) + invoke void %192(ptr noalias noundef nonnull align 8 dereferenceable(8) %191, ptr noundef %192, i64 noundef %194) to label %.body unwind label %195 195: ; preds = %188 diff --git a/bench/bdwgc/optimized/gc.ll b/bench/bdwgc/optimized/gc.ll index 5e825b79533..e0ee4ae440a 100644 --- a/bench/bdwgc/optimized/gc.ll +++ b/bench/bdwgc/optimized/gc.ll @@ -2716,25 +2716,28 @@ GC_find_header.exit.i.i: ; preds = %43 %53 = icmp ult ptr %.0.i.i, inttoptr (i64 4096 to ptr) br i1 %53, label %.lr.ph.i.i, label %GC_find_starting_hblk.exit.i, !llvm.loop !67 -GC_find_starting_hblk.exit.i: ; preds = %GC_find_header.exit.i.i, %33 - %.031.i = phi ptr [ %31, %33 ], [ %.0.i.i, %GC_find_header.exit.i.i ] - %.028.i = phi ptr [ %34, %33 ], [ %38, %GC_find_header.exit.i.i ] - %.027.i = phi ptr [ %0, %33 ], [ %38, %GC_find_header.exit.i.i ] - %54 = getelementptr inbounds nuw i8, ptr %.031.i, i64 25 - %55 = load i8, ptr %54, align 1, !tbaa !63 - %56 = and i8 %55, 4 - %.not.i = icmp eq i8 %56, 0 - br i1 %.not.i, label %57, label %GC_base.exit.thread - -57: ; preds = %GC_find_starting_hblk.exit.i - %58 = tail call align 8 ptr @llvm.ptrmask.p0.i64(ptr %.027.i, i64 -8) +GC_find_starting_hblk.exit.i: ; preds = %GC_find_header.exit.i.i + %54 = tail call align 8 ptr @llvm.ptrmask.p0.i64(ptr %38, i64 -8) + br label %GC_find_starting_hblk.exit.i + +GC_find_starting_hblk.exit.i:; preds = %GC_find_starting_hblk.exit.i, %33 + %.031.i = phi ptr [ %31, %33 ], [ %.0.i.i, %GC_find_starting_hblk.exit.i.loopexit ] + %.028.i = phi ptr [ %34, %33 ], [ %38, %GC_find_starting_hblk.exit.i.loopexit ] + %.027.i = phi ptr [ %0, %33 ], [ %54, %GC_find_starting_hblk.exit.i.loopexit ] + %55 = getelementptr inbounds nuw i8, ptr %.031.i, i64 25 + %56 = load i8, ptr %55, align 1, !tbaa !63 + %57 = and i8 %56, 4 + %.not.i = icmp eq i8 %57, 0 + br i1 %.not.i, label %58, label %GC_base.exit.thread + +58: ; preds = %GC_find_starting_hblk.exit.i %59 = getelementptr inbounds nuw i8, ptr %.031.i, i64 32 %60 = load i64, ptr %59, align 8, !tbaa !58 - %61 = ptrtoint ptr %58 to i64 + %61 = ptrtoint ptr %.027.i to i64 %62 = and i64 %61, 4088 %63 = urem i64 %62, %60 %64 = sub nsw i64 0, %63 - %65 = getelementptr inbounds i8, ptr %58, i64 %64 + %65 = getelementptr inbounds i8, ptr %.027.i, i64 %64 %66 = getelementptr inbounds nuw i8, ptr %65, i64 %60 %67 = getelementptr inbounds nuw i8, ptr %.028.i, i64 4096 %68 = icmp ult ptr %67, %66 @@ -2742,16 +2745,16 @@ GC_find_starting_hblk.exit.i: ; preds = %GC_find_header.exit %or.cond.not34.i.not16 = and i1 %69, %68 %70 = icmp uge ptr %0, %66 %or.cond30.i.not13 = or i1 %70, %or.cond.not34.i.not16 - %71 = icmp eq ptr %58, null + %71 = icmp eq ptr %.027.i, null %or.cond = or i1 %71, %or.cond30.i.not13 br i1 %or.cond, label %GC_base.exit.thread, label %73 -GC_base.exit.thread: ; preds = %57, %GC_find_starting_hblk.exit.i, %29, %22, %1 +GC_base.exit.thread: ; preds = %58, %GC_find_starting_hblk.exit.i, %29, %22, %1 %72 = load ptr, ptr @GC_is_visible_print_proc, align 8, !tbaa !12 tail call void %72(ptr noundef %0) #46 br label %73 -73: ; preds = %57, %GC_find_header.exit, %GC_base.exit.thread +73: ; preds = %58, %GC_find_header.exit, %GC_base.exit.thread ret ptr %0 } diff --git a/bench/egg-rs/optimized/4kyf9c0dbd7gw6jh.ll b/bench/egg-rs/optimized/4kyf9c0dbd7gw6jh.ll index 0e626655b2b..c8f20ac5564 100644 --- a/bench/egg-rs/optimized/4kyf9c0dbd7gw6jh.ll +++ b/bench/egg-rs/optimized/4kyf9c0dbd7gw6jh.ll @@ -37,34 +37,48 @@ define hidden { ptr, ptr } @"_ZN101_$LT$$RF$mut$u20$smallvec..SmallVec$LT$A$GT$$ ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.5520512306816613332"(i64 noundef %0) unnamed_addr #1 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.sroa.01.0 = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not. = xor i1 %7, true + br i1 %2, label %8, label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %8 + +8: ; preds = %1, %3 + %.sroa.01.0 = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %9 = extractvalue { i64, i1 } %.sroa.01.0, 1 + %10 = extractvalue { i64, i1 } %.sroa.01.0, 0 + %.sroa.3.0 = select i1 %9, i64 undef, i64 %10 + %not. = xor i1 %9, true %.sroa.0.0 = zext i1 %not. to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0, 1 ret { i64, i64 } %10 } ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @_ZN4core3ops8function6FnOnce9call_once17h23c59aa9d9272bd8E.llvm.5520512306816613332(i64 noundef %0) unnamed_addr #1 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.sroa.01.0.i = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not..i = xor i1 %7, true + br i1 %2, label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.5520512306816613332.exit", label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.5520512306816613332.exit" + +"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.5520512306816613332.exit": ; preds = %1, %3 + %.sroa.01.0.i = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %8 = extractvalue { i64, i1 } %.sroa.01.0.i, 1 + %9 = extractvalue { i64, i1 } %.sroa.01.0.i, 0 + %.sroa.3.0.i = select i1 %8, i64 undef, i64 %9 + %not..i = xor i1 %8, true %.sroa.0.0.i = zext i1 %not..i to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0.i, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0.i, 1 ret { i64, i64 } %10 } @@ -230,28 +244,34 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h2d %.sink13.i = select i1 %3, i64 %5, i64 %2 %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink13.i, i64 1) %7 = extractvalue { i64, i1 } %6, 1 - br i1 %7, label %16, label %8 + br i1 %7, label %17, label %8 8: ; preds = %1 %9 = extractvalue { i64, i1 } %6, 0 %10 = icmp ult i64 %9, 2 - %11 = add i64 %9, -1 - %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %11, i1 true) - %13 = lshr i64 -1, %12 - %.sroa.01.0.i.i = select i1 %10, i64 0, i64 %13 - %14 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i, i64 1) - %15 = extractvalue { i64, i1 } %14, 1 - br i1 %15, label %16, label %17 - -16: ; preds = %1, %8 + br i1 %9, label %_ZN4core3ops8function6FnOnce9call_once17h23c59aa9d9272bd8E.llvm.5520512306816613332.exit, label %9 + +11:; preds = %8 + %10 = add i64 %9, -1 + %14 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %10, i1 true) + %14 = lshr i64 -1, %13 + %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %14, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17h23c59aa9d9272bd8E.llvm.5520512306816613332.exit + +_ZN4core3ops8function6FnOnce9call_once17h23c59aa9d9272bd8E.llvm.5520512306816613332.exit: ; preds = %8, %11 + %.sroa.01.0.i.i = phi { i64, i1 } [ %15, %11 ], [ { i64 1, i1 false }, %8 ] + %16 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 1 + br i1 %16, label %17, label %18 + +17: ; preds = %1, %_ZN4core3ops8function6FnOnce9call_once17h23c59aa9d9272bd8E.llvm.5520512306816613332.exit tail call void @_ZN4core6option13expect_failed17h7f842a57ad883afaE(ptr noalias noundef nonnull readonly align 1 @anon.2c703d1b4d91991e05c77a3eb1866866.9.llvm.5520512306816613332, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.2c703d1b4d91991e05c77a3eb1866866.13.llvm.5520512306816613332) #14 unreachable -17: ; preds = %8 - %18 = extractvalue { i64, i1 } %14, 0 +17: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h23c59aa9d9272bd8E.llvm.5520512306816613332.exit + %18 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 0 %19 = tail call { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hb59f0f5d52e8b465E.llvm.5520512306816613332"(ptr noalias noundef nonnull align 8 dereferenceable(48) %0, i64 noundef %18) %20 = extractvalue { i64, i64 } %19, 0 - switch i64 %20, label %22 [ + switch i64 %20, label %23 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17hcb2e1139e40344ddE.exit i64 0, label %21 ] diff --git a/bench/ffmpeg/optimized/avidec.ll b/bench/ffmpeg/optimized/avidec.ll index c541e4ab5bb..3cef5fe4c58 100644 --- a/bench/ffmpeg/optimized/avidec.ll +++ b/bench/ffmpeg/optimized/avidec.ll @@ -2134,14 +2134,14 @@ calculate_bitrate.exit: ; preds = %._crit_edge107.thre .critedge107.loopexit133.i.i: ; preds = %996 %997 = icmp slt i64 %.193.i.i, 67108865 + %998 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %.189.i.i, i64 %.191.i.i) br label %.critedge107.i.i .critedge107.i.i: ; preds = %.critedge107.loopexit133.i.i, %.preheader.i.i %.092.lcssa.i.i = phi i1 [ %997, %.critedge107.loopexit133.i.i ], [ true, %.preheader.i.i ] - %.088.lcssa.i.i = phi i64 [ %.189.i.i, %.critedge107.loopexit133.i.i ], [ -4611686018427387904, %.preheader.i.i ] - %998 = call { i64, i1 } @llvm.ssub.with.overflow.i64(i64 %.088.lcssa.i.i, i64 %.191.i.i) - %999 = extractvalue { i64, i1 } %998, 1 - %1000 = extractvalue { i64, i1 } %998, 0 + %.088.lcssa.i.i = phi { i64, i1 } [ %998, %.critedge107.loopexit133.i.i ], [ { i64 -9223372036854775807, i1 false }, %.preheader.i.i ] + %999 = extractvalue { i64, i1 } %.088.lcssa.i.i, 1 + %999 = extractvalue { i64, i1 } %.088.lcssa.i.i, 0 %1001 = icmp slt i64 %1000, 0 %1002 = select i1 %1001, i64 9223372036854775807, i64 -9223372036854775808 %1003 = select i1 %999, i64 %1002, i64 %1000 diff --git a/bench/folly/optimized/AsyncUDPSocket.ll b/bench/folly/optimized/AsyncUDPSocket.ll index 80a97d76ad1..5b9ad4c7e6b 100644 --- a/bench/folly/optimized/AsyncUDPSocket.ll +++ b/bench/folly/optimized/AsyncUDPSocket.ll @@ -7525,13 +7525,13 @@ define linkonce_odr void @_ZN5folly12small_vectorINS_14AsyncUDPSocket21full_sock 10: ; preds = %5 %11 = load i64, ptr %0, align 8, !tbaa !185 - %.not.i.i = icmp sgt i64 %11, -1 + %.not.i.i = icmp slt i64 %11, 0 %12 = getelementptr inbounds nuw i8, ptr %0, i64 16 %13 = load i64, ptr %12, align 8 - %.0.i.i = select i1 %.not.i.i, i64 1, i64 %13 - %14 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %.0.i.i, i64 3) + %14 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %13, i64 3) %15 = extractvalue { i64, i1 } %14, 1 - br i1 %15, label %_ZN5folly11checked_mulImvEEbPT_S1_S1_.exit.i, label %_ZNK5folly12small_vectorINS_14AsyncUDPSocket21full_sockaddr_storageELm1EvE14computeNewSizeEv.exit, !prof !12 + %16 = select i1 %.not.i.i, i1 %15, i1 false + br i1 %16, label %_ZN5folly11checked_mulImvEEbPT_S1_S1_.exit.i, label %_ZNK5folly12small_vectorINS_14AsyncUDPSocket21full_sockaddr_storageELm1EvE14computeNewSizeEv.exit, !prof !12 _ZN5folly11checked_mulImvEEbPT_S1_S1_.exit.i: ; preds = %10 tail call void @_ZN5folly6detail16throw_exception_ISt12length_errorJPKcEEEvDpT0_(ptr noundef nonnull @.str.48) #10 @@ -7542,6 +7542,7 @@ _ZNK5folly12small_vectorINS_14AsyncUDPSocket21full_sockaddr_storageELm1EvE14comp %17 = lshr i64 %16, 1 %18 = tail call i64 @llvm.umin.i64(i64 %17, i64 4611686018427387902) %.sroa.speculated.i = add nuw nsw i64 %18, 1 + %.sroa.speculated.i = select i1 %.not.i.i, i64 %20, i64 2 %.sroa.speculated30 = tail call i64 @llvm.umax.i64(i64 %1, i64 %.sroa.speculated.i) %19 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %.sroa.speculated30, i64 136) %20 = extractvalue { i64, i1 } %19, 1 @@ -7584,7 +7585,7 @@ _ZN5folly10canNallocxEv.exit.i: ; preds = %27, %25, %21 br label %_ZN5folly14goodMallocSizeEm.exit _ZN5folly14goodMallocSizeEm.exit: ; preds = %_ZN5folly10canNallocxEv.exit.i, %33 - %.0.i14 = phi i64 [ %35, %33 ], [ %22, %_ZN5folly10canNallocxEv.exit.i ] + %.0.i14 = phi i64 [ %35, %35 ], [ %22, %_ZN5folly10canNallocxEv.exit.i ] %36 = udiv i64 %.0.i14, 136 %37 = mul nuw i64 %36, 136 %38 = call noalias ptr @malloc(i64 noundef %37) #43 diff --git a/bench/image-rs/optimized/1clnprdgqfw2q9lq.ll b/bench/image-rs/optimized/1clnprdgqfw2q9lq.ll index 21799ca88a9..05276bf038e 100644 --- a/bench/image-rs/optimized/1clnprdgqfw2q9lq.ll +++ b/bench/image-rs/optimized/1clnprdgqfw2q9lq.ll @@ -36952,8 +36952,8 @@ define { i64, i64 } @_ZN5image4flat12SampleLayout5index17ha29527056fc9b04fE(ptr br label %_ZN5image4flat12SampleLayout9in_bounds17h56cf24bc1f83b0dcE.exit.thread _ZN5image4flat12SampleLayout9in_bounds17h56cf24bc1f83b0dcE.exit.thread: ; preds = %35, %30, %13, %4 - %.sroa.3.0 = phi i64 [ undef, %4 ], [ undef, %13 ], [ undef, %30 ], [ %39, %35 ] - %.sroa.0.0 = phi i64 [ 0, %4 ], [ 0, %13 ], [ 0, %30 ], [ %spec.select20.i, %35 ] + %.sroa.3.0 = phi i64 [ undef, %4 ], [ undef, %13 ], [ %39, %35 ], [ undef, %30 ] + %.sroa.0.0 = phi i64 [ 0, %4 ], [ 0, %13 ], [ %spec.select20.i, %35 ], [ 0, %30 ] %40 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 %41 = insertvalue { i64, i64 } %40, i64 %.sroa.3.0, 1 ret { i64, i64 } %41 @@ -36994,9 +36994,9 @@ define { i64, i64 } @_ZN5image4flat12SampleLayout21index_ignoring_bounds17h46972 %spec.select20 = zext i1 %not. to i64 br label %28 -28: ; preds = %23, %18, %4 - %.sroa.5.0 = phi i64 [ undef, %4 ], [ undef, %18 ], [ %27, %23 ] - %.sroa.0.0 = phi i64 [ 0, %4 ], [ 0, %18 ], [ %spec.select20, %23 ] +28: ; preds = %18, %23, %4 + %.sroa.5.0 = phi i64 [ undef, %4 ], [ %27, %23 ], [ undef, %18 ] + %.sroa.0.0 = phi i64 [ 0, %4 ], [ %spec.select20, %23 ], [ 0, %18 ] %29 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 %30 = insertvalue { i64, i64 } %29, i64 %.sroa.5.0, 1 ret { i64, i64 } %30 diff --git a/bench/image-rs/optimized/2s4mh02dvph60euq.ll b/bench/image-rs/optimized/2s4mh02dvph60euq.ll index eb7af47e524..3f62040afa7 100644 --- a/bench/image-rs/optimized/2s4mh02dvph60euq.ll +++ b/bench/image-rs/optimized/2s4mh02dvph60euq.ll @@ -15593,7 +15593,7 @@ _ZN5alloc3fmt6format17h55b1a8bf61a7c713E.llvm.3890463254259644073.exit: ; preds %80 = extractvalue { i32, i1 } %78, 0 br i1 %79, label %.thread548, label %90 -.thread548: ; preds = %76, %72, %68 +.thread548: ; preds = %68, %72, %76 call void @llvm.lifetime.start.p0(ptr nonnull %13), !noalias !2412 store i8 0, ptr %13, align 8, !noalias !2417 %.sroa.5413.0..sroa_idx = getelementptr inbounds nuw i8, ptr %13, i64 1 diff --git a/bench/jiff-rs/optimized/28312hk957xkl2d47pfknuimo.ll b/bench/jiff-rs/optimized/28312hk957xkl2d47pfknuimo.ll index 65e7d9eb069..1beb1026e6b 100644 --- a/bench/jiff-rs/optimized/28312hk957xkl2d47pfknuimo.ll +++ b/bench/jiff-rs/optimized/28312hk957xkl2d47pfknuimo.ll @@ -10528,9 +10528,9 @@ define hidden { i64, ptr } @_ZN4jiff4util5parse8fraction17h29a875d99298212aE(ptr call void @llvm.lifetime.end.p0(ptr nonnull %16) br label %.loopexit -37: ; preds = %66, %29 - %.sroa.021.0 = phi i64 [ 0, %29 ], [ %73, %66 ] - %.sroa.045.0 = phi ptr [ %0, %29 ], [ %.sroa.045.1, %66 ] +37: ; preds = %.critedge, %29 + %.sroa.021.0 = phi i64 [ 0, %29 ], [ %79, %.critedge ] + %.sroa.045.0 = phi ptr [ %0, %29 ], [ %.sroa.045.1, %.critedge ] %38 = icmp ne ptr %.sroa.045.0, %30 %.sroa.045.1.idx = zext i1 %38 to i64 %.sroa.045.1 = getelementptr inbounds nuw i8, ptr %.sroa.045.0, i64 %.sroa.045.1.idx @@ -10559,9 +10559,9 @@ define hidden { i64, ptr } @_ZN4jiff4util5parse8fraction17h29a875d99298212aE(ptr %49 = inttoptr i64 %.sroa.021.1 to ptr br label %.loopexit -.loopexit: ; preds = %60, %75, %.loopexit.loopexit, %.thread59, %.thread, %21, %31 - %.sroa.8.0 = phi ptr [ %26, %21 ], [ %36, %31 ], [ %57, %.thread ], [ %86, %.thread59 ], [ %49, %.loopexit.loopexit ], [ %80, %75 ], [ %65, %60 ] - %.sroa.0.0 = phi i64 [ 1, %21 ], [ 1, %31 ], [ 1, %.thread ], [ 1, %.thread59 ], [ 0, %.loopexit.loopexit ], [ 1, %75 ], [ 1, %60 ] +.loopexit: ; preds = %60, %69, %.loopexit.loopexit, %.thread58, %.thread, %21, %31 + %.sroa.8.0 = phi ptr [ %26, %21 ], [ %36, %31 ], [ %57, %.thread ], [ %86, %.thread58 ], [ %49, %.loopexit.loopexit ], [ %80, %69 ], [ %65, %60 ] + %.sroa.0.0 = phi i64 [ 1, %21 ], [ 1, %31 ], [ 1, %.thread ], [ 1, %.thread58 ], [ 0, %.loopexit.loopexit ], [ 1, %69 ], [ 1, %60 ] %50 = insertvalue { i64, ptr } poison, i64 %.sroa.0.0, 0 %51 = insertvalue { i64, ptr } %50, ptr %.sroa.8.0, 1 ret { i64, ptr } %51 @@ -10593,7 +10593,7 @@ define hidden { i64, ptr } @_ZN4jiff4util5parse8fraction17h29a875d99298212aE(ptr 58: ; preds = %39 %59 = icmp ugt i8 %42, 9 - br i1 %59, label %75, label %66, !prof !51 + br i1 %59, label %69, label %66, !prof !51 60: ; preds = %39 call void @llvm.lifetime.start.p0(ptr nonnull %15) @@ -10619,17 +10619,11 @@ define hidden { i64, ptr } @_ZN4jiff4util5parse8fraction17h29a875d99298212aE(ptr br label %.loopexit 66: ; preds = %58 - %67 = zext nneg i8 %42 to i64 - %68 = tail call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %.sroa.021.0, i64 10) - %69 = extractvalue { i64, i1 } %68, 1 - %70 = extractvalue { i64, i1 } %68, 0 - %71 = tail call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %70, i64 %67) - %72 = extractvalue { i64, i1 } %71, 1 - %73 = extractvalue { i64, i1 } %71, 0 - %74 = select i1 %69, i1 true, i1 %72 - br i1 %74, label %.thread59, label %37, !prof !971 - -75: ; preds = %58 + %67 = tail call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %.sroa.021.0, i64 10) + %68 = extractvalue { i64, i1 } %67, 1 + br i1 %68, label %.thread58, label %.critedge, !prof !51 + +69:; preds = %58 call void @llvm.lifetime.start.p0(ptr nonnull %12) call void @llvm.lifetime.start.p0(ptr nonnull %11) call void @llvm.lifetime.start.p0(ptr nonnull %10) @@ -10653,6 +10647,14 @@ define hidden { i64, ptr } @_ZN4jiff4util5parse8fraction17h29a875d99298212aE(ptr br label %.loopexit .thread59: ; preds = %66 + %75 = zext nneg i8 %42 to i64 + %76 = extractvalue { i64, i1 } %67, 0 + %77 = tail call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %76, i64 %75) + %78 = extractvalue { i64, i1 } %77, 1 + %79 = extractvalue { i64, i1 } %77, 0 + br i1 %78, label %.thread58, label %37, !prof !971 + +.thread58: ; preds = %.critedge, %66 call void @llvm.lifetime.start.p0(ptr nonnull %9) call void @llvm.lifetime.start.p0(ptr nonnull %8) call void @llvm.lifetime.start.p0(ptr nonnull %7) @@ -11955,4 +11957,4 @@ attributes #15 = { noreturn } !968 = distinct !{!968, !969, !"_ZN4jiff4span4Span24to_invariant_nanoseconds17h76ceb1a6f87bdeb2E: argument 0"} !969 = distinct !{!969, !"_ZN4jiff4span4Span24to_invariant_nanoseconds17h76ceb1a6f87bdeb2E"} !970 = !{!"branch_weights", !"expected", i32 2000, i32 1} -!971 = !{!"branch_weights", i32 2146410, i32 -2146410} +!971 = !{!"branch_weights", !"expected", i32 0, i32 -2147483648} diff --git a/bench/just-rs/optimized/4sd695eow2u4pww6.ll b/bench/just-rs/optimized/4sd695eow2u4pww6.ll index ef31502009c..68757eaeb7b 100644 --- a/bench/just-rs/optimized/4sd695eow2u4pww6.ll +++ b/bench/just-rs/optimized/4sd695eow2u4pww6.ll @@ -1039,45 +1039,56 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17h08b 7: ; preds = %2 %8 = icmp ult i64 %1, 2 - %9 = add i64 %1, -1 - %10 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %9, i1 true) - %11 = lshr i64 -1, %10 - %.0 = select i1 %8, i64 0, i64 %11 - %12 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0, i64 1) - %13 = extractvalue { i64, i1 } %12, 1 - br i1 %13, label %14, label %15 + br i1 %8, label %14, label %9 + +9:; preds = %7 + %10 = add i64 %1, -1 + %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %10, i1 true) + %12 = lshr i64 -1, %11 + %13 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %12, i64 1) + br label %14 + +14: ; preds = %7, %9 + %.0 = phi { i64, i1 } [ %13, %9 ], [ { i64 1, i1 false }, %7 ] + %15 = extractvalue { i64, i1 } %.0, 1 + br i1 %15, label %16, label %17 -14: ; preds = %7 +14: ; preds = %14 tail call void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.fd066379c8f5c22f18c2c2050a365f6b.6, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.fd066379c8f5c22f18c2c2050a365f6b.8) #26 unreachable -15: ; preds = %7 - %16 = extractvalue { i64, i1 } %12, 0 +15: ; preds = %14 + %16 = extractvalue { i64, i1 } %.0, 0 %17 = shl nuw i64 %4, 1 %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %17, i64 %16) - %18 = icmp ugt i64 %.0.sroa.speculated.i, 384307168202282325 - %19 = mul nuw nsw i64 %.0.sroa.speculated.i, 24 - br i1 %18, label %24, label %20 + %18 = icmp eq i64 %.0.sroa.speculated.i, 0 + br i1 %20, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5861e08ea68f5729E.exit", label %21 20: ; preds = %15 - %21 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1 - %22 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %19, i64 noundef range(i64 1, 0) 8) #29 - %23 = icmp eq ptr %22, null - br i1 %23, label %25, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5861e08ea68f5729E.exit" + %22 = icmp ugt i64 %.0.sroa.speculated.i, 384307168202282325 + %23 = mul nuw nsw i64 %.0.sroa.speculated.i, 24 + br i1 %22, label %28, label %24 -24: ; preds = %15 +24: ; preds = %21 + %25 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1 + %26 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %23, i64 noundef range(i64 1, 0) 8) #29 + %27 = icmp eq ptr %26, null + br i1 %27, label %29, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5861e08ea68f5729E.exit" + +28: ; preds = %21 tail call void @_ZN5alloc7raw_vec17capacity_overflow17hbca7785f3bc15d50E() #26 unreachable 25: ; preds = %20 - tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %19) #26 + tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %23) #26 unreachable -"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5861e08ea68f5729E.exit": ; preds = %20 +"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5861e08ea68f5729E.exit": ; preds = %17, %20 + %.sroa.3.0.i = phi ptr [ inttoptr (i64 8 to ptr), %17 ], [ %26, %24 ] call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %0, i64 24, i1 false) store i64 %.0.sroa.speculated.i, ptr %0, align 8 %.sroa.2.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 8 - store ptr %22, ptr %.sroa.2.0..sroa_idx, align 8 + store ptr %.sroa.3.0.i, ptr %.sroa.2.0..sroa_idx, align 8 %.sroa.3.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 16 store i64 0, ptr %.sroa.3.0..sroa_idx, align 8 %26 = getelementptr inbounds nuw i8, ptr %0, i64 24 @@ -1134,7 +1145,7 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17h08b br label %_ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i _ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i: ; preds = %46, %42 - %.sroa.012.1.i.i.pn.i.i.i.i = phi ptr [ %45, %42 ], [ %48, %46 ] + %.sroa.012.1.i.i.pn.i.i.i.i = phi ptr [ %45, %46 ], [ %48, %50 ] %.not.i.i.i = icmp eq ptr %.sroa.012.1.i.i.pn.i.i.i.i, null br i1 %.not.i.i.i, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hbd72470cc98e4b00E.exit.i.i", label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17h03734f8900bdeb60E.exit.i" @@ -1161,7 +1172,7 @@ _ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i: ; preds = %46, %4 %50 = landingpad { ptr, i32 } cleanup invoke void @"_ZN4core3ptr65drop_in_place$LT$alloc..vec..Vec$LT$alloc..string..String$GT$$GT$17ha3e1c5dba4e0236cE"(ptr noalias noundef nonnull align 8 dereferenceable(24) %3) #27 - to label %53 unwind label %51, !noalias !128 + to label %57 unwind label %51, !noalias !128 51: ; preds = %49 %52 = landingpad { ptr, i32 } @@ -1194,45 +1205,56 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17h75c 7: ; preds = %2 %8 = icmp ult i64 %1, 2 - %9 = add i64 %1, -1 - %10 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %9, i1 true) - %11 = lshr i64 -1, %10 - %.0 = select i1 %8, i64 0, i64 %11 - %12 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0, i64 1) - %13 = extractvalue { i64, i1 } %12, 1 - br i1 %13, label %14, label %15 + br i1 %8, label %14, label %9 + +9:; preds = %7 + %10 = add i64 %1, -1 + %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %10, i1 true) + %12 = lshr i64 -1, %11 + %13 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %12, i64 1) + br label %14 + +14: ; preds = %7, %9 + %.0 = phi { i64, i1 } [ %13, %9 ], [ { i64 1, i1 false }, %7 ] + %15 = extractvalue { i64, i1 } %.0, 1 + br i1 %15, label %16, label %17 -14: ; preds = %7 +14: ; preds = %14 tail call void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.fd066379c8f5c22f18c2c2050a365f6b.6, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.fd066379c8f5c22f18c2c2050a365f6b.8) #26 unreachable -15: ; preds = %7 - %16 = extractvalue { i64, i1 } %12, 0 +15: ; preds = %14 + %16 = extractvalue { i64, i1 } %.0, 0 %17 = shl nuw i64 %4, 1 %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %17, i64 %16) - %18 = icmp ugt i64 %.0.sroa.speculated.i, 384307168202282325 - %19 = mul nuw nsw i64 %.0.sroa.speculated.i, 24 - br i1 %18, label %24, label %20 + %18 = icmp eq i64 %.0.sroa.speculated.i, 0 + br i1 %20, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17he9ff884f74647b3fE.exit", label %21 20: ; preds = %15 - %21 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1 - %22 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %19, i64 noundef range(i64 1, 0) 8) #29 - %23 = icmp eq ptr %22, null - br i1 %23, label %25, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17he9ff884f74647b3fE.exit" + %22 = icmp ugt i64 %.0.sroa.speculated.i, 384307168202282325 + %23 = mul nuw nsw i64 %.0.sroa.speculated.i, 24 + br i1 %22, label %28, label %24 -24: ; preds = %15 +24: ; preds = %21 + %25 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1 + %26 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %23, i64 noundef range(i64 1, 0) 8) #29 + %27 = icmp eq ptr %26, null + br i1 %27, label %29, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17he9ff884f74647b3fE.exit" + +28: ; preds = %21 tail call void @_ZN5alloc7raw_vec17capacity_overflow17hbca7785f3bc15d50E() #26 unreachable 25: ; preds = %20 - tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %19) #26 + tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %23) #26 unreachable -"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17he9ff884f74647b3fE.exit": ; preds = %20 +"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17he9ff884f74647b3fE.exit": ; preds = %17, %20 + %.sroa.3.0.i = phi ptr [ inttoptr (i64 8 to ptr), %17 ], [ %26, %24 ] call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %0, i64 24, i1 false) store i64 %.0.sroa.speculated.i, ptr %0, align 8 %.sroa.2.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 8 - store ptr %22, ptr %.sroa.2.0..sroa_idx, align 8 + store ptr %.sroa.3.0.i, ptr %.sroa.2.0..sroa_idx, align 8 %.sroa.3.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 16 store i64 0, ptr %.sroa.3.0..sroa_idx, align 8 %26 = getelementptr inbounds nuw i8, ptr %0, i64 24 @@ -1289,7 +1311,7 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17h75c br label %_ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i _ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i: ; preds = %46, %42 - %.sroa.012.1.i.i.pn.i.i.i.i = phi ptr [ %45, %42 ], [ %48, %46 ] + %.sroa.012.1.i.i.pn.i.i.i.i = phi ptr [ %45, %46 ], [ %48, %50 ] %.not.i.i.i = icmp eq ptr %.sroa.012.1.i.i.pn.i.i.i.i, null br i1 %.not.i.i.i, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17h7dd6a25ccb7b7f95E.exit.i.i", label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17hfbf26be2030f30fdE.exit.i" @@ -1316,7 +1338,7 @@ _ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i: ; preds = %46, %4 %50 = landingpad { ptr, i32 } cleanup invoke void @"_ZN4core3ptr62drop_in_place$LT$alloc..vec..Vec$LT$std..path..PathBuf$GT$$GT$17h9188189f3152f5b6E"(ptr noalias noundef nonnull align 8 dereferenceable(24) %3) #27 - to label %53 unwind label %51, !noalias !145 + to label %57 unwind label %51, !noalias !145 51: ; preds = %49 %52 = landingpad { ptr, i32 } @@ -1349,45 +1371,56 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17ha09 7: ; preds = %2 %8 = icmp ult i64 %1, 2 - %9 = add i64 %1, -1 - %10 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %9, i1 true) - %11 = lshr i64 -1, %10 - %.0 = select i1 %8, i64 0, i64 %11 - %12 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0, i64 1) - %13 = extractvalue { i64, i1 } %12, 1 - br i1 %13, label %14, label %15 + br i1 %8, label %14, label %9 -14: ; preds = %7 +9:; preds = %7 + %10 = add i64 %1, -1 + %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %10, i1 true) + %12 = lshr i64 -1, %11 + %13 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %12, i64 1) + br label %14 + +14: ; preds = %7, %9 + %.0 = phi { i64, i1 } [ %13, %9 ], [ { i64 1, i1 false }, %7 ] + %15 = extractvalue { i64, i1 } %.0, 1 + br i1 %15, label %16, label %17 + +16: ; preds = %14 tail call void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.fd066379c8f5c22f18c2c2050a365f6b.6, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.fd066379c8f5c22f18c2c2050a365f6b.8) #26 unreachable -15: ; preds = %7 - %16 = extractvalue { i64, i1 } %12, 0 +15: ; preds = %14 + %16 = extractvalue { i64, i1 } %.0, 0 %17 = shl nuw i64 %4, 1 %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %17, i64 %16) - %18 = icmp ugt i64 %.0.sroa.speculated.i, 288230376151711743 - %19 = shl nuw nsw i64 %.0.sroa.speculated.i, 5 - br i1 %18, label %24, label %20 + %18 = icmp eq i64 %.0.sroa.speculated.i, 0 + br i1 %20, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17hb6fe06641c042f68E.llvm.205512763258348018.exit", label %21 -20: ; preds = %15 +21: ; preds = %17 + %22 = icmp ugt i64 %.0.sroa.speculated.i, 288230376151711743 + %23 = shl nuw nsw i64 %.0.sroa.speculated.i, 5 + br i1 %22, label %28, label %24 + +20: ; preds = %21 %21 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1 - %22 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %19, i64 noundef range(i64 1, 0) 8) #29 + %22 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %23, i64 noundef range(i64 1, 0) 8) #29 %23 = icmp eq ptr %22, null br i1 %23, label %25, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17hb6fe06641c042f68E.llvm.205512763258348018.exit" -24: ; preds = %15 +24: ; preds = %21 tail call void @_ZN5alloc7raw_vec17capacity_overflow17hbca7785f3bc15d50E() #26 unreachable 25: ; preds = %20 - tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %19) #26 + tail call void @_ZN5alloc5alloc18handle_alloc_error17h426354a964e0805cE(i64 noundef 8, i64 noundef %23) #26 unreachable -"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17hb6fe06641c042f68E.llvm.205512763258348018.exit": ; preds = %20 +"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17hb6fe06641c042f68E.llvm.205512763258348018.exit": ; preds = %17, %20 + %.sroa.3.0.i = phi ptr [ inttoptr (i64 8 to ptr), %17 ], [ %26, %24 ] call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(24) %3, ptr noundef nonnull align 8 dereferenceable(24) %0, i64 24, i1 false) store i64 %.0.sroa.speculated.i, ptr %0, align 8 %.sroa.2.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 8 - store ptr %22, ptr %.sroa.2.0..sroa_idx, align 8 + store ptr %.sroa.3.0.i, ptr %.sroa.2.0..sroa_idx, align 8 %.sroa.3.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 16 store i64 0, ptr %.sroa.3.0..sroa_idx, align 8 %26 = getelementptr inbounds nuw i8, ptr %0, i64 24 @@ -1444,7 +1477,7 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17ha09 br label %_ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i _ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i: ; preds = %46, %42 - %.sroa.012.1.i.i.pn.i.i.i.i = phi ptr [ %45, %42 ], [ %48, %46 ] + %.sroa.012.1.i.i.pn.i.i.i.i = phi ptr [ %45, %46 ], [ %48, %50 ] %.not.i.i.i = icmp eq ptr %.sroa.012.1.i.i.pn.i.i.i.i, null br i1 %.not.i.i.i, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$14grow_amortized17hd92a1ee750e6029dE.exit.i.i", label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$16reserve_for_push17hc49f75d716dc5345E.exit.i" @@ -1471,7 +1504,7 @@ _ZN5alloc7raw_vec11finish_grow17h741efc9282277e40E.exit.i.i.i: ; preds = %46, %4 %50 = landingpad { ptr, i32 } cleanup invoke void @"_ZN4core3ptr62drop_in_place$LT$alloc..vec..Vec$LT$just..scope..Scope$GT$$GT$17hfaa46c47e6437d43E"(ptr noalias noundef nonnull align 8 dereferenceable(24) %3) #27 - to label %53 unwind label %51, !noalias !162 + to label %57 unwind label %51, !noalias !162 51: ; preds = %49 %52 = landingpad { ptr, i32 } diff --git a/bench/llvm/optimized/ConstraintSystem.ll b/bench/llvm/optimized/ConstraintSystem.ll index d76efdcde76..9fa8c605f8c 100644 --- a/bench/llvm/optimized/ConstraintSystem.ll +++ b/bench/llvm/optimized/ConstraintSystem.ll @@ -344,14 +344,14 @@ _ZN4llvm16ConstraintSystem18getLastCoefficientENS_8ArrayRefINS0_5EntryEEEt.exit9 150: ; preds = %140 %151 = load i64, ptr %143, align 8, !tbaa !24 %152 = add nuw i32 %.067166, 1 - br label %153 + %153 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %151, i64 %135) + br label %154 153: ; preds = %150, %140 %.168 = phi i32 [ %152, %150 ], [ %.067166, %140 ] - %.060 = phi i64 [ %151, %150 ], [ 0, %140 ] - %154 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %.060, i64 %135) - %155 = extractvalue { i64, i1 } %154, 1 - %156 = extractvalue { i64, i1 } %154, 0 + %.060 = phi { i64, i1 } [ %153, %150 ], [ zeroinitializer, %140 ] + %155 = extractvalue { i64, i1 } %.060, 1 + %155 = extractvalue { i64, i1 } %.060, 0 br i1 %155, label %_ZN4llvm15SmallVectorImplINS_16ConstraintSystem5EntryEE12emplace_backIJRlRtEEERS2_DpOT_.exit.thread, label %157 157: ; preds = %153 @@ -361,17 +361,17 @@ _ZN4llvm16ConstraintSystem18getLastCoefficientENS_8ArrayRefINS0_5EntryEEEt.exit9 158: ; preds = %157 %159 = load i64, ptr %147, align 8, !tbaa !24 %160 = add nuw i32 %.064167, 1 - br label %161 + %161 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %159, i64 %.0141) + br label %162 161: ; preds = %158, %157 %.266 = phi i32 [ %160, %158 ], [ %.064167, %157 ] - %.0 = phi i64 [ %159, %158 ], [ 0, %157 ] - %162 = call { i64, i1 } @llvm.smul.with.overflow.i64(i64 %.0, i64 %.0141) - %163 = extractvalue { i64, i1 } %162, 1 + %.0 = phi { i64, i1 } [ %161, %158 ], [ zeroinitializer, %157 ] + %163 = extractvalue { i64, i1 } %.0, 1 br i1 %163, label %_ZN4llvm15SmallVectorImplINS_16ConstraintSystem5EntryEE12emplace_backIJRlRtEEERS2_DpOT_.exit.thread, label %164 164: ; preds = %161 - %165 = extractvalue { i64, i1 } %162, 0 + %165 = extractvalue { i64, i1 } %.0, 0 %166 = call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %156, i64 %165) %167 = extractvalue { i64, i1 } %166, 1 %168 = extractvalue { i64, i1 } %166, 0 @@ -485,7 +485,7 @@ _ZN4llvm23SmallVectorTemplateBaseINS_11SmallVectorINS_16ConstraintSystem5EntryEL br label %_ZN4llvm15SmallVectorImplINS_16ConstraintSystem5EntryEE12emplace_backIJRlRtEEERS2_DpOT_.exit.thread _ZN4llvm15SmallVectorImplINS_16ConstraintSystem5EntryEE12emplace_backIJRlRtEEERS2_DpOT_.exit.thread: ; preds = %164, %161, %153, %127, %_ZN4llvm23SmallVectorTemplateBaseINS_11SmallVectorINS_16ConstraintSystem5EntryELj8EEELb0EE9push_backEOS4_.exit104, %._crit_edge170 - %.474 = phi i32 [ 9, %._crit_edge170 ], [ %., %_ZN4llvm23SmallVectorTemplateBaseINS_11SmallVectorINS_16ConstraintSystem5EntryELj8EEELb0EE9push_backEOS4_.exit104 ], [ 9, %127 ], [ 1, %153 ], [ 1, %161 ], [ 1, %164 ] + %.474 = phi i32 [ 9, %._crit_edge170 ], [ %., %_ZN4llvm23SmallVectorTemplateBaseINS_11SmallVectorINS_16ConstraintSystem5EntryELj8EEELb0EE9push_backEOS4_.exit104 ], [ 9, %127 ], [ 1, %154 ], [ 1, %162 ], [ 1, %164 ] %217 = load ptr, ptr %3, align 8, !tbaa !18 %218 = icmp eq ptr %217, %15 br i1 %218, label %220, label %219 diff --git a/bench/logos-rs/optimized/33vdiynjtipz9eol.ll b/bench/logos-rs/optimized/33vdiynjtipz9eol.ll index 18dd2370034..30df913ce9d 100644 --- a/bench/logos-rs/optimized/33vdiynjtipz9eol.ll +++ b/bench/logos-rs/optimized/33vdiynjtipz9eol.ll @@ -508,7 +508,7 @@ define void @"_ZN116_$LT$core..iter..adapters..flatten..FlattenCompat$LT$I$C$U$G br i1 %30, label %34, label %35 34: ; preds = %2 - br i1 %33, label %38, label %36 + br i1 %33, label %40, label %36 35: ; preds = %2 br i1 %33, label %71, label %66 @@ -520,53 +520,53 @@ define void @"_ZN116_$LT$core..iter..adapters..flatten..FlattenCompat$LT$I$C$U$G %.pre59 = load i64, ptr %.phi.trans.insert58, align 8 %.phi.trans.insert60 = getelementptr inbounds nuw i8, ptr %5, i64 16 %.pre61 = load i64, ptr %.phi.trans.insert60, align 8 - %37 = icmp eq i64 %.pre59, 0 - br label %38 - -38: ; preds = %34, %36 - %39 = phi i64 [ %.pre61, %36 ], [ 0, %34 ] - %40 = phi i1 [ %37, %36 ], [ false, %34 ] - %41 = phi i64 [ %.pre57, %36 ], [ 0, %34 ] - %42 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %41, i64 %29) - %43 = extractvalue { i64, i1 } %42, 1 - br i1 %43, label %47, label %44 - -44: ; preds = %38 - %45 = extractvalue { i64, i1 } %42, 0 - %46 = call i64 @llvm.uadd.sat.i64(i64 %45, i64 %26) - br label %47 - -47: ; preds = %38, %44 - %.sroa.020.0 = phi i64 [ %46, %44 ], [ -1, %38 ] - %48 = icmp eq i64 %15, 0 - %49 = icmp eq i64 %23, 0 - %or.cond50 = select i1 %48, i1 true, i1 %49 - br i1 %or.cond50, label %62, label %50 - -50: ; preds = %47 - %51 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %17, i64 %25) - %52 = extractvalue { i64, i1 } %51, 0 - %53 = extractvalue { i64, i1 } %51, 1 - %or.cond51 = select i1 %53, i1 true, i1 %40 - br i1 %or.cond51, label %62, label %54 - -54: ; preds = %50 - %55 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %29, i64 %39) - %56 = extractvalue { i64, i1 } %55, 1 + %37 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %.pre57, i64 %29) + %38 = icmp eq i64 %.pre59, 0 + %39 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %29, i64 %.pre61) + br label %40 + +40:; preds = %34, %36 + %41 = phi { i64, i1 } [ %39, %36 ], [ zeroinitializer, %34 ] + %42 = phi i1 [ %38, %36 ], [ false, %34 ] + %43 = phi { i64, i1 } [ %37, %36 ], [ zeroinitializer, %34 ] + %44 = extractvalue { i64, i1 } %43, 1 + br i1 %44, label %48, label %45 + +45:; preds = %40 + %46 = extractvalue { i64, i1 } %43, 0 + %47 = call i64 @llvm.uadd.sat.i64(i64 %46, i64 %26) + br label %48 + +48:; preds = %40, %45 + %.sroa.020.0 = phi i64 [ %47, %45 ], [ -1, %40 ] + %49 = icmp eq i64 %15, 0 + %50 = icmp eq i64 %23, 0 + %or.cond50 = select i1 %49, i1 true, i1 %50 + br i1 %or.cond50, label %62, label %51 + +51:; preds = %48 + %52 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %17, i64 %25) + %53 = extractvalue { i64, i1 } %52, 0 + %54 = extractvalue { i64, i1 } %52, 1 + %or.cond51 = select i1 %54, i1 true, i1 %42 + br i1 %or.cond51, label %62, label %55 + +55:; preds = %51 + %56 = extractvalue { i64, i1 } %41, 1 br i1 %56, label %62, label %57 -57: ; preds = %54 - %58 = extractvalue { i64, i1 } %55, 0 - %59 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %52, i64 %58) +57: ; preds = %55 + %58 = extractvalue { i64, i1 } %41, 0 + %59 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %53, i64 %58) %60 = extractvalue { i64, i1 } %59, 1 %61 = extractvalue { i64, i1 } %59, 0 %not.53 = xor i1 %60, true %spec.select52 = zext i1 %not.53 to i64 br label %62 -62: ; preds = %57, %54, %50, %47 - %.sroa.8.0 = phi i64 [ undef, %47 ], [ undef, %50 ], [ undef, %54 ], [ %61, %57 ] - %.sroa.021.0 = phi i64 [ 0, %47 ], [ 0, %50 ], [ 0, %54 ], [ %spec.select52, %57 ] +62: ; preds = %57, %55, %51, %48 + %.sroa.8.0 = phi i64 [ undef, %48 ], [ undef, %51 ], [ undef, %55 ], [ %61, %57 ] + %.sroa.021.0 = phi i64 [ 0, %48 ], [ 0, %51 ], [ 0, %55 ], [ %spec.select52, %57 ] store i64 %.sroa.020.0, ptr %0, align 8 %63 = getelementptr inbounds nuw i8, ptr %0, i64 8 store i64 %.sroa.021.0, ptr %63, align 8 @@ -662,7 +662,7 @@ define void @"_ZN116_$LT$core..iter..adapters..flatten..FlattenCompat$LT$I$C$U$G br i1 %31, label %34, label %35 34: ; preds = %2 - br i1 %33, label %38, label %36 + br i1 %33, label %40, label %36 35: ; preds = %2 br i1 %33, label %71, label %66 @@ -674,53 +674,53 @@ define void @"_ZN116_$LT$core..iter..adapters..flatten..FlattenCompat$LT$I$C$U$G %.pre59 = load i64, ptr %.phi.trans.insert58, align 8 %.phi.trans.insert60 = getelementptr inbounds nuw i8, ptr %5, i64 16 %.pre61 = load i64, ptr %.phi.trans.insert60, align 8 - %37 = icmp eq i64 %.pre59, 0 - br label %38 - -38: ; preds = %34, %36 - %39 = phi i64 [ %.pre61, %36 ], [ 0, %34 ] - %40 = phi i1 [ %37, %36 ], [ false, %34 ] - %41 = phi i64 [ %.pre57, %36 ], [ 0, %34 ] - %42 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %41, i64 %30) - %43 = extractvalue { i64, i1 } %42, 1 - br i1 %43, label %47, label %44 - -44: ; preds = %38 - %45 = extractvalue { i64, i1 } %42, 0 - %46 = call i64 @llvm.uadd.sat.i64(i64 %45, i64 %27) - br label %47 - -47: ; preds = %38, %44 - %.sroa.020.0 = phi i64 [ %46, %44 ], [ -1, %38 ] - %48 = icmp eq i64 %16, 0 - %49 = icmp eq i64 %24, 0 - %or.cond50 = select i1 %48, i1 true, i1 %49 - br i1 %or.cond50, label %62, label %50 - -50: ; preds = %47 - %51 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %18, i64 %26) - %52 = extractvalue { i64, i1 } %51, 0 - %53 = extractvalue { i64, i1 } %51, 1 - %or.cond51 = select i1 %53, i1 true, i1 %40 - br i1 %or.cond51, label %62, label %54 - -54: ; preds = %50 - %55 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %30, i64 %39) - %56 = extractvalue { i64, i1 } %55, 1 + %37 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %.pre57, i64 %30) + %38 = icmp eq i64 %.pre59, 0 + %39 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %30, i64 %.pre61) + br label %40 + +40:; preds = %34, %36 + %41 = phi { i64, i1 } [ %39, %36 ], [ zeroinitializer, %34 ] + %42 = phi i1 [ %38, %36 ], [ false, %34 ] + %43 = phi { i64, i1 } [ %37, %36 ], [ zeroinitializer, %34 ] + %44 = extractvalue { i64, i1 } %43, 1 + br i1 %44, label %48, label %45 + +45:; preds = %40 + %46 = extractvalue { i64, i1 } %43, 0 + %47 = call i64 @llvm.uadd.sat.i64(i64 %46, i64 %27) + br label %48 + +48:; preds = %40, %45 + %.sroa.020.0 = phi i64 [ %47, %45 ], [ -1, %40 ] + %49 = icmp eq i64 %16, 0 + %50 = icmp eq i64 %24, 0 + %or.cond50 = select i1 %49, i1 true, i1 %50 + br i1 %or.cond50, label %62, label %51 + +51:; preds = %48 + %52 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %18, i64 %26) + %53 = extractvalue { i64, i1 } %52, 0 + %54 = extractvalue { i64, i1 } %52, 1 + %or.cond51 = select i1 %54, i1 true, i1 %42 + br i1 %or.cond51, label %62, label %55 + +55:; preds = %51 + %56 = extractvalue { i64, i1 } %41, 1 br i1 %56, label %62, label %57 -57: ; preds = %54 - %58 = extractvalue { i64, i1 } %55, 0 - %59 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %52, i64 %58) +57: ; preds = %55 + %58 = extractvalue { i64, i1 } %41, 0 + %59 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %53, i64 %58) %60 = extractvalue { i64, i1 } %59, 1 %61 = extractvalue { i64, i1 } %59, 0 %not.53 = xor i1 %60, true %spec.select52 = zext i1 %not.53 to i64 br label %62 -62: ; preds = %57, %54, %50, %47 - %.sroa.8.0 = phi i64 [ undef, %47 ], [ undef, %50 ], [ undef, %54 ], [ %61, %57 ] - %.sroa.021.0 = phi i64 [ 0, %47 ], [ 0, %50 ], [ 0, %54 ], [ %spec.select52, %57 ] +62: ; preds = %57, %55, %51, %48 + %.sroa.8.0 = phi i64 [ undef, %48 ], [ undef, %51 ], [ undef, %55 ], [ %61, %57 ] + %.sroa.021.0 = phi i64 [ 0, %48 ], [ 0, %51 ], [ 0, %55 ], [ %spec.select52, %57 ] store i64 %.sroa.020.0, ptr %0, align 8 %63 = getelementptr inbounds nuw i8, ptr %0, i64 8 store i64 %.sroa.021.0, ptr %63, align 8 diff --git a/bench/meilisearch-rs/optimized/48hhebymxr5ff2nk.ll b/bench/meilisearch-rs/optimized/48hhebymxr5ff2nk.ll index db79784061d..d31100a0dff 100644 --- a/bench/meilisearch-rs/optimized/48hhebymxr5ff2nk.ll +++ b/bench/meilisearch-rs/optimized/48hhebymxr5ff2nk.ll @@ -20698,19 +20698,25 @@ define hidden void @"_ZN133_$LT$smallvec..SmallVec$LT$A$GT$$u20$as$u20$core..ite 21: ; preds = %18 %22 = extractvalue { i64, i1 } %19, 0 %23 = icmp ult i64 %22, 2 - %24 = add i64 %22, -1 - %25 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %24, i1 true) - %26 = lshr i64 -1, %25 - %.sroa.01.0.i.i.i = select i1 %23, i64 0, i64 %26 - %27 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i.i, i64 1) - %28 = extractvalue { i64, i1 } %27, 1 - br i1 %28, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit.thread", label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit" - -"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit": ; preds = %21 - %29 = extractvalue { i64, i1 } %27, 0 - %30 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hf28185e90106bc9cE"(ptr noalias noundef nonnull align 8 dereferenceable(456) %0, i64 noundef %29) - %31 = extractvalue { i64, i64 } %30, 0 - switch i64 %31, label %32 [ + br i1 %22, label %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit.i, label %24 + +24:; preds = %21 + %25 = add i64 %22, -1 + %27 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %25, i1 true) + %27 = lshr i64 -1, %26 + %28 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %27, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit.i + +_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit.i:; preds = %24, %20 + %.sroa.01.0.i.i.i = phi { i64, i1 } [ %28, %24 ], [ { i64 1, i1 false }, %21 ] + %31 = extractvalue { i64, i1 } %.sroa.01.0.i.i.i, 1 + br i1 %31, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit.thread", label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit" + +"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit": ; preds = %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit.i + %30 = extractvalue { i64, i1 } %.sroa.01.0.i.i.i, 0 + %31 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hf28185e90106bc9cE"(ptr noalias noundef nonnull align 8 dereferenceable(456) %0, i64 noundef %30) + %32 = extractvalue { i64, i64 } %31, 0 + switch i64 %32, label %33 [ i64 -9223372036854775807, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit._ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit_crit_edge" i64 0, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit.thread" ] @@ -20720,13 +20726,13 @@ define hidden void @"_ZN133_$LT$smallvec..SmallVec$LT$A$GT$$u20$as$u20$core..ite %.pre53 = tail call i64 @llvm.umax.i64(i64 %.pre, i64 8) br label %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit -"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit.thread": ; preds = %21, %18, %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit" +"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit.thread": ; preds = %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit.i, %18, %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit" tail call void @_ZN4core9panicking5panic17h75b3c9209f97d725E(ptr noalias noundef nonnull readonly align 1 @anon.3c3b56e5edcc756f701afb43044d2d8e.419, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.3c3b56e5edcc756f701afb43044d2d8e.420) #41 unreachable 32: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit" - %33 = extractvalue { i64, i64 } %30, 1 - tail call void @_ZN5alloc5alloc18handle_alloc_error17hc735483c05842e7cE(i64 noundef %31, i64 noundef %33) #41 + %33 = extractvalue { i64, i64 } %31, 1 + tail call void @_ZN5alloc5alloc18handle_alloc_error17hc735483c05842e7cE(i64 noundef %32, i64 noundef %33) #41 unreachable _ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h2abadf6e61f9e56aE.exit._ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit_crit_edge", %3 @@ -20741,16 +20747,16 @@ _ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit: ; preds = %"_ZN8smallvec17Sma br i1 %38, label %.lr.ph, label %._crit_edge ._crit_edge: ; preds = %65, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit - %.sroa.7.0.lcssa = phi i64 [ %37, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ], [ %.sink.i.pre-phi, %65 ] - %.sroa.0.0.lcssa = phi ptr [ %1, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ], [ %42, %65 ] + %.sroa.7.0.lcssa = phi i64 [ %37, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ], [ %.sink.i.pre-phi, %66 ] + %.sroa.0.0.lcssa = phi ptr [ %1, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ], [ %42, %66 ] store i64 %.sroa.7.0.lcssa, ptr %.sink10.i, align 8 call void @llvm.lifetime.start.p0(ptr nonnull %5) %39 = icmp eq ptr %.sroa.0.0.lcssa, %2 br i1 %39, label %.loopexit, label %"_ZN104_$LT$core..iter..adapters..cloned..Cloned$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4next17hf064c24248085684E.exit8" .lr.ph: ; preds = %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit, %65 - %.sroa.0.043 = phi ptr [ %42, %65 ], [ %1, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ] - %.sroa.7.042 = phi i64 [ %67, %65 ], [ %37, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ] + %.sroa.0.043 = phi ptr [ %42, %66 ], [ %1, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ] + %.sroa.7.042 = phi i64 [ %67, %66 ], [ %37, %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit ] %40 = icmp eq ptr %.sroa.0.043, %2 br i1 %40, label %.loopexit34, label %41 @@ -20792,7 +20798,7 @@ _ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit: ; preds = %"_ZN8smallvec17Sma 53: ; preds = %45 invoke fastcc void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h2d72b85e43caff62E"(ptr noalias noundef nonnull align 8 dereferenceable(456) %0) - to label %54 unwind label %51, !noalias !3102 + to label %55 unwind label %51, !noalias !3102 54: ; preds = %53 %55 = load ptr, ptr %0, align 8, !alias.scope !3093, !noalias !3102, !nonnull !4, !noundef !4 @@ -20806,13 +20812,13 @@ _ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit: ; preds = %"_ZN8smallvec17Sma unreachable common.resume: ; preds = %51, %68 - %common.resume.op = phi { ptr, i32 } [ %69, %68 ], [ %52, %51 ] + %common.resume.op = phi { ptr, i32 } [ %69, %69 ], [ %52, %52 ] resume { ptr, i32 } %common.resume.op "_ZN8smallvec17SmallVec$LT$A$GT$4push17h39b2fa69df579b39E.exit": ; preds = %45, %54 - %58 = phi i64 [ %.pre.i, %54 ], [ %49, %45 ] - %.sroa.01.0.i = phi ptr [ %15, %54 ], [ %.sink10.i.i, %45 ] - %.sroa.0.0.i10 = phi ptr [ %55, %54 ], [ %.sink11.i.i, %45 ] + %58 = phi i64 [ %.pre.i, %55 ], [ %49, %46 ] + %.sroa.01.0.i = phi ptr [ %15, %55 ], [ %.sink10.i.i, %46 ] + %.sroa.0.0.i10 = phi ptr [ %55, %55 ], [ %.sink11.i.i, %46 ] %59 = getelementptr inbounds { i64, { { i64, ptr, {} }, i64 }, { i64, [2 x i64] } }, ptr %.sroa.0.0.i10, i64 %58 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(56) %59, ptr noundef nonnull align 8 dereferenceable(56) %5, i64 56, i1 false) %60 = load i64, ptr %.sroa.01.0.i, align 8, !alias.scope !3093, !noalias !3102, !noundef !4 @@ -94309,28 +94315,34 @@ define internal fastcc void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unche %.sink13.i = select i1 %4, i64 %6, i64 %3 %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink13.i, i64 1) %8 = extractvalue { i64, i1 } %7, 1 - br i1 %8, label %17, label %9 + br i1 %8, label %18, label %9 9: ; preds = %1 %10 = extractvalue { i64, i1 } %7, 0 %11 = icmp ult i64 %10, 2 - %12 = add i64 %10, -1 - %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) - %14 = lshr i64 -1, %13 - %.sroa.01.0.i.i = select i1 %11, i64 0, i64 %14 - %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i, i64 1) - %16 = extractvalue { i64, i1 } %15, 1 - br i1 %16, label %17, label %18 - -17: ; preds = %1, %9 + br i1 %11, label %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit, label %12 + +12:; preds = %9 + %13 = add i64 %10, -1 + %15 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %13, i1 true) + %15 = lshr i64 -1, %14 + %16 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %15, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit + +_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit: ; preds = %9, %12 + %.sroa.01.0.i.i = phi { i64, i1 } [ %16, %12 ], [ { i64 1, i1 false }, %9 ] + %17 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 1 + br i1 %17, label %18, label %19 + +18: ; preds = %1, %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit tail call void @_ZN4core6option13expect_failed17h7f842a57ad883afaE(ptr noalias noundef nonnull readonly align 1 @anon.3c3b56e5edcc756f701afb43044d2d8e.419, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.3c3b56e5edcc756f701afb43044d2d8e.423) #41 unreachable -18: ; preds = %9 - %19 = extractvalue { i64, i1 } %15, 0 +18: ; preds = %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit + %19 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 0 %20 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hf28185e90106bc9cE"(ptr noalias noundef align 8 dereferenceable(456) %0, i64 noundef %19) %21 = extractvalue { i64, i64 } %20, 0 - switch i64 %21, label %23 [ + switch i64 %21, label %24 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit i64 0, label %22 ] @@ -94358,28 +94370,34 @@ define internal fastcc void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unche %.sink13.i = select i1 %4, i64 %6, i64 %3 %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink13.i, i64 1) %8 = extractvalue { i64, i1 } %7, 1 - br i1 %8, label %17, label %9 + br i1 %8, label %18, label %9 9: ; preds = %1 %10 = extractvalue { i64, i1 } %7, 0 %11 = icmp ult i64 %10, 2 - %12 = add i64 %10, -1 - %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) - %14 = lshr i64 -1, %13 - %.sroa.01.0.i.i = select i1 %11, i64 0, i64 %14 - %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i, i64 1) - %16 = extractvalue { i64, i1 } %15, 1 - br i1 %16, label %17, label %18 - -17: ; preds = %1, %9 + br i1 %11, label %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit, label %12 + +12:; preds = %9 + %13 = add i64 %10, -1 + %15 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %13, i1 true) + %15 = lshr i64 -1, %14 + %16 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %15, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit + +_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit: ; preds = %9, %12 + %.sroa.01.0.i.i = phi { i64, i1 } [ %16, %12 ], [ { i64 1, i1 false }, %9 ] + %17 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 1 + br i1 %17, label %18, label %19 + +18: ; preds = %1, %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit tail call void @_ZN4core6option13expect_failed17h7f842a57ad883afaE(ptr noalias noundef nonnull readonly align 1 @anon.3c3b56e5edcc756f701afb43044d2d8e.419, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.3c3b56e5edcc756f701afb43044d2d8e.423) #41 unreachable -18: ; preds = %9 - %19 = extractvalue { i64, i1 } %15, 0 +18: ; preds = %_ZN4core3ops8function6FnOnce9call_once17hcac42d3717be7e1fE.exit + %19 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 0 %20 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h0f22ecd238fb6365E"(ptr noalias noundef align 8 dereferenceable(648) %0, i64 noundef %19) %21 = extractvalue { i64, i64 } %20, 0 - switch i64 %21, label %23 [ + switch i64 %21, label %24 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17h9996f1dde88b3fa8E.exit i64 0, label %22 ] diff --git a/bench/ockam-rs/optimized/32cbw7iiw6inrqgd.ll b/bench/ockam-rs/optimized/32cbw7iiw6inrqgd.ll index 24197de4f09..329a43092a8 100644 --- a/bench/ockam-rs/optimized/32cbw7iiw6inrqgd.ll +++ b/bench/ockam-rs/optimized/32cbw7iiw6inrqgd.ll @@ -16074,29 +16074,35 @@ define internal fastcc void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unche %5 = load i64, ptr %4, align 8 %.sink4.i = select i1 %3, i64 %5, i64 %2 %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink4.i, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - br i1 %7, label %.thread, label %8 - -8: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17hfbf5e4d3ffdb6f3dE.llvm.15673428424896960800.exit" - %9 = extractvalue { i64, i1 } %6, 0 - %10 = icmp ult i64 %9, 2 - %11 = add i64 %9, -1 - %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %11, i1 true) - %13 = lshr i64 -1, %12 - %.0.i.i = select i1 %10, i64 0, i64 %13 - %14 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i, i64 1) - %15 = extractvalue { i64, i1 } %14, 1 - br i1 %15, label %.thread, label %16 - -.thread: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17hfbf5e4d3ffdb6f3dE.llvm.15673428424896960800.exit", %8 + %7 = extractvalue { i64, i1 } %6, 0 + %8 = extractvalue { i64, i1 } %6, 1 + br i1 %8, label %.thread, label %9 + +9:; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17hfbf5e4d3ffdb6f3dE.llvm.15673428424896960800.exit" + %10 = icmp ult i64 %7, 2 + br i1 %10, label %16, label %11 + +11:; preds = %9 + %12 = add i64 %7, -1 + %14 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) + %14 = lshr i64 -1, %13 + %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %14, i64 1) + br label %16 + +16: ; preds = %11, %9 + %.0.i.i = phi { i64, i1 } [ %15, %11 ], [ { i64 1, i1 false }, %9 ] + %17 = extractvalue { i64, i1 } %.0.i.i, 1 + br i1 %17, label %.thread, label %18 + +.thread: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17hfbf5e4d3ffdb6f3dE.llvm.15673428424896960800.exit", %16 tail call void @_ZN4core6option13expect_failed17h92d9ca41185c3cd6E(ptr noalias noundef nonnull readonly align 1 @anon.9d4b1f91d5f9b92837f9106e48e7665f.91, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.9d4b1f91d5f9b92837f9106e48e7665f.93) #46 unreachable -16: ; preds = %8 - %17 = extractvalue { i64, i1 } %14, 0 +16: ; preds = %16 + %17 = extractvalue { i64, i1 } %.0.i.i, 0 %18 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h52211972ddfa8a45E"(ptr noalias noundef align 8 dereferenceable(656) %0, i64 noundef %17) %19 = extractvalue { i64, i64 } %18, 0 - switch i64 %19, label %21 [ + switch i64 %19, label %23 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17h3e316e6011153661E.exit i64 0, label %20 ] diff --git a/bench/ockam-rs/optimized/8g2r22yshp3qi00.ll b/bench/ockam-rs/optimized/8g2r22yshp3qi00.ll index 33413d6c7da..d9807526f10 100644 --- a/bench/ockam-rs/optimized/8g2r22yshp3qi00.ll +++ b/bench/ockam-rs/optimized/8g2r22yshp3qi00.ll @@ -58696,47 +58696,58 @@ _ZN4http6header3map15to_raw_capacity17h0f6944be6344efdfE.exit: ; preds = %10 %20 = extractvalue { i64, i1 } %12, 0 call void @llvm.lifetime.end.p0(ptr nonnull %6) %21 = icmp ult i64 %20, 2 - %22 = add i64 %20, -1 - %23 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %22, i1 true) - %24 = lshr i64 -1, %23 - %.0.i = select i1 %21, i64 0, i64 %24 - %25 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i, i64 1) - %26 = extractvalue { i64, i1 } %25, 1 - %27 = extractvalue { i64, i1 } %25, 0 - br i1 %26, label %29, label %30 + br i1 %21, label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h260e4e7f17931878E.exit", label %22 + +22:; preds = %_ZN4http6header3map15to_raw_capacity17h0f6944be6344efdfE.exit + %23 = add i64 %20, -1 + %25 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %23, i1 true) + %25 = lshr i64 -1, %24 + %26 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %25, i64 1) + br label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h260e4e7f17931878E.exit" + +"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h260e4e7f17931878E.exit": ; preds = %_ZN4http6header3map15to_raw_capacity17h0f6944be6344efdfE.exit, %22 + %.0.i = phi { i64, i1 } [ %26, %22 ], [ { i64 1, i1 false }, %_ZN4http6header3map15to_raw_capacity17h0f6944be6344efdfE.exit ] + %27 = extractvalue { i64, i1 } %.0.i, 1 + %28 = extractvalue { i64, i1 } %.0.i, 0 + br i1 %27, label %30, label %31 28: ; preds = %52, %49, %29, %9 ret void -29: ; preds = %_ZN4http6header3map15to_raw_capacity17h0f6944be6344efdfE.exit +29: ; preds = %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h260e4e7f17931878E.exit" store i64 3, ptr %0, align 8 br label %28 -30: ; preds = %_ZN4http6header3map15to_raw_capacity17h0f6944be6344efdfE.exit - %31 = icmp ugt i64 %27, 32768 +30: ; preds = %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h260e4e7f17931878E.exit" + %31 = icmp ugt i64 %28, 32768 br i1 %31, label %49, label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i" "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i": ; preds = %30 call void @llvm.lifetime.start.p0(ptr nonnull %7) call void @llvm.lifetime.start.p0(ptr nonnull %3), !noalias !12620 - %32 = shl nuw nsw i64 %27, 2 - %33 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !12620 - %34 = tail call noundef align 2 ptr @__rust_alloc(i64 noundef %32, i64 noundef range(i64 1, 0) 2) #61, !noalias !12620 - %35 = icmp eq ptr %34, null - br i1 %35, label %36, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5c458cd21cfbbcf2E.exit.i" + %34 = icmp eq i64 %28, 0 + br i1 %34, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5c458cd21cfbbcf2E.exit.i", label %36 -36: ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i" - tail call void @_ZN5alloc5alloc18handle_alloc_error17h047bf044e422c00fE(i64 noundef 2, i64 noundef %32) #59, !noalias !12620 +"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i":; preds = %33 + %35 = shl nuw nsw i64 %28, 2 + %36 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !12620 + %37 = tail call noundef align 2 ptr @__rust_alloc(i64 noundef %35, i64 noundef range(i64 1, 0) 2) #61, !noalias !12620 + %38 = icmp eq ptr %37, null + br i1 %38, label %39, label %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5c458cd21cfbbcf2E.exit.i" + +39: ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i" + tail call void @_ZN5alloc5alloc18handle_alloc_error17h047bf044e422c00fE(i64 noundef 2, i64 noundef %35) #59, !noalias !12620 unreachable -"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5c458cd21cfbbcf2E.exit.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i" - store ptr %34, ptr %3, align 8, !noalias !12620 - %37 = getelementptr inbounds nuw i8, ptr %3, i64 8 - store i64 %27, ptr %37, align 8, !noalias !12620 - %38 = getelementptr inbounds nuw i8, ptr %3, i64 16 - store i64 0, ptr %38, align 8, !noalias !12620 - invoke void @"_ZN5alloc3vec16Vec$LT$T$C$A$GT$11extend_with17h663a9ef0825a7db4E"(ptr noalias noundef nonnull align 8 dereferenceable(24) %3, i64 noundef range(i64 0, 32769) %27, i16 noundef -1, i16 noundef 0) - to label %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i" unwind label %39, !noalias !12620 +"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5c458cd21cfbbcf2E.exit.i": ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i", %33 + %.sroa.0.0.i.i = phi ptr [ inttoptr (i64 2 to ptr), %33 ], [ %37, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i.i" ] + store ptr %.sroa.0.0.i.i, ptr %3, align 8, !noalias !12620 + %40 = getelementptr inbounds nuw i8, ptr %3, i64 8 + store i64 %28, ptr %40, align 8, !noalias !12620 + %41 = getelementptr inbounds nuw i8, ptr %3, i64 16 + store i64 0, ptr %41, align 8, !noalias !12620 + invoke void @"_ZN5alloc3vec16Vec$LT$T$C$A$GT$11extend_with17h663a9ef0825a7db4E"(ptr noalias noundef nonnull align 8 dereferenceable(24) %3, i64 noundef range(i64 0, 32769) %28, i16 noundef -1, i16 noundef 0) + to label %"_ZN62_$LT$T$u20$as$u20$alloc..vec..spec_from_elem..SpecFromElem$GT$9from_elem17h42bd3c78c92688aaE.exit" unwind label %42, !noalias !12620 39: ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5c458cd21cfbbcf2E.exit.i" %40 = landingpad { ptr, i32 } @@ -58751,7 +58762,7 @@ _ZN4http6header3map15to_raw_capacity17h0f6944be6344efdfE.exit: ; preds = %10 unreachable common.resume: ; preds = %39, %50 - %common.resume.op = phi { ptr, i32 } [ %51, %50 ], [ %40, %39 ] + %common.resume.op = phi { ptr, i32 } [ %51, %53 ], [ %40, %42 ] resume { ptr, i32 } %common.resume.op "_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i": ; preds = %"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5c458cd21cfbbcf2E.exit.i" @@ -58761,43 +58772,47 @@ common.resume: ; preds = %39, %50 %.fca.0.extract17 = extractvalue { ptr, i64 } %43, 0 %.fca.1.extract18 = extractvalue { ptr, i64 } %43, 1 call void @llvm.lifetime.end.p0(ptr nonnull %7) - %44 = mul nuw nsw i64 %27, 104 - %45 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1 - %46 = call noundef align 8 ptr @__rust_alloc(i64 noundef %44, i64 noundef range(i64 1, 0) 8) #61 - %47 = icmp eq ptr %46, null - br i1 %47, label %48, label %52 + br i1 %34, label %55, label %48 48: ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i" - invoke void @_ZN5alloc5alloc18handle_alloc_error17h047bf044e422c00fE(i64 noundef 8, i64 noundef %44) #59 - to label %.noexc unwind label %50 + %47 = mul nuw nsw i64 %28, 104 + %48 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1 + %49 = call noundef align 8 ptr @__rust_alloc(i64 noundef %47, i64 noundef range(i64 1, 0) 8) #61 + %50 = icmp eq ptr %49, null + br i1 %50, label %51, label %55 .noexc: ; preds = %48 + invoke void @_ZN5alloc5alloc18handle_alloc_error17h047bf044e422c00fE(i64 noundef 8, i64 noundef %47) #59 + to label %.noexc unwind label %53 + +.noexc: ; preds = %51 unreachable 49: ; preds = %30 store i64 3, ptr %0, align 8 br label %28 -50: ; preds = %48 +50: ; preds = %51 %51 = landingpad { ptr, i32 } cleanup call fastcc void @"_ZN4core3ptr78drop_in_place$LT$alloc..boxed..Box$LT$$u5b$http..header..map..Pos$u5d$$GT$$GT$17h83fdedee4da7c4c3E"(ptr %.fca.0.extract17, i64 %.fca.1.extract18) #60 br label %common.resume -52: ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i" - %53 = trunc nuw i64 %27 to i16 - %54 = add i16 %53, -1 - %55 = icmp ne ptr %.fca.0.extract17, null - call void @llvm.assume(i1 %55) +52: ; preds = %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i", %"_ZN62_$LT$T$u20$as$u20$alloc..vec..spec_from_elem..SpecFromElem$GT$9from_elem17h42bd3c78c92688aaE.exit" + %.sroa.0.0.i36 = phi ptr [ inttoptr (i64 8 to ptr), %"_ZN62_$LT$T$u20$as$u20$alloc..vec..spec_from_elem..SpecFromElem$GT$9from_elem17h42bd3c78c92688aaE.exit" ], [ %49, %"_ZN63_$LT$alloc..alloc..Global$u20$as$u20$core..alloc..Allocator$GT$8allocate17h3d45643e45cad501E.exit.i" ] + %56 = trunc nuw i64 %28 to i16 + %57 = add i16 %56, -1 + %58 = icmp ne ptr %.fca.0.extract17, null + call void @llvm.assume(i1 %58) store i64 0, ptr %0, align 8 %.sroa.411.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 24 store ptr %.fca.0.extract17, ptr %.sroa.411.0..sroa_idx, align 8 %.sroa.512.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 32 store i64 %.fca.1.extract18, ptr %.sroa.512.0..sroa_idx, align 8 %.sroa.6.0..sroa_idx13 = getelementptr inbounds nuw i8, ptr %0, i64 40 - store ptr %46, ptr %.sroa.6.0..sroa_idx13, align 8 + store ptr %.sroa.0.0.i36, ptr %.sroa.6.0..sroa_idx13, align 8 %.sroa.6.sroa.423.0..sroa.6.0..sroa_idx13.sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 48 - store i64 %27, ptr %.sroa.6.sroa.423.0..sroa.6.0..sroa_idx13.sroa_idx, align 8 + store i64 %28, ptr %.sroa.6.sroa.423.0..sroa.6.0..sroa_idx13.sroa_idx, align 8 %.sroa.6.sroa.524.0..sroa.6.0..sroa_idx13.sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 56 store i64 0, ptr %.sroa.6.sroa.524.0..sroa.6.0..sroa_idx13.sroa_idx, align 8 %.sroa.7.0..sroa_idx14 = getelementptr inbounds nuw i8, ptr %0, i64 64 @@ -58805,7 +58820,7 @@ common.resume: ; preds = %39, %50 %.sroa.7.sroa.429.0..sroa.7.0..sroa_idx14.sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 72 %.sroa.815.0..sroa_idx = getelementptr inbounds nuw i8, ptr %0, i64 88 call void @llvm.memset.p0.i64(ptr noundef nonnull align 8 dereferenceable(16) %.sroa.7.sroa.429.0..sroa.7.0..sroa_idx14.sroa_idx, i8 0, i64 16, i1 false) - store i16 %54, ptr %.sroa.815.0..sroa_idx, align 8 + store i16 %57, ptr %.sroa.815.0..sroa_idx, align 8 br label %28 } diff --git a/bench/oiio/optimized/formatspec.ll b/bench/oiio/optimized/formatspec.ll index 098ce41041d..f130ecd0a65 100644 --- a/bench/oiio/optimized/formatspec.ll +++ b/bench/oiio/optimized/formatspec.ll @@ -2955,19 +2955,19 @@ _ZNK11OpenImageIO6v3_1_08TypeDesceqERKS1_.exit.thread: ; preds = %2 %.not.i = icmp eq i32 %56, 0 %mul.ov.i = extractvalue { i64, i1 } %mul.i, 1 %spec.select.i = select i1 %mul.ov.i, i64 -1, i64 %mul.val.i - %.0.i1 = select i1 %.not.i, i64 0, i64 %spec.select.i %narrow.i = tail call i32 @llvm.smax.i32(i32 %51, i32 1) %spec.select.i2 = zext nneg i32 %narrow.i to i64 %58 = and i64 %49, 255 %59 = call noundef i64 @_ZNK11OpenImageIO6v3_1_08TypeDesc8basesizeEv(ptr noundef nonnull align 4 dereferenceable(8) %3) #37 %60 = mul i64 %59, %58 %61 = mul i64 %60, %spec.select.i2 - %mul.i3 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %61, i64 %.0.i1) + %mul.i3 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %61, i64 %spec.select.i) %mul.val.i4 = extractvalue { i64, i1 } %mul.i3, 0 %.not.i5 = icmp eq i64 %61, 0 %mul.ov.i6 = extractvalue { i64, i1 } %mul.i3, 1 %spec.select.i7 = select i1 %mul.ov.i6, i64 -1, i64 %mul.val.i4 - %.0.i8 = select i1 %.not.i5, i64 0, i64 %spec.select.i7 + %.0.i8 = select i1 %.not.i5, i1 true, i1 %.not.i + %.0.i8 = select i1 %65, i64 0, i64 %mul.val.i4 br label %_ZNK11OpenImageIO6v3_1_09ImageSpec14scanline_bytesEb.exit _ZNK11OpenImageIO6v3_1_09ImageSpec14scanline_bytesEb.exit: ; preds = %_ZNK11OpenImageIO6v3_1_09ImageSpec11pixel_bytesEb.exit.thread.i, %_ZNK11OpenImageIO6v3_1_09ImageSpec11pixel_bytesEb.exit.i, %5, %_ZNK11OpenImageIO6v3_1_08TypeDesceqERKS1_.exit.thread @@ -3186,20 +3186,20 @@ _ZNK11OpenImageIO6v3_1_09ImageSpec11tile_pixelsEv.exit: ; preds = %_ZNK11OpenIma %.not.i1 = icmp eq i32 %27, 0 %mul.ov.i = extractvalue { i64, i1 } %mul.i, 1 %spec.select.i = select i1 %mul.ov.i, i64 -1, i64 %mul.val.i - %.0.i = select i1 %.not.i1, i64 0, i64 %spec.select.i %narrow.i = tail call i32 @llvm.smax.i32(i32 %6, i32 1) %spec.select.i2 = zext nneg i32 %narrow.i to i64 %29 = and i64 %4, 255 %30 = call noundef i64 @_ZNK11OpenImageIO6v3_1_08TypeDesc8basesizeEv(ptr noundef nonnull align 4 dereferenceable(8) %3) #37 %31 = mul i64 %30, %29 %32 = mul i64 %31, %spec.select.i2 - %mul.i3 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %32, i64 %.0.i) + %mul.i3 = call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %32, i64 %spec.select.i) %mul.val.i4 = extractvalue { i64, i1 } %mul.i3, 0 %.not.i5 = icmp eq i64 %32, 0 %mul.ov.i6 = extractvalue { i64, i1 } %mul.i3, 1 %spec.select.i7 = select i1 %mul.ov.i6, i64 -1, i64 %mul.val.i4 - %.0.i8 = select i1 %.not.i5, i64 0, i64 %spec.select.i7 - br label %33 + %.0.i8 = select i1 %.not.i5, i1 true, i1 %.not.i1 + %.0.i8 = select i1 %36, i64 0, i64 %mul.val.i4 + br label %37 33: ; preds = %_ZNK11OpenImageIO6v3_1_09ImageSpec11tile_pixelsEv.exit, %8 %34 = phi i64 [ %9, %8 ], [ %.0.i8, %_ZNK11OpenImageIO6v3_1_09ImageSpec11tile_pixelsEv.exit ] diff --git a/bench/openssl/optimized/safe_math_test.ll b/bench/openssl/optimized/safe_math_test.ll index 567ca2143fd..a18af9a4c1c 100644 --- a/bench/openssl/optimized/safe_math_test.ll +++ b/bench/openssl/optimized/safe_math_test.ll @@ -202,7 +202,7 @@ safe_div_int.exit.thread: ; preds = %39 br i1 %or.cond.i99, label %safe_mod_int.exit, label %safe_mod_int.exit.thread safe_mod_int.exit: ; preds = %safe_div_int.exit, %.thread206 - %.0.i100 = phi i32 [ 2147483647, %.thread206 ], [ 0, %safe_div_int.exit ] + %.0.i100 = phi i32 [ 2147483647, %.thread208 ], [ 0, %safe_div_int.exit ] %59 = getelementptr inbounds nuw i8, ptr %2, i64 24 %60 = load i32, ptr %59, align 8, !tbaa !14 %61 = tail call i32 @test_int_eq(ptr noundef nonnull @.str.5, i32 noundef 86, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.16, i32 noundef 1, i32 noundef %60) #4 @@ -265,40 +265,39 @@ safe_mod_int.exit.thread: ; preds = %.thread206 %92 = and i64 %8, 348160 %93 = icmp ne i64 %92, 0 %or.cond.i.i = and i1 %91, %93 - br i1 %or.cond.i.i, label %safe_div_int.exit.i, label %94 + br i1 %or.cond.i.i, label %safe_div_round_up_int.exit.thread222, label %94 94: ; preds = %.thread219 %95 = srem i32 %3, %5 %96 = icmp ne i32 %95, 0 %97 = zext i1 %96 to i32 %98 = sdiv i32 %3, %5 - br label %safe_div_int.exit.i - -safe_div_int.exit.i: ; preds = %.thread219, %94 - %.6 = phi i32 [ 0, %94 ], [ 1, %.thread219 ] - %.0.i34.i = phi i32 [ %97, %94 ], [ 1, %.thread219 ] - %.0.i29.i = phi i32 [ %98, %94 ], [ 2147483647, %.thread219 ] - %99 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %.0.i29.i, i32 %.0.i34.i) - %100 = extractvalue { i32, i1 } %99, 1 - br i1 %100, label %103, label %101 - -101: ; preds = %safe_div_int.exit.i - %102 = extractvalue { i32, i1 } %99, 0 - br label %safe_div_round_up_int.exit - -103: ; preds = %safe_div_int.exit.i - %104 = icmp slt i32 %.0.i29.i, 0 - %105 = select i1 %104, i32 -2147483648, i32 2147483647 - br label %safe_div_round_up_int.exit - -safe_div_round_up_int.exit: ; preds = %81, %84, %101, %103 - %.7 = phi i32 [ 0, %81 ], [ 0, %84 ], [ 1, %103 ], [ %.6, %101 ] - %.0.i102 = phi i32 [ %83, %81 ], [ %89, %84 ], [ %105, %103 ], [ %102, %101 ] - %106 = getelementptr inbounds nuw i8, ptr %2, i64 28 - %107 = load i32, ptr %106, align 4, !tbaa !15 - %108 = tail call i32 @test_int_eq(ptr noundef nonnull @.str.5, i32 noundef 92, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.18, i32 noundef %.7, i32 noundef %107) #4 - %.not81 = icmp eq i32 %108, 0 - br i1 %.not81, label %157, label %112 + %99 = tail call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 %98, i32 %97) + %100 = icmp slt i32 %98, 0 + %101 = select i1 %100, i32 -2147483648, i32 2147483647 + br label %safe_div_round_up_int.exit.thread222 + +safe_div_round_up_int.exit:; preds = %81, %84 + %.0.i102 = phi i32 [ %83, %81 ], [ %89, %84 ] + %102 = getelementptr inbounds nuw i8, ptr %2, i64 28 + %103 = load i32, ptr %102, align 4, !tbaa !15 + %104 = tail call i32 @test_int_eq(ptr noundef nonnull @.str.5, i32 noundef 92, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.18, i32 noundef 0, i32 noundef %103) #4 + %.not81 = icmp eq i32 %104, 0 + br i1 %.not81, label %157, label %113 + +safe_div_round_up_int.exit.thread222: ; preds = %94, %.thread221 + %.6 = phi i32 [ 0, %94 ], [ 1, %.thread221 ] + %.0.i34.i = phi { i32, i1 } [ %99, %94 ], [ { i32 -2147483648, i1 true }, %.thread221 ] + %.0.i29.i = phi i32 [ %101, %94 ], [ 2147483647, %.thread221 ] + %105 = extractvalue { i32, i1 } %.0.i34.i, 1 + %106 = extractvalue { i32, i1 } %.0.i34.i, 0 + %spec.select = select i1 %105, i32 1, i32 %.6 + %spec.select182 = select i1 %105, i32 %.0.i29.i, i32 %106 + %107 = getelementptr inbounds nuw i8, ptr %2, i64 28 + %108 = load i32, ptr %107, align 4, !tbaa !15 + %109 = tail call i32 @test_int_eq(ptr noundef nonnull @.str.5, i32 noundef 92, ptr noundef nonnull @.str.6, ptr noundef nonnull @.str.18, i32 noundef %spec.select, i32 noundef %108) #4 + %.not81225 = icmp eq i32 %109, 0 + br i1 %.not81225, label %157, label %113 safe_div_round_up_int.exit.thread: ; preds = %90 %109 = getelementptr inbounds nuw i8, ptr %2, i64 28 @@ -310,7 +309,9 @@ safe_div_round_up_int.exit.thread: ; preds = %90 112: ; preds = %safe_div_round_up_int.exit br i1 %38, label %safe_add_int.exit110.thread, label %113 -113: ; preds = %112 +113: ; preds = %safe_div_round_up_int.exit.thread222, %112 + %.7226232 = phi i32 [ 0, %113 ], [ %spec.select, %safe_div_round_up_int.exit.thread222 ] + %.0.i102227231 = phi i32 [ %.0.i102, %113 ], [ %spec.select182, %safe_div_round_up_int.exit.thread222 ] %114 = icmp eq i32 %0, 16 %115 = and i64 %8, 348160 %116 = icmp ne i64 %115, 0 @@ -319,7 +320,7 @@ safe_div_round_up_int.exit.thread: ; preds = %90 safe_div_int.exit108: ; preds = %113 %117 = srem i32 %3, %5 - %118 = icmp ne i32 %.7, 0 + %118 = icmp ne i32 %.7226232, 0 %119 = sdiv i32 %3, %5 %120 = icmp ne i32 %117, 0 %121 = zext i1 %120 to i32 @@ -330,7 +331,7 @@ safe_div_int.exit108: ; preds = %113 124: ; preds = %safe_div_int.exit108 %125 = extractvalue { i32, i1 } %122, 0 - %126 = tail call i32 @test_int_eq(ptr noundef nonnull @.str.5, i32 noundef 96, ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.19, i32 noundef %.0.i102, i32 noundef %125) #4 + %126 = tail call i32 @test_int_eq(ptr noundef nonnull @.str.5, i32 noundef 96, ptr noundef nonnull @.str.8, ptr noundef nonnull @.str.19, i32 noundef %.0.i102227231, i32 noundef %125) #4 %.not83 = icmp eq i32 %126, 0 br i1 %.not83, label %157, label %safe_add_int.exit110.thread @@ -408,9 +409,9 @@ safe_abs_int.exit120: ; preds = %148, %147 %.not95 = icmp eq i32 %156, 0 br i1 %.not95, label %157, label %158 -157: ; preds = %safe_mod_int.exit.thread, %safe_div_int.exit.thread204, %safe_div_int.exit.thread, %safe_div_round_up_int.exit.thread, %safe_abs_int.exit120, %155, %safe_abs_int.exit, %148, %safe_neg_int.exit115, %141, %safe_add_int.exit110.thread, %133, %124, %safe_div_round_up_int.exit, %safe_mod_int.exit, %66, %safe_div_int.exit, %53, %safe_mul_int.exit, %35, %safe_sub_int.exit, %25, %safe_add_int.exit, %16 - %.0160 = phi i32 [ %.1, %safe_add_int.exit ], [ 0, %16 ], [ %.2, %safe_sub_int.exit ], [ 0, %25 ], [ %.3, %safe_mul_int.exit ], [ 0, %35 ], [ 1, %safe_div_int.exit ], [ 0, %53 ], [ 1, %safe_mod_int.exit ], [ 0, %66 ], [ %.7, %safe_div_round_up_int.exit ], [ 0, %124 ], [ %spec.select, %safe_add_int.exit110.thread ], [ 0, %133 ], [ %spec.select183, %safe_neg_int.exit115 ], [ 0, %141 ], [ %spec.select, %safe_abs_int.exit ], [ 0, %148 ], [ %spec.select183, %safe_abs_int.exit120 ], [ 0, %155 ], [ 1, %safe_div_round_up_int.exit.thread ], [ 0, %safe_div_int.exit.thread ], [ 1, %safe_div_int.exit.thread204 ], [ 0, %safe_mod_int.exit.thread ] - %.066 = phi i32 [ %.0.i, %safe_add_int.exit ], [ %11, %16 ], [ %.0.i96, %safe_sub_int.exit ], [ %20, %25 ], [ %.0.i97, %safe_mul_int.exit ], [ %30, %35 ], [ 2147483647, %safe_div_int.exit ], [ %49, %53 ], [ %.0.i100, %safe_mod_int.exit ], [ %62, %66 ], [ %.0.i102, %safe_div_round_up_int.exit ], [ %.0.i102, %124 ], [ %spec.select182, %safe_add_int.exit110.thread ], [ %128, %133 ], [ %spec.select184, %safe_neg_int.exit115 ], [ %136, %141 ], [ %.0.i117, %safe_abs_int.exit ], [ %143, %148 ], [ %.0.i119, %safe_abs_int.exit120 ], [ %150, %155 ], [ 2147483647, %safe_div_round_up_int.exit.thread ], [ %49, %safe_div_int.exit.thread ], [ 2147483647, %safe_div_int.exit.thread204 ], [ %62, %safe_mod_int.exit.thread ] +157: ; preds = %safe_div_round_up_int.exit.thread222, %safe_mod_int.exit.thread, %safe_div_int.exit.thread204, %safe_div_int.exit.thread, %safe_div_round_up_int.exit.thread, %safe_abs_int.exit120, %155, %safe_abs_int.exit, %148, %safe_neg_int.exit115, %141, %safe_add_int.exit110.thread, %133, %124, %safe_div_round_up_int.exit, %safe_mod_int.exit, %66, %safe_div_int.exit, %53, %safe_mul_int.exit, %35, %safe_sub_int.exit, %25, %safe_add_int.exit, %16 + %.0160 = phi i32 [ %.1, %safe_add_int.exit ], [ 0, %16 ], [ %.2, %safe_sub_int.exit ], [ 0, %25 ], [ %.3, %safe_mul_int.exit ], [ 0, %35 ], [ 1, %safe_div_int.exit ], [ 0, %53 ], [ 1, %safe_mod_int.exit ], [ 0, %66 ], [ 0, %safe_div_round_up_int.exit ], [ 0, %124 ], [ %spec.select, %safe_add_int.exit110.thread ], [ 0, %133 ], [ %spec.select183, %safe_neg_int.exit115 ], [ 0, %141 ], [ %spec.select, %safe_abs_int.exit ], [ 0, %148 ], [ %spec.select183, %safe_abs_int.exit120 ], [ 0, %155 ], [ 1, %safe_div_round_up_int.exit.thread ], [ 0, %safe_div_int.exit.thread ], [ 1, %safe_div_int.exit.thread206 ], [ 0, %safe_mod_int.exit.thread ], [ %spec.select, %safe_div_round_up_int.exit.thread222 ] + %.066 = phi i32 [ %.0.i, %safe_add_int.exit ], [ %11, %16 ], [ %.0.i96, %safe_sub_int.exit ], [ %20, %25 ], [ %.0.i97, %safe_mul_int.exit ], [ %30, %35 ], [ 2147483647, %safe_div_int.exit ], [ %49, %53 ], [ %.0.i100, %safe_mod_int.exit ], [ %62, %66 ], [ %.0.i102, %safe_div_round_up_int.exit ], [ %.0.i102227231, %124 ], [ %spec.select182, %safe_add_int.exit110.thread ], [ %128, %133 ], [ %spec.select184, %safe_neg_int.exit115 ], [ %136, %141 ], [ %.0.i117, %safe_abs_int.exit ], [ %143, %148 ], [ %.0.i119, %safe_abs_int.exit120 ], [ %150, %155 ], [ 2147483647, %safe_div_round_up_int.exit.thread ], [ %49, %safe_div_int.exit.thread ], [ 2147483647, %safe_div_int.exit.thread206 ], [ %62, %safe_mod_int.exit.thread ], [ %spec.select182, %safe_div_round_up_int.exit.thread222 ] tail call void (ptr, i32, ptr, ...) @test_info(ptr noundef nonnull @.str.5, i32 noundef 124, ptr noundef nonnull @.str.28, i32 noundef %3, i32 noundef %5, i32 noundef %.066, i32 noundef %.0160) #4 br label %158 diff --git a/bench/proxygen/optimized/HTTPSession.ll b/bench/proxygen/optimized/HTTPSession.ll index b42ec5f9c6e..b641d8e62af 100644 --- a/bench/proxygen/optimized/HTTPSession.ll +++ b/bench/proxygen/optimized/HTTPSession.ll @@ -34106,13 +34106,13 @@ if.then: ; preds = %entry if.end3: ; preds = %entry %0 = load i64, ptr %this, align 8 - %tobool.not.i.i = icmp sgt i64 %0, -1 + %tobool.not.i.i = icmp slt i64 %0, 0 %capacity_.i.i.i.i = getelementptr inbounds nuw i8, ptr %this, i64 16 %1 = load i64, ptr %capacity_.i.i.i.i, align 8 - %retval.0.i.i = select i1 %tobool.not.i.i, i64 2, i64 %1 - %2 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %retval.0.i.i, i64 3) + %2 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %1, i64 3) %3 = extractvalue { i64, i1 } %2, 1 - br i1 %3, label %if.then.i, label %_ZNK5folly12small_vectorISt10shared_ptrINS_21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS3_27HTTPSessionObserverAccessorENS_34ObserverContainerBasePolicyDefaultINS4_6EventsELm32EEEE8ObserverEELm2EvE14computeNewSizeEv.exit + %4 = select i1 %tobool.not.i.i, i1 %3, i1 false + br i1 %4, label %if.then.i, label %_ZNK5folly12small_vectorISt10shared_ptrINS_21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS3_27HTTPSessionObserverAccessorENS_34ObserverContainerBasePolicyDefaultINS4_6EventsELm32EEEE8ObserverEELm2EvE14computeNewSizeEv.exit if.then.i: ; preds = %if.end3 tail call void @_ZN5folly6detail16throw_exception_ISt12length_errorJPKcEEEvDpT0_(ptr noundef nonnull @.str.235) #26 @@ -34123,6 +34123,7 @@ _ZNK5folly12small_vectorISt10shared_ptrINS_21ObserverContainerBaseIN8proxygen28H %div1.i = lshr i64 %4, 1 %5 = tail call i64 @llvm.umin.i64(i64 %div1.i, i64 4611686018427387902) %.sroa.speculated.i = add nuw nsw i64 %5, 1 + %.sroa.speculated.i = select i1 %tobool.not.i.i, i64 %8, i64 4 %.sroa.speculated53 = tail call i64 @llvm.umax.i64(i64 %newSize, i64 %.sroa.speculated.i) %6 = icmp samesign ult i64 %.sroa.speculated53, 1152921504606846976 br i1 %6, label %if.end8, label %if.then7 @@ -34308,7 +34309,7 @@ if.then.i.i.i.i44: ; preds = %if.then.i.i.i %vtable.i.i.i.i = load ptr, ptr %26, align 8 %vfn.i.i.i.i = getelementptr inbounds nuw i8, ptr %vtable.i.i.i.i, i64 16 %29 = load ptr, ptr %vfn.i.i.i.i, align 8 - call void %29(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 + call void %32(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 br label %if.end8.sink.split.i.i.i.i if.end.i.i.i.i: ; preds = %if.then.i.i.i @@ -34334,7 +34335,7 @@ if.then7.i.i.i.i: ; preds = %_ZN9__gnu_cxx27__ex %vtable.i.i.i.i.i.i = load ptr, ptr %26, align 8 %vfn.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %vtable.i.i.i.i.i.i, i64 16 %32 = load ptr, ptr %vfn.i.i.i.i.i.i, align 8 - call void %32(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 + call void %35(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 %_M_weak_count.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %26, i64 12 %33 = load i8, ptr @__libc_single_threaded, align 1 %tobool.i.not.i.i.i.i.i.i43 = icmp eq i8 %33, 0 @@ -34359,7 +34360,7 @@ if.end8.sink.split.i.i.i.i: ; preds = %_ZN9__gnu_cxx27__ex %vtable2.i.i.i.i.i.i = load ptr, ptr %26, align 8 %vfn3.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %vtable2.i.i.i.i.i.i, i64 24 %36 = load ptr, ptr %vfn3.i.i.i.i.i.i, align 8 - call void %36(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 + call void %39(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 br label %_ZNSt10shared_ptrIN5folly21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS2_27HTTPSessionObserverAccessorENS0_34ObserverContainerBasePolicyDefaultINS3_6EventsELm32EEEE8ObserverEED2Ev.exit _ZNSt10shared_ptrIN5folly21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS2_27HTTPSessionObserverAccessorENS0_34ObserverContainerBasePolicyDefaultINS3_6EventsELm32EEEE8ObserverEED2Ev.exit: ; preds = %for.body, %_ZN9__gnu_cxx27__exchange_and_add_dispatchEPii.exit.i.i.i.i, %_ZN9__gnu_cxx27__exchange_and_add_dispatchEPii.exit.i.i.i.i.i.i, %if.end8.sink.split.i.i.i.i @@ -34439,13 +34440,13 @@ if.then: ; preds = %entry if.end3: ; preds = %entry %0 = load i64, ptr %this, align 8 - %tobool.not.i.i = icmp sgt i64 %0, -1 + %tobool.not.i.i = icmp slt i64 %0, 0 %capacity_.i.i.i.i = getelementptr inbounds nuw i8, ptr %this, i64 16 %1 = load i64, ptr %capacity_.i.i.i.i, align 8 - %retval.0.i.i = select i1 %tobool.not.i.i, i64 2, i64 %1 - %2 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %retval.0.i.i, i64 3) + %2 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %1, i64 3) %3 = extractvalue { i64, i1 } %2, 1 - br i1 %3, label %if.then.i, label %_ZNK5folly12small_vectorISt10shared_ptrINS_21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS3_27HTTPSessionObserverAccessorENS_34ObserverContainerBasePolicyDefaultINS4_6EventsELm32EEEE8ObserverEELm2EvE14computeNewSizeEv.exit + %4 = select i1 %tobool.not.i.i, i1 %3, i1 false + br i1 %4, label %if.then.i, label %_ZNK5folly12small_vectorISt10shared_ptrINS_21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS3_27HTTPSessionObserverAccessorENS_34ObserverContainerBasePolicyDefaultINS4_6EventsELm32EEEE8ObserverEELm2EvE14computeNewSizeEv.exit if.then.i: ; preds = %if.end3 tail call void @_ZN5folly6detail16throw_exception_ISt12length_errorJPKcEEEvDpT0_(ptr noundef nonnull @.str.235) #26 @@ -34456,6 +34457,7 @@ _ZNK5folly12small_vectorISt10shared_ptrINS_21ObserverContainerBaseIN8proxygen28H %div1.i = lshr i64 %4, 1 %5 = tail call i64 @llvm.umin.i64(i64 %div1.i, i64 4611686018427387902) %.sroa.speculated.i = add nuw nsw i64 %5, 1 + %.sroa.speculated.i = select i1 %tobool.not.i.i, i64 %8, i64 4 %.sroa.speculated53 = tail call i64 @llvm.umax.i64(i64 %newSize, i64 %.sroa.speculated.i) %6 = icmp samesign ult i64 %.sroa.speculated53, 1152921504606846976 br i1 %6, label %if.end8, label %if.then7 @@ -34641,7 +34643,7 @@ if.then.i.i.i.i44: ; preds = %if.then.i.i.i %vtable.i.i.i.i = load ptr, ptr %26, align 8 %vfn.i.i.i.i = getelementptr inbounds nuw i8, ptr %vtable.i.i.i.i, i64 16 %29 = load ptr, ptr %vfn.i.i.i.i, align 8 - call void %29(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 + call void %32(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 br label %if.end8.sink.split.i.i.i.i if.end.i.i.i.i: ; preds = %if.then.i.i.i @@ -34667,7 +34669,7 @@ if.then7.i.i.i.i: ; preds = %_ZN9__gnu_cxx27__ex %vtable.i.i.i.i.i.i = load ptr, ptr %26, align 8 %vfn.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %vtable.i.i.i.i.i.i, i64 16 %32 = load ptr, ptr %vfn.i.i.i.i.i.i, align 8 - call void %32(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 + call void %35(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 %_M_weak_count.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %26, i64 12 %33 = load i8, ptr @__libc_single_threaded, align 1 %tobool.i.not.i.i.i.i.i.i43 = icmp eq i8 %33, 0 @@ -34692,7 +34694,7 @@ if.end8.sink.split.i.i.i.i: ; preds = %_ZN9__gnu_cxx27__ex %vtable2.i.i.i.i.i.i = load ptr, ptr %26, align 8 %vfn3.i.i.i.i.i.i = getelementptr inbounds nuw i8, ptr %vtable2.i.i.i.i.i.i, i64 24 %36 = load ptr, ptr %vfn3.i.i.i.i.i.i, align 8 - call void %36(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 + call void %39(ptr noundef nonnull align 8 dereferenceable(16) %26) #41 br label %_ZNSt10shared_ptrIN5folly21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS2_27HTTPSessionObserverAccessorENS0_34ObserverContainerBasePolicyDefaultINS3_6EventsELm32EEEE8ObserverEED2Ev.exit _ZNSt10shared_ptrIN5folly21ObserverContainerBaseIN8proxygen28HTTPSessionObserverInterfaceENS2_27HTTPSessionObserverAccessorENS0_34ObserverContainerBasePolicyDefaultINS3_6EventsELm32EEEE8ObserverEED2Ev.exit: ; preds = %for.body, %_ZN9__gnu_cxx27__exchange_and_add_dispatchEPii.exit.i.i.i.i, %_ZN9__gnu_cxx27__exchange_and_add_dispatchEPii.exit.i.i.i.i.i.i, %if.end8.sink.split.i.i.i.i diff --git a/bench/rayon-rs/optimized/1j5m2t9gtbur4l2z.ll b/bench/rayon-rs/optimized/1j5m2t9gtbur4l2z.ll index 25ae4e3305a..9e8ba779186 100644 --- a/bench/rayon-rs/optimized/1j5m2t9gtbur4l2z.ll +++ b/bench/rayon-rs/optimized/1j5m2t9gtbur4l2z.ll @@ -510,16 +510,17 @@ define { i64, i64 } @"_ZN5rayon15range_inclusive81_$LT$impl$u20$rayon..range_inc 14: ; preds = %"_ZN5rayon15range_inclusive13Iter$LT$T$GT$6bounds17h321d9f075d9849e2E.exit" %15 = icmp slt i64 %2, %4 %16 = sub i64 %4, %2 - %spec.select.i.i.i.i.i = select i1 %15, i64 %16, i64 0 - %17 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %spec.select.i.i.i.i.i, i64 1) + %17 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %16, i64 1) %18 = extractvalue { i64, i1 } %17, 1 - %19 = extractvalue { i64, i1 } %17, 0 - %not..i = xor i1 %18, true + %19 = and i1 %15, %18 + %20 = extractvalue { i64, i1 } %17, 0 + %21 = select i1 %15, i64 %20, i64 1 + %not..i = xor i1 %19, true %.sroa.0.1.i = zext i1 %not..i to i64 br label %"_ZN5rayon15range_inclusive13Iter$LT$T$GT$6bounds17h321d9f075d9849e2E.exit.thread" "_ZN5rayon15range_inclusive13Iter$LT$T$GT$6bounds17h321d9f075d9849e2E.exit.thread": ; preds = %10, %14, %1 - %.sroa.4.0 = phi i64 [ 0, %1 ], [ %spec.select.i.i.i, %10 ], [ %19, %14 ] + %.sroa.4.0 = phi i64 [ 0, %1 ], [ %spec.select.i.i.i, %10 ], [ %21, %14 ] %.sroa.0.0 = phi i64 [ 1, %1 ], [ 1, %10 ], [ %.sroa.0.1.i, %14 ] %20 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 %21 = insertvalue { i64, i64 } %20, i64 %.sroa.4.0, 1 @@ -688,16 +689,17 @@ define { i64, i64 } @"_ZN5rayon15range_inclusive79_$LT$impl$u20$rayon..range_inc 14: ; preds = %"_ZN5rayon15range_inclusive13Iter$LT$T$GT$6bounds17h681d372db6ee704aE.exit" %15 = icmp sgt i64 %4, %2 %16 = sub i64 %4, %2 - %.0.i.i.i.i = select i1 %15, i64 %16, i64 0 - %17 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i.i.i, i64 1) + %17 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %16, i64 1) %18 = extractvalue { i64, i1 } %17, 1 - %19 = extractvalue { i64, i1 } %17, 0 - %not..i = xor i1 %18, true + %19 = and i1 %15, %18 + %20 = extractvalue { i64, i1 } %17, 0 + %21 = select i1 %15, i64 %20, i64 1 + %not..i = xor i1 %19, true %.sroa.0.1.i = zext i1 %not..i to i64 br label %"_ZN5rayon15range_inclusive13Iter$LT$T$GT$6bounds17h681d372db6ee704aE.exit.thread" "_ZN5rayon15range_inclusive13Iter$LT$T$GT$6bounds17h681d372db6ee704aE.exit.thread": ; preds = %10, %14, %1 - %.sroa.4.0 = phi i64 [ 0, %1 ], [ %.0.i.i, %10 ], [ %19, %14 ] + %.sroa.4.0 = phi i64 [ 0, %1 ], [ %.0.i.i, %10 ], [ %21, %14 ] %.sroa.0.0 = phi i64 [ 1, %1 ], [ 1, %10 ], [ %.sroa.0.1.i, %14 ] %20 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 %21 = insertvalue { i64, i64 } %20, i64 %.sroa.4.0, 1 diff --git a/bench/regex-rs/optimized/154fzydpihuymjog.ll b/bench/regex-rs/optimized/154fzydpihuymjog.ll index 7cde339b15c..7a996610007 100644 --- a/bench/regex-rs/optimized/154fzydpihuymjog.ll +++ b/bench/regex-rs/optimized/154fzydpihuymjog.ll @@ -7712,7 +7712,7 @@ define noalias noundef nonnull align 8 ptr @_ZN12regex_syntax3hir10Properties10r %17 = load i32, ptr %0, align 8, !range !1273, !noundef !9 %18 = getelementptr inbounds nuw i8, ptr %0, i64 4 %trunc12 = trunc nuw i32 %17 to i1 - br i1 %trunc12, label %19, label %"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit" + br i1 %trunc12, label %19, label %30 19: ; preds = %16 %20 = getelementptr inbounds nuw i8, ptr %5, i64 16 @@ -7726,60 +7726,67 @@ define noalias noundef nonnull align 8 ptr @_ZN12regex_syntax3hir10Properties10r %25 = getelementptr inbounds nuw i8, ptr %5, i64 24 %26 = load i64, ptr %25, align 8 %27 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %26, i64 %24) - %28 = extractvalue { i64, i1 } %27, 1 - %29 = extractvalue { i64, i1 } %27, 0 - %not..i = xor i1 %28, true - %spec.select11.i = zext i1 %not..i to i64 br label %"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit" -"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit": ; preds = %22, %19, %16 - %.sroa.05.0 = phi i64 [ 0, %16 ], [ %spec.select11.i, %22 ], [ 0, %19 ] - %.sroa.36.0 = phi i64 [ undef, %16 ], [ %29, %22 ], [ undef, %19 ] - %30 = getelementptr inbounds nuw i8, ptr %5, i64 56 - %31 = load i32, ptr %30, align 8, !noundef !9 - %32 = getelementptr inbounds nuw i8, ptr %5, i64 68 - %33 = load i32, ptr %32, align 4, !noundef !9 - %34 = getelementptr inbounds nuw i8, ptr %5, i64 72 - %35 = load i32, ptr %34, align 8, !noundef !9 - %36 = getelementptr inbounds nuw i8, ptr %5, i64 76 - %37 = load i8, ptr %36, align 4, !range !285, !noundef !9 - %38 = getelementptr inbounds nuw i8, ptr %5, i64 48 - %39 = load i64, ptr %38, align 8, !noundef !9 - %40 = getelementptr inbounds nuw i8, ptr %5, i64 32 - %41 = load i64, ptr %40, align 8, !range !16, !noundef !9 - %42 = getelementptr inbounds nuw i8, ptr %5, i64 40 - %43 = load i64, ptr %42, align 8 - %44 = getelementptr inbounds nuw i8, ptr %0, i64 16 - %45 = load i32, ptr %44, align 8, !noundef !9 - %.not = icmp eq i32 %45, 0 - br i1 %.not, label %51, label %46 - -46: ; preds = %"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit" - %47 = getelementptr inbounds nuw i8, ptr %5, i64 60 - %48 = load i32, ptr %47, align 4, !noundef !9 - %49 = getelementptr inbounds nuw i8, ptr %5, i64 64 - %50 = load i32, ptr %49, align 8, !noundef !9 - br label %56 - -51: ; preds = %"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit" - %trunc.i16 = trunc nuw i64 %41 to i1 - %52 = icmp ne i64 %43, 0 - %spec.select.i17 = select i1 %trunc.i16, i1 %52, i1 false - br i1 %spec.select.i17, label %53, label %56 - -53: ; preds = %51 - %54 = load i32, ptr %18, align 4 - %55 = icmp eq i32 %54, 0 - %.0 = select i1 %trunc12, i1 %55, i1 false +"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit": ; preds = %19, %22 + %.sroa.05.0 = phi { i64, i1 } [ %27, %22 ], [ zeroinitializer, %19 ] + %28 = extractvalue { i64, i1 } %.sroa.6.0.i, 1 + %29 = extractvalue { i64, i1 } %.sroa.05.0, 0 + %spec.select.i16 = select i1 %28, i64 undef, i64 %29 + %not..i = xor i1 %28, true + %.sroa.4.0.i = select i1 %trunc.i, i64 %spec.select.i16, i64 undef + %narrow.i = select i1 %trunc.i, i1 %not..i, i1 false + %.sroa.0.0.i = zext i1 %narrow.i to i64 + br label %30 + +30: ; preds = %16, %"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit" + %.sroa.05.0 = phi i64 [ %.sroa.0.0.i, %"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit" ], [ 0, %16 ] + %.sroa.36.0 = phi i64 [ %.sroa.4.0.i, %"_ZN12regex_syntax3hir10Properties10repetition28_$u7b$$u7b$closure$u7d$$u7d$17h5876377fb8317222E.exit" ], [ undef, %16 ] + %31 = getelementptr inbounds nuw i8, ptr %5, i64 56 + %32 = load i32, ptr %31, align 8, !noundef !9 + %33 = getelementptr inbounds nuw i8, ptr %5, i64 68 + %34 = load i32, ptr %33, align 4, !noundef !9 + %35 = getelementptr inbounds nuw i8, ptr %5, i64 72 + %36 = load i32, ptr %35, align 8, !noundef !9 + %37 = getelementptr inbounds nuw i8, ptr %5, i64 76 + %38 = load i8, ptr %37, align 4, !range !285, !noundef !9 + %39 = getelementptr inbounds nuw i8, ptr %5, i64 48 + %40 = load i64, ptr %39, align 8, !noundef !9 + %41 = getelementptr inbounds nuw i8, ptr %5, i64 32 + %42 = load i64, ptr %41, align 8, !range !16, !noundef !9 + %43 = getelementptr inbounds nuw i8, ptr %5, i64 40 + %44 = load i64, ptr %43, align 8 + %45 = getelementptr inbounds nuw i8, ptr %0, i64 16 + %46 = load i32, ptr %45, align 8, !noundef !9 + %.not = icmp eq i32 %46, 0 + br i1 %.not, label %52, label %47 + +47:; preds = %30 + %48 = getelementptr inbounds nuw i8, ptr %5, i64 60 + %49 = load i32, ptr %48, align 4, !noundef !9 + %50 = getelementptr inbounds nuw i8, ptr %5, i64 64 + %51 = load i32, ptr %50, align 8, !noundef !9 + br label %57 + +52: ; preds = %30 + %trunc.i17 = trunc nuw i64 %42 to i1 + %53 = icmp ne i64 %44, 0 + %spec.select.i18 = select i1 %trunc.i17, i1 %53, i1 false + br i1 %spec.select.i18, label %54, label %57 + +54: ; preds = %52 + %55 = load i32, ptr %18, align 4 + %56 = icmp eq i32 %55, 0 + %.0 = select i1 %trunc12, i1 %56, i1 false %spec.select = zext i1 %.0 to i64 - %spec.select24 = select i1 %.0, i64 0, i64 %43 + %spec.select24 = select i1 %.0, i64 0, i64 %44 br label %56 -56: ; preds = %53, %46, %51 - %.sroa.16.022 = phi i32 [ 0, %51 ], [ %50, %46 ], [ 0, %53 ] - %.sroa.14.020 = phi i32 [ 0, %51 ], [ %48, %46 ], [ 0, %53 ] - %.sroa.5.0 = phi i64 [ %41, %51 ], [ %41, %46 ], [ %spec.select, %53 ] - %.sroa.9.0 = phi i64 [ %43, %51 ], [ %43, %46 ], [ %spec.select24, %53 ] +56: ; preds = %54, %47, %52 + %.sroa.16.022 = phi i32 [ 0, %52 ], [ %51, %47 ], [ 0, %54 ] + %.sroa.14.020 = phi i32 [ 0, %52 ], [ %49, %47 ], [ 0, %54 ] + %.sroa.5.0 = phi i64 [ %42, %52 ], [ %42, %47 ], [ %spec.select, %54 ] + %.sroa.9.0 = phi i64 [ %44, %52 ], [ %44, %47 ], [ %spec.select24, %54 ] %57 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !1328 %58 = tail call noundef align 8 dereferenceable_or_null(80) ptr @__rust_alloc(i64 noundef 80, i64 noundef 8) #31, !noalias !1328 %59 = icmp eq ptr %58, null @@ -7802,19 +7809,19 @@ _ZN5alloc5alloc15exchange_malloc17hbe31f2048284b3faE.llvm.5188572562200175411.ex %.sroa.9.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 40 store i64 %.sroa.9.0, ptr %.sroa.9.0..sroa_idx, align 8 %.sroa.12.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 48 - store i64 %39, ptr %.sroa.12.0..sroa_idx, align 8 + store i64 %40, ptr %.sroa.12.0..sroa_idx, align 8 %.sroa.13.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 56 - store i32 %31, ptr %.sroa.13.0..sroa_idx, align 8 + store i32 %32, ptr %.sroa.13.0..sroa_idx, align 8 %.sroa.14.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 60 store i32 %.sroa.14.020, ptr %.sroa.14.0..sroa_idx, align 4 %.sroa.16.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 64 store i32 %.sroa.16.022, ptr %.sroa.16.0..sroa_idx, align 8 %.sroa.18.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 68 - store i32 %33, ptr %.sroa.18.0..sroa_idx, align 4 + store i32 %34, ptr %.sroa.18.0..sroa_idx, align 4 %.sroa.19.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 72 - store i32 %35, ptr %.sroa.19.0..sroa_idx, align 8 + store i32 %36, ptr %.sroa.19.0..sroa_idx, align 8 %.sroa.20.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 76 - store i8 %37, ptr %.sroa.20.0..sroa_idx, align 4 + store i8 %38, ptr %.sroa.20.0..sroa_idx, align 4 %.sroa.21.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 77 store i8 0, ptr %.sroa.21.0..sroa_idx, align 1 %.sroa.22.0..sroa_idx = getelementptr inbounds nuw i8, ptr %58, i64 78 diff --git a/bench/ropey-rs/optimized/sjmtivrqc2m3vu9.ll b/bench/ropey-rs/optimized/sjmtivrqc2m3vu9.ll index 9569d82cf99..1583f4b93c8 100644 --- a/bench/ropey-rs/optimized/sjmtivrqc2m3vu9.ll +++ b/bench/ropey-rs/optimized/sjmtivrqc2m3vu9.ll @@ -64,19 +64,25 @@ define hidden void @"_ZN133_$LT$smallvec..SmallVec$LT$A$GT$$u20$as$u20$core..ite 16: ; preds = %13 %17 = extractvalue { i64, i1 } %14, 0 %18 = icmp ult i64 %17, 2 - %19 = add i64 %17, -1 - %20 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %19, i1 true) - %21 = lshr i64 -1, %20 - %.sroa.01.0.i.i.i = select i1 %18, i64 0, i64 %21 - %22 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i.i, i64 1) - %23 = extractvalue { i64, i1 } %22, 1 - br i1 %23, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit.thread", label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit" - -"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit": ; preds = %16 - %24 = extractvalue { i64, i1 } %22, 0 - %25 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h811640c1eebda073E"(ptr noalias noundef align 8 dereferenceable(1000) %0, i64 noundef %24) - %26 = extractvalue { i64, i64 } %25, 0 - switch i64 %26, label %27 [ + br i1 %17, label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit.i, label %19 + +19:; preds = %16 + %18 = add i64 %17, -1 + %22 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %20, i1 true) + %22 = lshr i64 -1, %21 + %23 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %22, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit.i + +_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit.i:; preds = %22, %16 + %.sroa.01.0.i.i.i = phi { i64, i1 } [ %23, %19 ], [ { i64 1, i1 false }, %16 ] + %26 = extractvalue { i64, i1 } %.sroa.01.0.i.i.i, 1 + br i1 %26, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit.thread", label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit" + +"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit": ; preds = %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit.i + %25 = extractvalue { i64, i1 } %.sroa.01.0.i.i.i, 0 + %26 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h811640c1eebda073E"(ptr noalias noundef align 8 dereferenceable(1000) %0, i64 noundef %25) + %27 = extractvalue { i64, i64 } %26, 0 + switch i64 %27, label %28 [ i64 -9223372036854775807, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit._ZN8smallvec10infallible17hac02ab9634219958E.exit_crit_edge" i64 0, label %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit.thread" ] @@ -85,13 +91,13 @@ define hidden void @"_ZN133_$LT$smallvec..SmallVec$LT$A$GT$$u20$as$u20$core..ite %.pre55 = load i64, ptr %7, align 8, !alias.scope !12, !noalias !15 br label %_ZN8smallvec10infallible17hac02ab9634219958E.exit -"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit.thread": ; preds = %16, %13, %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit" +"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit.thread": ; preds = %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit.i, %13, %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit" tail call void @_ZN4core9panicking5panic17h75b3c9209f97d725E(ptr noalias noundef nonnull readonly align 1 @anon.066e256b88afcb17f824fe9d079f94fa.9.llvm.16952314824741166450, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.066e256b88afcb17f824fe9d079f94fa.10.llvm.16952314824741166450) #18 unreachable 27: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit" - %28 = extractvalue { i64, i64 } %25, 1 - tail call void @_ZN5alloc5alloc18handle_alloc_error17hc735483c05842e7cE(i64 noundef %26, i64 noundef %28) #18 + %28 = extractvalue { i64, i64 } %26, 1 + tail call void @_ZN5alloc5alloc18handle_alloc_error17hc735483c05842e7cE(i64 noundef %27, i64 noundef %28) #18 unreachable _ZN8smallvec10infallible17hac02ab9634219958E.exit: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9c953f9ea6823E.exit._ZN8smallvec10infallible17hac02ab9634219958E.exit_crit_edge", %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i" @@ -109,8 +115,8 @@ _ZN8smallvec10infallible17hac02ab9634219958E.exit: ; preds = %"_ZN8smallvec17Sma br i1 %36, label %.lr.ph, label %._crit_edge ._crit_edge: ; preds = %55, %_ZN8smallvec10infallible17hac02ab9634219958E.exit - %.sroa.0.0.lcssa = phi ptr [ %1, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ], [ %56, %55 ] - %storemerge.lcssa = phi i64 [ %35, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ], [ %.sink.i, %55 ] + %.sroa.0.0.lcssa = phi ptr [ %1, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ], [ %56, %56 ] + %storemerge.lcssa = phi i64 [ %35, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ], [ %.sink.i, %56 ] store i64 %storemerge.lcssa, ptr %.sink12.i, align 8 %.not49 = icmp eq ptr %.sroa.0.0.lcssa, %2 br i1 %.not49, label %.loopexit, label %.lr.ph52 @@ -122,8 +128,8 @@ _ZN8smallvec10infallible17hac02ab9634219958E.exit: ; preds = %"_ZN8smallvec17Sma br label %40 .lr.ph: ; preds = %_ZN8smallvec10infallible17hac02ab9634219958E.exit, %55 - %storemerge47 = phi i64 [ %59, %55 ], [ %35, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ] - %.sroa.0.046 = phi ptr [ %56, %55 ], [ %1, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ] + %storemerge47 = phi i64 [ %59, %56 ], [ %35, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ] + %.sroa.0.046 = phi ptr [ %56, %56 ], [ %1, %_ZN8smallvec10infallible17hac02ab9634219958E.exit ] %.not43 = icmp eq ptr %.sroa.0.046, %2 br i1 %.not43, label %60, label %55 @@ -141,10 +147,10 @@ _ZN8smallvec10infallible17hac02ab9634219958E.exit: ; preds = %"_ZN8smallvec17Sma br label %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14" "_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14": ; preds = %40, %45 - %47 = phi i64 [ %.pre57, %45 ], [ %43, %40 ] - %.sink13.i.i = phi ptr [ %46, %45 ], [ %37, %40 ] - %.sink12.i.i15 = phi ptr [ %39, %45 ], [ %7, %40 ] - %.sink.i.i16 = phi i64 [ %43, %45 ], [ 984, %40 ] + %47 = phi i64 [ %.pre57, %46 ], [ %43, %41 ] + %.sink13.i.i = phi ptr [ %46, %46 ], [ %37, %41 ] + %.sink12.i.i15 = phi ptr [ %39, %46 ], [ %7, %41 ] + %.sink.i.i16 = phi i64 [ %43, %46 ], [ 984, %41 ] %48 = icmp eq i64 %47, %.sink.i.i16 br i1 %48, label %49, label %"_ZN8smallvec17SmallVec$LT$A$GT$4push17h759dcdac6bdea756E.exit" @@ -155,9 +161,9 @@ _ZN8smallvec10infallible17hac02ab9634219958E.exit: ; preds = %"_ZN8smallvec17Sma br label %"_ZN8smallvec17SmallVec$LT$A$GT$4push17h759dcdac6bdea756E.exit" "_ZN8smallvec17SmallVec$LT$A$GT$4push17h759dcdac6bdea756E.exit": ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14", %49 - %51 = phi i64 [ %.pre.i, %49 ], [ %47, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14" ] - %.sroa.01.0.i = phi ptr [ %39, %49 ], [ %.sink12.i.i15, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14" ] - %.sroa.0.0.i17 = phi ptr [ %50, %49 ], [ %.sink13.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14" ] + %51 = phi i64 [ %.pre.i, %50 ], [ %47, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14" ] + %.sroa.01.0.i = phi ptr [ %39, %50 ], [ %.sink12.i.i15, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14" ] + %.sroa.0.0.i17 = phi ptr [ %50, %50 ], [ %.sink13.i.i, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit.i14" ] %52 = getelementptr inbounds i8, ptr %.sroa.0.0.i17, i64 %51 store i8 %42, ptr %52, align 1 %53 = load i64, ptr %.sroa.01.0.i, align 8, !alias.scope !32, !noundef !11 @@ -186,34 +192,48 @@ _ZN8smallvec10infallible17hac02ab9634219958E.exit: ; preds = %"_ZN8smallvec17Sma ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.16952314824741166450"(i64 noundef %0) unnamed_addr #2 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.sroa.01.0 = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not. = xor i1 %7, true + br i1 %2, label %8, label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %8 + +8: ; preds = %1, %3 + %.sroa.01.0 = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %9 = extractvalue { i64, i1 } %.sroa.01.0, 1 + %10 = extractvalue { i64, i1 } %.sroa.01.0, 0 + %.sroa.3.0 = select i1 %9, i64 undef, i64 %10 + %not. = xor i1 %9, true %.sroa.0.0 = zext i1 %not. to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0, 1 ret { i64, i64 } %10 } ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450(i64 noundef %0) unnamed_addr #2 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.sroa.01.0.i = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not..i = xor i1 %7, true + br i1 %2, label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.16952314824741166450.exit", label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.16952314824741166450.exit" + +"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h20133c3fe39f08a5E.llvm.16952314824741166450.exit": ; preds = %1, %3 + %.sroa.01.0.i = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %8 = extractvalue { i64, i1 } %.sroa.01.0.i, 1 + %9 = extractvalue { i64, i1 } %.sroa.01.0.i, 0 + %.sroa.3.0.i = select i1 %8, i64 undef, i64 %9 + %not..i = xor i1 %8, true %.sroa.0.0.i = zext i1 %not..i to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0.i, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0.i, 1 ret { i64, i64 } %10 } @@ -498,37 +518,43 @@ define hidden { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h92d9 %6 = select i1 %4, i64 %.val, i64 %3 %7 = sub i64 %.sink.i, %6 %.not = icmp ult i64 %7, %1 - br i1 %.not, label %8, label %24 + br i1 %.not, label %8, label %25 8: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit" %9 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 %1) %10 = extractvalue { i64, i1 } %9, 1 - br i1 %10, label %24, label %11 + br i1 %10, label %25, label %11 11: ; preds = %8 %12 = extractvalue { i64, i1 } %9, 0 %13 = icmp ult i64 %12, 2 - %14 = add i64 %12, -1 - %15 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %14, i1 true) - %16 = lshr i64 -1, %15 - %.sroa.01.0.i.i = select i1 %13, i64 0, i64 %16 - %17 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i, i64 1) - %18 = extractvalue { i64, i1 } %17, 1 - br i1 %18, label %24, label %19 - -19: ; preds = %11 - %20 = extractvalue { i64, i1 } %17, 0 - %21 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h811640c1eebda073E"(ptr noalias noundef align 8 dereferenceable(1000) %0, i64 noundef %20) - %22 = extractvalue { i64, i64 } %21, 0 - %23 = extractvalue { i64, i64 } %21, 1 - br label %24 - -24: ; preds = %11, %8, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit", %19 - %.sroa.4.0 = phi i64 [ %23, %19 ], [ undef, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit" ], [ undef, %8 ], [ undef, %11 ] - %.sroa.0.0 = phi i64 [ %22, %19 ], [ -9223372036854775807, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit" ], [ 0, %8 ], [ 0, %11 ] - %25 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 - %26 = insertvalue { i64, i64 } %25, i64 %.sroa.4.0, 1 - ret { i64, i64 } %26 + br i1 %13, label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit, label %14 + +14:; preds = %11 + %15 = add i64 %12, -1 + %17 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %15, i1 true) + %17 = lshr i64 -1, %16 + %18 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %17, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit + +_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit:; preds = %9, %14 + %.sroa.01.0.i.i = phi { i64, i1 } [ %18, %14 ], [ { i64 1, i1 false }, %10 ] + %22 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 1 + br i1 %19, label %25, label %19 + +20: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit + %21 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 0 + %22 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h811640c1eebda073E"(ptr noalias noundef align 8 dereferenceable(1000) %0, i64 noundef %21) + %23 = extractvalue { i64, i64 } %22, 0 + %24 = extractvalue { i64, i64 } %22, 1 + br label %25 + +25: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit, %8, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit", %20 + %.sroa.4.0 = phi i64 [ %24, %20 ], [ undef, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit" ], [ undef, %8 ], [ undef, %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit ] + %.sroa.0.0 = phi i64 [ %23, %20 ], [ -9223372036854775807, %"_ZN8smallvec17SmallVec$LT$A$GT$10triple_mut17h071505bc27cf3d0bE.llvm.16952314824741166450.exit" ], [ 0, %8 ], [ 0, %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit ] + %26 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 + %27 = insertvalue { i64, i64 } %26, i64 %.sroa.4.0, 1 + ret { i64, i64 } %27 } ; Function Attrs: nonlazybind uwtable @@ -638,28 +664,34 @@ define internal fastcc void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unche %.sink7.i = select i1 %3, i64 %5, i64 %2 %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink7.i, i64 1) %7 = extractvalue { i64, i1 } %6, 1 - br i1 %7, label %16, label %8 + br i1 %7, label %17, label %8 8: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h2f30d8a9bb127a1cE.llvm.16952314824741166450.exit" %9 = extractvalue { i64, i1 } %6, 0 %10 = icmp ult i64 %9, 2 - %11 = add i64 %9, -1 - %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %11, i1 true) - %13 = lshr i64 -1, %12 - %.sroa.01.0.i.i = select i1 %10, i64 0, i64 %13 - %14 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i, i64 1) - %15 = extractvalue { i64, i1 } %14, 1 - br i1 %15, label %16, label %17 + br i1 %9, label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit, label %9 + +16: ; preds = %8 + %12 = add i64 %9, -1 + %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) + %14 = lshr i64 -1, %13 + %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %14, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit -16: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h2f30d8a9bb127a1cE.llvm.16952314824741166450.exit", %8 +_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit: ; preds = %8, %11 + %.sroa.01.0.i.i = phi { i64, i1 } [ %15, %11 ], [ { i64 1, i1 false }, %8 ] + %16 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 1 + br i1 %16, label %17, label %18 + +17: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17h2f30d8a9bb127a1cE.llvm.16952314824741166450.exit", %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit tail call void @_ZN4core6option13expect_failed17h7f842a57ad883afaE(ptr noalias noundef nonnull readonly align 1 @anon.066e256b88afcb17f824fe9d079f94fa.9.llvm.16952314824741166450, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.066e256b88afcb17f824fe9d079f94fa.13.llvm.16952314824741166450) #18 unreachable -17: ; preds = %8 - %18 = extractvalue { i64, i1 } %14, 0 +17: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit + %18 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 0 %19 = tail call fastcc { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h811640c1eebda073E"(ptr noalias noundef align 8 dereferenceable(1000) %0, i64 noundef %18) %20 = extractvalue { i64, i64 } %19, 0 - switch i64 %20, label %22 [ + switch i64 %20, label %23 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17hac02ab9634219958E.exit i64 0, label %21 ] @@ -688,28 +720,34 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hf4 %.sink7.i = select i1 %3, i64 %5, i64 %2 %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink7.i, i64 1) %7 = extractvalue { i64, i1 } %6, 1 - br i1 %7, label %16, label %8 + br i1 %7, label %17, label %8 8: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17hff352671a5492543E.llvm.16952314824741166450.exit" %9 = extractvalue { i64, i1 } %6, 0 %10 = icmp ult i64 %9, 2 - %11 = add i64 %9, -1 - %12 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %11, i1 true) - %13 = lshr i64 -1, %12 - %.sroa.01.0.i.i = select i1 %10, i64 0, i64 %13 - %14 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.01.0.i.i, i64 1) - %15 = extractvalue { i64, i1 } %14, 1 - br i1 %15, label %16, label %17 + br i1 %9, label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit, label %9 + +16: ; preds = %8 + %12 = add i64 %9, -1 + %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) + %14 = lshr i64 -1, %13 + %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %14, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit + +_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit: ; preds = %8, %11 + %.sroa.01.0.i.i = phi { i64, i1 } [ %15, %11 ], [ { i64 1, i1 false }, %8 ] + %16 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 1 + br i1 %16, label %17, label %18 -16: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17hff352671a5492543E.llvm.16952314824741166450.exit", %8 +17: ; preds = %"_ZN8smallvec17SmallVec$LT$A$GT$6triple17hff352671a5492543E.llvm.16952314824741166450.exit", %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit tail call void @_ZN4core6option13expect_failed17h7f842a57ad883afaE(ptr noalias noundef nonnull readonly align 1 @anon.066e256b88afcb17f824fe9d079f94fa.9.llvm.16952314824741166450, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.066e256b88afcb17f824fe9d079f94fa.13.llvm.16952314824741166450) #18 unreachable -17: ; preds = %8 - %18 = extractvalue { i64, i1 } %14, 0 +17: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h7a514adfc9285b7dE.llvm.16952314824741166450.exit + %18 = extractvalue { i64, i1 } %.sroa.01.0.i.i, 0 %19 = tail call { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h0a83334483f1b217E.llvm.16952314824741166450"(ptr noalias noundef nonnull align 8 dereferenceable(48) %0, i64 noundef %18) %20 = extractvalue { i64, i64 } %19, 0 - switch i64 %20, label %22 [ + switch i64 %20, label %23 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17hac02ab9634219958E.exit i64 0, label %21 ] diff --git a/bench/rust-analyzer-rs/optimized/29a31q43npmnb7t6.ll b/bench/rust-analyzer-rs/optimized/29a31q43npmnb7t6.ll index 04d5952e239..90f00c360be 100644 --- a/bench/rust-analyzer-rs/optimized/29a31q43npmnb7t6.ll +++ b/bench/rust-analyzer-rs/optimized/29a31q43npmnb7t6.ll @@ -5149,9 +5149,9 @@ define hidden void @"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$ store i64 %31, ptr %0, align 8, !alias.scope !2367, !noalias !2366 br label %37 -37: ; preds = %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit39.thread", %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hda3e5252c704c94eE.exit", %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit", %9 - %.sink59 = phi i64 [ 16, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit39.thread" ], [ 8, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hda3e5252c704c94eE.exit" ], [ 8, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit" ], [ 16, %9 ] - %.sroa.6.0.sink = phi i64 [ %.sroa.6.0, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit39.thread" ], [ %.sink.i.i16, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hda3e5252c704c94eE.exit" ], [ %.sink.i.i, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit" ], [ 0, %9 ] +37: ; preds = %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit47.i.i33", %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hda3e5252c704c94eE.exit", %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit", %9 + %.sink59 = phi i64 [ 16, %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit47.i.i33" ], [ 8, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hda3e5252c704c94eE.exit" ], [ 8, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit" ], [ 16, %9 ] + %.sroa.6.0.sink = phi i64 [ %.sroa.6.0, %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit47.i.i33" ], [ %.sink.i.i16, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hda3e5252c704c94eE.exit" ], [ %.sink.i.i, %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit" ], [ 0, %9 ] %38 = getelementptr inbounds nuw i8, ptr %0, i64 %.sink59 store i64 %.sroa.6.0.sink, ptr %38, align 8 ret void @@ -5250,7 +5250,6 @@ define hidden void @"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$ %.val.i.i24 = load ptr, ptr %82, align 8, !alias.scope !2416, !noalias !2421 %.not.i.i25 = icmp ne ptr %.val.i.i24, null %.sroa.056.0.not.i.i26 = select i1 %trunc.i.i23, i1 %.not.i.i25, i1 false - %spec.select47 = select i1 %.sroa.056.0.not.i.i26, i64 undef, i64 %81 %83 = getelementptr inbounds nuw i8, ptr %1, i64 8 %84 = getelementptr inbounds nuw i8, ptr %1, i64 56 %85 = load ptr, ptr %84, align 8, !alias.scope !2442, !noalias !2447, !noundef !11 @@ -5286,29 +5285,20 @@ define hidden void @"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$ %.sroa.8.0.i.i34 = phi i64 [ %101, %96 ], [ 0, %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit.i.i30" ] %102 = add nuw nsw i64 %.sroa.8.0.i.i34, %.sroa.7.0.i.i31 %103 = load ptr, ptr %83, align 8, !alias.scope !2442, !noalias !2447, !noundef !11 - %104 = icmp ne ptr %103, null + %104 = icmp eq ptr %103, null %105 = getelementptr inbounds nuw i8, ptr %1, i64 40 %.val.i.i35 = load i64, ptr %105, align 8, !alias.scope !2442, !noalias !2447 - %106 = icmp ne i64 %.val.i.i35, 0 - %or.cond.i.i36.not50 = select i1 %104, i1 %106, i1 false - %brmerge = select i1 %or.cond.i.i36.not50, i1 true, i1 %.sroa.056.0.not.i.i26 - br i1 %brmerge, label %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit39.thread", label %107 - -107: ; preds = %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit47.i.i33" - %108 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %spec.select47, i64 %102) - %109 = extractvalue { i64, i1 } %108, 1 - %110 = extractvalue { i64, i1 } %108, 0 - %not. = xor i1 %109, true - %spec.select = zext i1 %not. to i64 - br label %"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit39.thread" - -"_ZN106_$LT$core..iter..adapters..flatten..Flatten$LT$I$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hdc8e118cb656fae4E.exit39.thread": ; preds = %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit47.i.i33", %107 - %.sroa.04.0 = phi i64 [ %spec.select, %107 ], [ 0, %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit47.i.i33" ] - %.sroa.6.0 = phi i64 [ %110, %107 ], [ undef, %"_ZN4core6option15Option$LT$T$GT$6map_or17h3c54d56b19b42673E.exit47.i.i33" ] - %111 = add nuw nsw i64 %102, %81 - store i64 %111, ptr %0, align 8 - %112 = getelementptr inbounds nuw i8, ptr %0, i64 8 - store i64 %.sroa.04.0, ptr %112, align 8 + %106 = icmp eq i64 %.val.i.i35, 0 + %or.cond.i.i36.not50 = select i1 %104, i1 true, i1 %106 + %107 = add nuw nsw i64 %102, %81 + %not..sroa.056.0.not.i.i26 = xor i1 %.sroa.056.0.not.i.i26, true + %spec.select49 = select i1 %.sroa.056.0.not.i.i26, i64 undef, i64 %107 + %narrow = select i1 %or.cond.i.i36, i1 %not..sroa.056.0.not.i.i26, i1 false + %.sroa.04.0 = zext i1 %narrow to i64 + %.sroa.6.0 = select i1 %or.cond.i.i36.not50, i64 %spec.select49, i64 undef + store i64 %107, ptr %0, align 8 + %108 = getelementptr inbounds nuw i8, ptr %0, i64 8 + store i64 %.sroa.04.0, ptr %108, align 8 br label %37 } @@ -84677,9 +84667,6 @@ declare void @llvm.memcpy.p0.p0.i64(ptr noalias writeonly captures(none), ptr no ; Function Attrs: cold noreturn nounwind nonlazybind uwtable declare void @_ZN4core9panicking16panic_in_cleanup17hbacfddf1bcf21a1eE() unnamed_addr #38 -; Function Attrs: mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) -declare { i64, i1 } @llvm.uadd.with.overflow.i64(i64, i64) #39 - ; Function Attrs: cold noreturn nonlazybind uwtable declare void @_ZN4core9panicking5panic17h44790a89027c670fE(ptr noalias noundef nonnull readonly align 1, i64 noundef, ptr noalias noundef readonly align 8 dereferenceable(24)) unnamed_addr #40 @@ -86222,11 +86209,11 @@ attributes #35 = { inlinehint mustprogress nofree norecurse nosync nounwind nonl attributes #36 = { inlinehint nofree norecurse nosync nounwind nonlazybind memory(argmem: read, inaccessiblemem: write) uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #37 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: readwrite) } attributes #38 = { cold noreturn nounwind nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } -attributes #39 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } -attributes #40 = { cold noreturn nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } -attributes #41 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) } -attributes #42 = { cold nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } -attributes #43 = { mustprogress nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) } +attributes #39 = { cold noreturn nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } +attributes #40 = { mustprogress nocallback nofree nounwind willreturn memory(argmem: write) } +attributes #41 = { cold nonlazybind uwtable "probe-stack"="inline-asm" "target-cpu"="x86-64" } +attributes #42 = { mustprogress nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: write) } +attributes #43 = { mustprogress nocallback nofree nosync nounwind speculatable willreturn memory(none) } attributes #44 = { nounwind nonlazybind allockind("free") uwtable "alloc-family"="__rust_alloc" "probe-stack"="inline-asm" "target-cpu"="x86-64" } attributes #45 = { cold noreturn nounwind memory(inaccessiblemem: write) } attributes #46 = { mustprogress nocallback nofree nosync nounwind willreturn memory(argmem: readwrite) } diff --git a/bench/rust-analyzer-rs/optimized/3aojx6tzw7bx942t.ll b/bench/rust-analyzer-rs/optimized/3aojx6tzw7bx942t.ll index 409a8cd0675..819d359369b 100644 --- a/bench/rust-analyzer-rs/optimized/3aojx6tzw7bx942t.ll +++ b/bench/rust-analyzer-rs/optimized/3aojx6tzw7bx942t.ll @@ -987,7 +987,6 @@ define internal fastcc void @"_ZN102_$LT$core..iter..adapters..map..Map$LT$I$C$F %.val.i.i13.i = load i64, ptr %116, align 8, !alias.scope !461, !noalias !466 %117 = icmp ne i64 %.val.i.i13.i, 0 %.sroa.056.0.i.i14.not58.i = select i1 %115, i1 %117, i1 false - %spec.select55.i = select i1 %.sroa.056.0.i.i14.not58.i, i64 undef, i64 %112 %trunc.i.i17.i = trunc nuw i64 %5 to i1 br i1 %trunc.i.i17.i, label %118, label %"_ZN4core6option15Option$LT$T$GT$6map_or17h022f883286ab4d1dE.exit.i.i18.i" @@ -1094,7 +1093,7 @@ define internal fastcc void @"_ZN102_$LT$core..iter..adapters..map..Map$LT$I$C$F 178: ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17hff706b21e6fd04beE.exit47.i" %179 = extractvalue { i64, i1 } %174, 0 - %180 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %spec.select55.i, i64 %179) + %180 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %112, i64 %179) %181 = extractvalue { i64, i1 } %180, 1 %182 = extractvalue { i64, i1 } %180, 0 %not..i = xor i1 %181, true diff --git a/bench/rust-analyzer-rs/optimized/4ylvf7q7b8ea52vh.ll b/bench/rust-analyzer-rs/optimized/4ylvf7q7b8ea52vh.ll index 507266878fe..f824fab6cfe 100644 --- a/bench/rust-analyzer-rs/optimized/4ylvf7q7b8ea52vh.ll +++ b/bench/rust-analyzer-rs/optimized/4ylvf7q7b8ea52vh.ll @@ -404,17 +404,24 @@ define hidden void @"_ZN132_$LT$alloc..vec..Vec$LT$T$C$A$GT$$u20$as$u20$alloc..v ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17ha202f3766644aa71E.llvm.979910700339791004"(i64 noundef %0) unnamed_addr #1 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.0 = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not. = xor i1 %7, true + br i1 %2, label %8, label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %8 + +8: ; preds = %1, %3 + %.0 = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %9 = extractvalue { i64, i1 } %.0, 1 + %10 = extractvalue { i64, i1 } %.0, 0 + %.sroa.3.0 = select i1 %9, i64 undef, i64 %10 + %not. = xor i1 %9, true %.sroa.0.0 = zext i1 %not. to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0, 1 ret { i64, i64 } %10 } @@ -426,17 +433,24 @@ define hidden noundef nonnull ptr @_ZN4core3ops8function6FnOnce9call_once17h06e7 ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @_ZN4core3ops8function6FnOnce9call_once17h8b1cf4a6fddc71ccE.llvm.979910700339791004(i64 noundef %0) unnamed_addr #1 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.0.i = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not..i = xor i1 %7, true + br i1 %2, label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17ha202f3766644aa71E.llvm.979910700339791004.exit", label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17ha202f3766644aa71E.llvm.979910700339791004.exit" + +"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17ha202f3766644aa71E.llvm.979910700339791004.exit": ; preds = %1, %3 + %.0.i = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %8 = extractvalue { i64, i1 } %.0.i, 1 + %9 = extractvalue { i64, i1 } %.0.i, 0 + %.sroa.3.0.i = select i1 %8, i64 undef, i64 %9 + %not..i = xor i1 %8, true %.sroa.0.0.i = zext i1 %not..i to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0.i, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0.i, 1 ret { i64, i64 } %10 } @@ -826,29 +840,35 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17hff %6 = load i64, ptr %5, align 8, !alias.scope !175, !noalias !178 %.sink4.i = select i1 %4, i64 %6, i64 %3 %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink4.i, i64 1) - %8 = extractvalue { i64, i1 } %7, 1 - br i1 %8, label %.thread, label %9 - -9: ; preds = %1 - %10 = extractvalue { i64, i1 } %7, 0 - %11 = icmp ult i64 %10, 2 - %12 = add i64 %10, -1 - %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) - %14 = lshr i64 -1, %13 - %.0.i.i = select i1 %11, i64 0, i64 %14 - %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i, i64 1) - %16 = extractvalue { i64, i1 } %15, 1 - br i1 %16, label %.thread, label %17 - -.thread: ; preds = %1, %9 + %8 = extractvalue { i64, i1 } %7, 0 + %9 = extractvalue { i64, i1 } %7, 1 + br i1 %9, label %.thread, label %10 + +10:; preds = %1 + %11 = icmp ult i64 %8, 2 + br i1 %10, label %17, label %12 + +12:; preds = %10 + %13 = add i64 %8, -1 + %15 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %13, i1 true) + %15 = lshr i64 -1, %14 + %16 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %15, i64 1) + br label %17 + +17: ; preds = %12, %10 + %.0.i.i = phi { i64, i1 } [ %16, %12 ], [ { i64 1, i1 false }, %10 ] + %18 = extractvalue { i64, i1 } %.0.i.i, 1 + br i1 %18, label %.thread, label %19 + +.thread: ; preds = %1, %17 tail call void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.d9e016162abdc04bcb57427de26a4941.0.llvm.979910700339791004, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.d9e016162abdc04bcb57427de26a4941.24.llvm.979910700339791004) #22 unreachable -17: ; preds = %9 - %18 = extractvalue { i64, i1 } %15, 0 +17: ; preds = %17 + %18 = extractvalue { i64, i1 } %.0.i.i, 0 %19 = tail call { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h23d9608f7670a8caE.llvm.979910700339791004"(ptr noalias noundef nonnull align 8 dereferenceable(24) %0, i64 noundef %18) %20 = extractvalue { i64, i64 } %19, 0 - switch i64 %20, label %22 [ + switch i64 %20, label %24 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17h990bf60cff8d81d6E.llvm.979910700339791004.exit i64 0, label %21 ] diff --git a/bench/rust-analyzer-rs/optimized/7lpeywhc9n6h2ze.ll b/bench/rust-analyzer-rs/optimized/7lpeywhc9n6h2ze.ll index 9544b0b9065..bdd8087ccb1 100644 --- a/bench/rust-analyzer-rs/optimized/7lpeywhc9n6h2ze.ll +++ b/bench/rust-analyzer-rs/optimized/7lpeywhc9n6h2ze.ll @@ -22512,20 +22512,26 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17h1e2 7: ; preds = %2 %8 = icmp ult i64 %1, 2 - %9 = add i64 %1, -1 - %10 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %9, i1 true) - %11 = lshr i64 -1, %10 - %.0 = select i1 %8, i64 0, i64 %11 - %12 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0, i64 1) - %13 = extractvalue { i64, i1 } %12, 1 - br i1 %13, label %14, label %15 + br i1 %8, label %14, label %14 14: ; preds = %7 + %10 = add i64 %1, -1 + %11 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %10, i1 true) + %12 = lshr i64 -1, %11 + %13 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %12, i64 1) + br label %14 + +14: ; preds = %7, %9 + %.0 = phi { i64, i1 } [ %13, %9 ], [ { i64 1, i1 false }, %7 ] + %15 = extractvalue { i64, i1 } %.0, 1 + br i1 %15, label %16, label %17 + +16: ; preds = %14 tail call void @_ZN4core6option13expect_failed17hea24986454718b4fE(ptr noalias noundef nonnull readonly align 1 @anon.705cab2699fe7a125ccfcc7b74394344.13, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.705cab2699fe7a125ccfcc7b74394344.15) #46 unreachable -15: ; preds = %7 - %16 = extractvalue { i64, i1 } %12, 0 +15: ; preds = %14 + %16 = extractvalue { i64, i1 } %.0, 0 %17 = shl nuw i64 %4, 1 %.0.sroa.speculated.i = tail call noundef i64 @llvm.umax.i64(i64 %17, i64 %16) %18 = tail call { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h6d8bee6a023df094E"(i64 noundef %.0.sroa.speculated.i, i1 noundef zeroext false) @@ -22556,7 +22562,7 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17h1e2 %28 = landingpad { ptr, i32 } cleanup invoke void @"_ZN4core3ptr164drop_in_place$LT$alloc..vec..Vec$LT$ra_ap_rustc_pattern_analysis..pat..DeconstructedPat$LT$hir_ty..diagnostics..match_check..pat_analysis..MatchCheckCtx$GT$$GT$$GT$17h1c8054fe6b81636dE"(ptr noalias noundef nonnull align 8 dereferenceable(24) %3) #48 - to label %31 unwind label %29 + to label %33 unwind label %29 29: ; preds = %27 %30 = landingpad { ptr, i32 } @@ -22568,7 +22574,7 @@ define internal fastcc void @"_ZN11typed_arena18ChunkList$LT$T$GT$7reserve17h1e2 resume { ptr, i32 } %28 "_ZN5alloc3vec16Vec$LT$T$C$A$GT$4push17h7caf0559fce168abE.exit": ; preds = %15, %._crit_edge.i - %32 = phi i64 [ %.pre.i, %._crit_edge.i ], [ %23, %15 ] + %32 = phi i64 [ %.pre.i, %._crit_edge.i ], [ %23, %17 ] %33 = getelementptr inbounds nuw i8, ptr %0, i64 32 %34 = load ptr, ptr %33, align 8, !alias.scope !7236, !noalias !7239, !nonnull !4, !noundef !4 %35 = getelementptr inbounds { { i64, ptr, {} }, i64 }, ptr %34, i64 %32 diff --git a/bench/rustfmt-rs/optimized/4arc02n7xt9gqo2v.ll b/bench/rustfmt-rs/optimized/4arc02n7xt9gqo2v.ll index 55fcf3886de..f01c3e0cda6 100644 --- a/bench/rustfmt-rs/optimized/4arc02n7xt9gqo2v.ll +++ b/bench/rustfmt-rs/optimized/4arc02n7xt9gqo2v.ll @@ -12143,83 +12143,93 @@ define internal fastcc void @"_ZN8smallvec17SmallVec$LT$A$GT$4push17hf5090a0b713 12: ; preds = %10 %13 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink.i, i64 1) - %14 = extractvalue { i64, i1 } %13, 1 - br i1 %14, label %43, label %15 + %14 = extractvalue { i64, i1 } %13, 0 + %15 = extractvalue { i64, i1 } %13, 1 + br i1 %15, label %47, label %16 15: ; preds = %12 - %16 = extractvalue { i64, i1 } %13, 0 - %17 = add i64 %16, -1 - %18 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %17, i1 true) - %19 = lshr i64 -1, %18 - %20 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %19, i64 1) - %21 = extractvalue { i64, i1 } %20, 1 - %22 = extractvalue { i64, i1 } %20, 0 - br i1 %21, label %43, label %23 + %17 = icmp ult i64 %14, 2 + br i1 %17, label %23, label %18 23: ; preds = %15 - tail call void @llvm.experimental.noalias.scope.decl(metadata !2254) - %24 = icmp ult i64 %4, 3 - %.not.i.i = icmp ult i64 %22, %.sink.i - br i1 %.not.i.i, label %25, label %26 + %19 = add i64 %14, -1 + %20 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %19, i1 true) + %21 = lshr i64 -1, %20 + %22 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %21, i64 1) + br label %23 -25: ; preds = %23 - tail call void @_ZN4core9panicking5panic17hbd449742545cb8d5E(ptr noalias noundef nonnull readonly align 1 @anon.68b887a773b1ffe49eb9a07ee8b917ec.152, i64 noundef 32, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.68b887a773b1ffe49eb9a07ee8b917ec.153) #44, !noalias !2257 - unreachable +25: ; preds = %23, %16 + %.0.i.i.i = phi { i64, i1 } [ %22, %18 ], [ { i64 1, i1 false }, %16 ] + %24 = extractvalue { i64, i1 } %.0.i.i.i, 1 + %25 = extractvalue { i64, i1 } %.0.i.i.i, 0 + br i1 %24, label %47, label %26 26: ; preds = %23 - %.not76.i.i = icmp eq i64 %4, %22 - br i1 %.not76.i.i, label %_ZN8smallvec10infallible17hc7f743693d04cb96E.exit, label %27 + tail call void @llvm.experimental.noalias.scope.decl(metadata !2254) + %27 = icmp ult i64 %4, 3 + %.not.i.i = icmp ult i64 %25, %.sink.i + br i1 %.not.i.i, label %28, label %29 -27: ; preds = %26 - %28 = shl i64 %22, 3 - %29 = icmp ugt i64 %22, 2305843009213693951 - %30 = icmp ugt i64 %28, 9223372036854775800 - %or.cond = or i1 %29, %30 - br i1 %or.cond, label %43, label %31 +31: ; preds = %26 + tail call void @_ZN4core9panicking5panic17hbd449742545cb8d5E(ptr noalias noundef nonnull readonly align 1 @anon.68b887a773b1ffe49eb9a07ee8b917ec.152, i64 noundef 32, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.68b887a773b1ffe49eb9a07ee8b917ec.153) #44, !noalias !2257 + unreachable -31: ; preds = %27 - br i1 %24, label %35, label %32 +32: ; preds = %26 + %30 = icmp ult i64 %25, 3 + %34 = icmp eq i64 %4, %25 + %or.cond13 = or i1 %30, %34 + br i1 %or.cond13, label %_ZN8smallvec10infallible17hc7f743693d04cb96E.exit, label %31 -32: ; preds = %31 - %33 = shl i64 %.sink.i, 3 - %34 = icmp ugt i64 %33, 9223372036854775800 - br i1 %34, label %43, label %38 +31: ; preds = %29 + %32 = shl i64 %25, 3 + %33 = icmp ugt i64 %25, 2305843009213693951 + %34 = icmp ugt i64 %32, 9223372036854775800 + %or.cond = or i1 %33, %34 + br i1 %or.cond, label %47, label %35 35: ; preds = %31 - %36 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !2257 - %37 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %28, i64 noundef 8) #47, !noalias !2257 - %.not121.i.i = icmp eq ptr %37, null - br i1 %.not121.i.i, label %44, label %41 + br i1 %27, label %39, label %38 -38: ; preds = %32 - %39 = tail call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %6, i64 noundef %33, i64 noundef 8, i64 noundef %28) #47, !noalias !2257 - %.not120.i.i = icmp eq ptr %39, null - br i1 %.not120.i.i, label %44, label %40 +38: ; preds = %35 + %37 = shl i64 %.sink.i, 3 + %.not120.i.i = icmp ugt i64 %37, 9223372036854775800 + br i1 %.not120.i.i, label %47, label %42 -40: ; preds = %41, %38 - %.069.i.i = phi ptr [ %37, %41 ], [ %39, %38 ] +40: ; preds = %35 + %40 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !2257 + %41 = tail call noundef align 8 ptr @__rust_alloc(i64 noundef %32, i64 noundef 8) #47, !noalias !2257 + %.not121.i.i = icmp eq ptr %41, null + br i1 %.not121.i.i, label %48, label %45 + +42: ; preds = %36 + %43 = tail call noundef align 8 ptr @__rust_realloc(ptr noundef nonnull %6, i64 noundef %37, i64 noundef 8, i64 noundef %32) #47, !noalias !2257 + %.not120.i.i = icmp eq ptr %43, null + br i1 %.not120.i.i, label %48, label %44 + +44: ; preds = %45, %42 + %.069.i.i = phi ptr [ %41, %45 ], [ %43, %42 ] store ptr %.069.i.i, ptr %0, align 8, !alias.scope !2257 store i64 %.sink.i, ptr %7, align 8, !alias.scope !2257 - store i64 %22, ptr %3, align 8, !alias.scope !2257 + store i64 %25, ptr %3, align 8, !alias.scope !2257 br label %_ZN8smallvec10infallible17hc7f743693d04cb96E.exit -41: ; preds = %35 +41: ; preds = %39 %42 = shl nuw nsw i64 %4, 3 - tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %37, ptr nonnull align 8 dereferenceable(24) %0, i64 %42, i1 false) - br label %40 + tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 %41, ptr nonnull align 8 dereferenceable(24) %0, i64 %42, i1 false) + br label %44 -43: ; preds = %27, %32, %12, %15 +43: ; preds = %31, %36, %12, %25 tail call void @_ZN4core9panicking5panic17hbd449742545cb8d5E(ptr noalias noundef nonnull readonly align 1 @anon.68b887a773b1ffe49eb9a07ee8b917ec.146, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.68b887a773b1ffe49eb9a07ee8b917ec.147) #44 unreachable -44: ; preds = %38, %35 - tail call void @_ZN5alloc5alloc18handle_alloc_error17hb78d9ab02c2055b6E(i64 noundef 8, i64 noundef %28) #44 +44: ; preds = %42, %39 + tail call void @_ZN5alloc5alloc18handle_alloc_error17hb78d9ab02c2055b6E(i64 noundef 8, i64 noundef %32) #44 unreachable -_ZN8smallvec10infallible17hc7f743693d04cb96E.exit: ; preds = %40, %26, %10, %2 - %45 = phi i64 [ %8, %2 ], [ %.val.i, %10 ], [ %.val.i, %26 ], [ %.sink.i, %40 ] - %.05 = phi ptr [ %.sink2.i, %2 ], [ %7, %10 ], [ %7, %26 ], [ %7, %40 ] - %.0 = phi ptr [ %.sink3.i, %2 ], [ %6, %10 ], [ %6, %26 ], [ %.069.i.i, %40 ] +_ZN8smallvec10infallible17hc7f743693d04cb96E.exit: ; preds = %44, %10, %29, %2 + %45 = phi i64 [ %8, %2 ], [ %.val.i, %29 ], [ %.val.i, %10 ], [ %.sink.i, %44 ] + %.05 = phi ptr [ %.sink2.i, %2 ], [ %7, %29 ], [ %7, %10 ], [ %7, %44 ] + %.0 = phi ptr [ %.sink3.i, %2 ], [ %6, %29 ], [ %6, %10 ], [ %.069.i.i, %44 ] %46 = getelementptr inbounds ptr, ptr %.0, i64 %45 store ptr %1, ptr %46, align 8 %47 = load i64, ptr %.05, align 8, !noundef !10 diff --git a/bench/sdl/optimized/SDL_yuv.ll b/bench/sdl/optimized/SDL_yuv.ll index 67ca5c87a25..0fe948be278 100644 --- a/bench/sdl/optimized/SDL_yuv.ll +++ b/bench/sdl/optimized/SDL_yuv.ll @@ -86,7 +86,8 @@ define hidden zeroext i1 @SDL_CalculateYUVSize(i32 noundef %0, i32 noundef %1, i %35 = ashr exact i64 %sext110, 32 %sext111 = shl i64 %34, 32 %36 = ashr exact i64 %sext111, 32 - br label %51 + %37 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %35, i64 range(i64 -2147483648, 2147483648) %36) + br label %52 IsPlanar2x2Format.exit: ; preds = %5 %37 = sext i32 %1 to i64 @@ -112,10 +113,10 @@ IsPlanar2x2Format.exit: ; preds = %5 br label %.thread87 51: ; preds = %42, %33 - %.148 = phi i64 [ %35, %33 ], [ 0, %42 ] - %.146 = phi i64 [ %36, %33 ], [ 0, %42 ] - %.043 = phi i64 [ 0, %33 ], [ %48, %42 ] - switch i32 %0, label %109 [ + %.148 = phi { i64, i1 } [ %37, %33 ], [ zeroinitializer, %43 ] + %.146 = phi i64 [ %36, %33 ], [ 0, %43 ] + %.043 = phi i64 [ 0, %33 ], [ %48, %43 ] + switch i32 %0, label %108 [ i32 842094169, label %52 i32 1448433993, label %52 i32 844715353, label %70 @@ -139,8 +140,7 @@ IsPlanar2x2Format.exit: ; preds = %5 br i1 %.not68, label %.thread87, label %56 56: ; preds = %55 - %57 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.148, i64 range(i64 -2147483648, 2147483648) %.146) - %58 = extractvalue { i64, i1 } %57, 1 + %58 = extractvalue { i64, i1 } %.148, 1 br i1 %58, label %59, label %61 59: ; preds = %56 @@ -148,7 +148,7 @@ IsPlanar2x2Format.exit: ; preds = %5 br label %.thread87 61: ; preds = %56 - %62 = extractvalue { i64, i1 } %57, 0 + %62 = extractvalue { i64, i1 } %.148, 0 %63 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %62, i64 range(i64 -2147483648, 2147483648) %.146) %64 = extractvalue { i64, i1 } %63, 1 br i1 %64, label %65, label %67 @@ -226,16 +226,15 @@ IsPlanar2x2Format.exit: ; preds = %5 br i1 %.not62, label %.thread87, label %95 95: ; preds = %94 - %96 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.148, i64 range(i64 -2147483648, 2147483648) %.146) - %97 = extractvalue { i64, i1 } %96, 1 - br i1 %97, label %98, label %100 + %96 = extractvalue { i64, i1 } %.148, 1 + br i1 %96, label %97, label %100 98: ; preds = %95 %99 = tail call zeroext i1 (ptr, ...) @SDL_SetError_REAL(ptr noundef nonnull @.str.3) #7 br label %.thread87 100: ; preds = %95 - %101 = extractvalue { i64, i1 } %96, 0 + %101 = extractvalue { i64, i1 } %.148, 0 %102 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %101, i64 range(i64 -2147483648, 2147483648) %.146) %103 = extractvalue { i64, i1 } %102, 1 br i1 %103, label %104, label %106 @@ -256,7 +255,7 @@ IsPlanar2x2Format.exit: ; preds = %5 br label %.thread87 .thread87: ; preds = %98, %104, %75, %80, %59, %65, %40, %49, %17, %22, %31, %55, %85, %94, %67, %.thread104, %106, %89, %11, %109 - %.150 = phi i1 [ %110, %109 ], [ %90, %89 ], [ %12, %11 ], [ true, %106 ], [ true, %.thread104 ], [ true, %67 ], [ true, %94 ], [ true, %85 ], [ true, %55 ], [ %18, %17 ], [ %23, %22 ], [ %32, %31 ], [ %41, %40 ], [ %50, %49 ], [ %60, %59 ], [ %66, %65 ], [ %76, %75 ], [ %81, %80 ], [ %99, %98 ], [ %105, %104 ] + %.150 = phi i1 [ %110, %108 ], [ %90, %89 ], [ %12, %11 ], [ true, %105 ], [ true, %.thread104 ], [ true, %67 ], [ true, %94 ], [ true, %85 ], [ true, %56 ], [ %18, %17 ], [ %23, %22 ], [ %32, %31 ], [ %41, %41 ], [ %51, %50 ], [ %60, %59 ], [ %66, %65 ], [ %76, %75 ], [ %81, %80 ], [ %99, %97 ], [ %104, %103 ] ret i1 %.150 } diff --git a/bench/tokenizers-rs/optimized/2mot01sr7ebui81b.ll b/bench/tokenizers-rs/optimized/2mot01sr7ebui81b.ll index 3ac3c0e43d6..2cadd460aa8 100644 --- a/bench/tokenizers-rs/optimized/2mot01sr7ebui81b.ll +++ b/bench/tokenizers-rs/optimized/2mot01sr7ebui81b.ll @@ -2137,38 +2137,25 @@ define hidden void @"_ZN121_$LT$hashbrown..map..HashMap$LT$K$C$V$C$S$C$A$GT$$u20 br label %"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit" 30: ; preds = %10 - br i1 %.sroa.059.0.i.i.i, label %31, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" - -31: ; preds = %30 %.sroa.8.0.i.i17.i = select i1 %15, i64 0, i64 %18 %.sroa.7.0.i.i18.i = select i1 %11, i64 0, i64 %14 - %32 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.7.0.i.i18.i, i64 %.sroa.8.0.i.i17.i) - %33 = extractvalue { i64, i1 } %32, 1 - %34 = extractvalue { i64, i1 } %32, 0 - %not..i.i19.i = xor i1 %33, true - br label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" - -"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i": ; preds = %31, %30 - %.sroa.6.025.i = phi i64 [ %34, %31 ], [ undef, %30 ] - %.sink.i.i14.i = phi i1 [ %not..i.i19.i, %31 ], [ false, %30 ] - %35 = add i64 %18, 3 - %36 = lshr i64 %35, 2 - %.sroa.057.0.i.i15.i = select i1 %15, i64 0, i64 %36 - %37 = add i64 %14, 3 - %38 = lshr i64 %37, 2 - %.sroa.0.0.i.i16.i = select i1 %11, i64 0, i64 %38 - %39 = add nuw nsw i64 %.sroa.057.0.i.i15.i, %.sroa.0.0.i.i16.i - %40 = tail call i64 @llvm.uadd.sat.i64(i64 %39, i64 %.sroa.3261.0.copyload63) - br i1 %.sink.i.i14.i, label %41, label %"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit" - -41: ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" - %42 = add i64 %.sroa.6.025.i, %.sroa.3261.0.copyload63 + %30 = add i64 %.sroa.7.0.i.i18.i, %.sroa.8.0.i.i17.i + %31 = add i64 %30, %.sroa.3261.0.copyload63 + %.sroa.6.025.i = select i1 %.sroa.059.0.i.i.i, i64 %31, i64 -1 + %32 = add i64 %18, 3 + %33 = lshr i64 %32, 2 + %.sroa.057.0.i.i15.i = select i1 %15, i64 0, i64 %33 + %34 = add i64 %14, 3 + %35 = lshr i64 %34, 2 + %.sroa.0.0.i.i16.i = select i1 %11, i64 0, i64 %35 + %35 = add nuw nsw i64 %.sroa.057.0.i.i15.i, %.sroa.0.0.i.i16.i + %37 = tail call i64 @llvm.uadd.sat.i64(i64 %35, i64 %.sroa.3261.0.copyload63) br label %"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit" -"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit": ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i", %41, %9, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i" - %.sroa.070.0 = phi i64 [ %29, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i" ], [ %..sroa.3261.0.copyload63, %9 ], [ %40, %41 ], [ %40, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" ] - %.sink26.i.sroa.phi = phi ptr [ %.sroa.7, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i" ], [ %.sroa.11, %9 ], [ %.sroa.11, %41 ], [ %.sroa.11, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" ] - %.sroa.6.0.sink.i = phi i64 [ %.sink.i.i.i, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i" ], [ %..sroa.3261.0.copyload63, %9 ], [ %42, %41 ], [ undef, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" ] +"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit": ; preds = %9, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i", %30 + %.sroa.070.0 = phi i64 [ %29, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i" ], [ %37, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" ], [ %..sroa.3261.0.copyload63, %9 ] + %.sink26.i.sroa.phi = phi ptr [ %.sroa.7, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i" ], [ %.sroa.11, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" ], [ %.sroa.11, %9 ] + %.sroa.6.0.sink.i = phi i64 [ %.sink.i.i.i, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i" ], [ %.sroa.6.025.i, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i" ], [ %..sroa.3261.0.copyload63, %9 ] store i64 %.sroa.6.0.sink.i, ptr %.sink26.i.sroa.phi, align 8, !alias.scope !598, !noalias !601 call void @llvm.lifetime.end.p0(ptr nonnull %.sroa.7) call void @llvm.lifetime.end.p0(ptr nonnull %.sroa.11) @@ -2210,7 +2197,7 @@ define hidden void @"_ZN121_$LT$hashbrown..map..HashMap$LT$K$C$V$C$S$C$A$GT$$u20 br label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" "_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25": ; preds = %57, %56 - %.sink.i.i.i26 = phi i64 [ %.sroa.028.0.i.i.i32, %57 ], [ 0, %56 ] + %.sink.i.i.i26 = phi i64 [ %.sroa.028.0.i.i.i32, %52 ], [ 0, %51 ] %60 = add i64 %53, 3 %61 = lshr i64 %60, 2 %.sroa.057.0.i.i.i27 = select i1 %50, i64 0, i64 %61 @@ -2221,38 +2208,25 @@ define hidden void @"_ZN121_$LT$hashbrown..map..HashMap$LT$K$C$V$C$S$C$A$GT$$u20 br label %"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit33" 65: ; preds = %45 - br i1 %.sroa.059.0.i.i.i24, label %66, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" - -66: ; preds = %65 - %.sroa.8.0.i.i17.i18 = select i1 %50, i64 0, i64 %53 - %.sroa.7.0.i.i18.i19 = select i1 %46, i64 0, i64 %49 - %67 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.7.0.i.i18.i19, i64 %.sroa.8.0.i.i17.i18) - %68 = extractvalue { i64, i1 } %67, 1 - %69 = extractvalue { i64, i1 } %67, 0 - %not..i.i19.i20 = xor i1 %68, true - br label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" - -"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9": ; preds = %66, %65 - %.sroa.6.025.i10 = phi i64 [ %69, %66 ], [ undef, %65 ] - %.sink.i.i14.i11 = phi i1 [ %not..i.i19.i20, %66 ], [ false, %65 ] - %70 = add i64 %53, 3 - %71 = lshr i64 %70, 2 - %.sroa.057.0.i.i15.i12 = select i1 %50, i64 0, i64 %71 - %72 = add i64 %49, 3 - %73 = lshr i64 %72, 2 - %.sroa.0.0.i.i16.i13 = select i1 %46, i64 0, i64 %73 - %74 = add nuw nsw i64 %.sroa.057.0.i.i15.i12, %.sroa.0.0.i.i16.i13 - %75 = tail call i64 @llvm.uadd.sat.i64(i64 %74, i64 %.sroa.3261.0.copyload63) - br i1 %.sink.i.i14.i11, label %76, label %"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit33" - -76: ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" - %77 = add i64 %.sroa.6.025.i10, %.sroa.3261.0.copyload63 + %.sroa.8.0.i.i17.i18 = select i1 %45, i64 0, i64 %48 + %.sroa.7.0.i.i18.i19 = select i1 %41, i64 0, i64 %44 + %60 = add i64 %.sroa.7.0.i.i18.i19, %.sroa.8.0.i.i17.i18 + %61 = add i64 %60, %.sroa.3261.0.copyload63 + %.sroa.7.0.i.i18.i19 = select i1 %.sroa.059.0.i.i.i24, i64 %61, i64 -1 + %62 = add i64 %48, 3 + %63 = lshr i64 %62, 2 + %.sroa.057.0.i.i15.i12 = select i1 %45, i64 0, i64 %63 + %64 = add i64 %44, 3 + %65 = lshr i64 %64, 2 + %.sroa.0.0.i.i16.i13 = select i1 %41, i64 0, i64 %65 + %66 = add nuw nsw i64 %.sroa.057.0.i.i15.i12, %.sroa.0.0.i.i16.i13 + %67 = tail call i64 @llvm.uadd.sat.i64(i64 %66, i64 %.sroa.3261.0.copyload63) br label %"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit33" -"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit33": ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9", %76, %44, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" - %.sroa.074.0 = phi i64 [ %64, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" ], [ %..sroa.3261.0.copyload6382, %44 ], [ %75, %76 ], [ %75, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" ] - %.sink26.i3.sroa.phi = phi ptr [ %.sroa.775, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" ], [ %.sroa.1176, %44 ], [ %.sroa.1176, %76 ], [ %.sroa.1176, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" ] - %.sroa.6.0.sink.i4 = phi i64 [ %.sink.i.i.i26, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" ], [ %..sroa.3261.0.copyload6382, %44 ], [ %77, %76 ], [ undef, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" ] +"_ZN106_$LT$core..iter..adapters..chain..Chain$LT$A$C$B$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h4bc9e24396dce6ceE.llvm.15403311311865522351.exit33": ; preds = %44, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25", %65 + %.sroa.074.0 = phi i64 [ %64, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" ], [ %67, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" ], [ %..sroa.3261.0.copyload6382, %39 ] + %.sink26.i3.sroa.phi = phi ptr [ %.sroa.775, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" ], [ %.sroa.1176, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" ], [ %.sroa.1176, %39 ] + %.sroa.6.0.sink.i4 = phi i64 [ %.sink.i.i.i26, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit.i25" ], [ %.sroa.6.025.i10, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h868c90c0abc6cfefE.exit21.i9" ], [ %..sroa.3261.0.copyload6382, %39 ] store i64 %.sroa.6.0.sink.i4, ptr %.sink26.i3.sroa.phi, align 8, !alias.scope !603, !noalias !606 %78 = add i64 %.sroa.074.0, 1 %79 = lshr i64 %78, 1 diff --git a/bench/tokenizers-rs/optimized/3yaq830kuxi6xpg5.ll b/bench/tokenizers-rs/optimized/3yaq830kuxi6xpg5.ll index 58dc2186754..f6885d7eea7 100644 --- a/bench/tokenizers-rs/optimized/3yaq830kuxi6xpg5.ll +++ b/bench/tokenizers-rs/optimized/3yaq830kuxi6xpg5.ll @@ -560,17 +560,24 @@ define hidden noundef i64 @_ZN4core3cmp6min_by17h99b23936298d4d77E.llvm.22567146 ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h234eeaadb5aa8185E.llvm.2256714685376175499"(i64 noundef %0) unnamed_addr #0 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.0 = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not. = xor i1 %7, true + br i1 %2, label %8, label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %8 + +8: ; preds = %1, %3 + %.0 = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %9 = extractvalue { i64, i1 } %.0, 1 + %10 = extractvalue { i64, i1 } %.0, 0 + %.sroa.3.0 = select i1 %9, i64 undef, i64 %10 + %not. = xor i1 %9, true %.sroa.0.0 = zext i1 %not. to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0, 1 ret { i64, i64 } %10 } @@ -615,17 +622,24 @@ define hidden noundef i64 @"_ZN4core3ops8function5impls80_$LT$impl$u20$core..ops ; Function Attrs: inlinehint mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define hidden { i64, i64 } @_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499(i64 noundef %0) unnamed_addr #0 { %2 = icmp ult i64 %0, 2 - %3 = add i64 %0, -1 - %4 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %3, i1 true) - %5 = lshr i64 -1, %4 - %.0.i = select i1 %2, i64 0, i64 %5 - %6 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i, i64 1) - %7 = extractvalue { i64, i1 } %6, 1 - %8 = extractvalue { i64, i1 } %6, 0 - %not..i = xor i1 %7, true + br i1 %2, label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h234eeaadb5aa8185E.llvm.2256714685376175499.exit", label %3 + +3:; preds = %1 + %4 = add i64 %0, -1 + %6 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %4, i1 true) + %6 = lshr i64 -1, %6 + %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %6, i64 1) + br label %"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h234eeaadb5aa8185E.llvm.2256714685376175499.exit" + +"_ZN4core3num23_$LT$impl$u20$usize$GT$25checked_next_power_of_two17h234eeaadb5aa8185E.llvm.2256714685376175499.exit": ; preds = %1, %3 + %.0.i = phi { i64, i1 } [ %7, %3 ], [ { i64 1, i1 false }, %1 ] + %8 = extractvalue { i64, i1 } %.0.i, 1 + %9 = extractvalue { i64, i1 } %.0.i, 0 + %.sroa.3.0.i = select i1 %8, i64 undef, i64 %9 + %not..i = xor i1 %8, true %.sroa.0.0.i = zext i1 %not..i to i64 %9 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0.i, 0 - %10 = insertvalue { i64, i64 } %9, i64 %8, 1 + %10 = insertvalue { i64, i64 } %9, i64 %.sroa.3.0.i, 1 ret { i64, i64 } %10 } @@ -12706,28 +12720,34 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h89 %.sink6.i = select i1 %4, i64 %6, i64 %3 %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink6.i, i64 1) %8 = extractvalue { i64, i1 } %7, 1 - br i1 %8, label %17, label %9 + br i1 %8, label %18, label %9 9: ; preds = %1 %10 = extractvalue { i64, i1 } %7, 0 %11 = icmp ult i64 %10, 2 - %12 = add i64 %10, -1 - %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) - %14 = lshr i64 -1, %13 - %.0.i.i = select i1 %11, i64 0, i64 %14 - %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i, i64 1) - %16 = extractvalue { i64, i1 } %15, 1 - br i1 %16, label %17, label %18 - -17: ; preds = %1, %9 + br i1 %10, label %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit, label %12 + +12:; preds = %9 + %13 = add i64 %9, -1 + %15 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %13, i1 true) + %15 = lshr i64 -1, %14 + %16 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %15, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit + +_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit: ; preds = %9, %12 + %.0.i.i = phi { i64, i1 } [ %16, %12 ], [ { i64 1, i1 false }, %9 ] + %17 = extractvalue { i64, i1 } %.0.i.i, 1 + br i1 %17, label %18, label %19 + +18: ; preds = %1, %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit tail call void @_ZN4core6option13expect_failed17h9d76e63e47b0f089E(ptr noalias noundef nonnull readonly align 1 @anon.561421ce84617cadbc77fc4f9399e594.43.llvm.2256714685376175499, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.561421ce84617cadbc77fc4f9399e594.45.llvm.2256714685376175499) #31 unreachable -18: ; preds = %9 - %19 = extractvalue { i64, i1 } %15, 0 +18: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit + %19 = extractvalue { i64, i1 } %.0.i.i, 0 %20 = tail call { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17h9a837e965ae504d9E.llvm.2256714685376175499"(ptr noalias noundef nonnull align 8 dereferenceable(80) %0, i64 noundef %19) %21 = extractvalue { i64, i64 } %20, 0 - switch i64 %21, label %23 [ + switch i64 %21, label %24 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17h22cac1cb7ad06844E.llvm.2256714685376175499.exit i64 0, label %22 ] @@ -12755,28 +12775,34 @@ define hidden void @"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h91 %.sink6.i = select i1 %4, i64 %6, i64 %3 %7 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink6.i, i64 1) %8 = extractvalue { i64, i1 } %7, 1 - br i1 %8, label %17, label %9 + br i1 %8, label %18, label %9 9: ; preds = %1 %10 = extractvalue { i64, i1 } %7, 0 %11 = icmp ult i64 %10, 2 - %12 = add i64 %10, -1 - %13 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %12, i1 true) - %14 = lshr i64 -1, %13 - %.0.i.i = select i1 %11, i64 0, i64 %14 - %15 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i, i64 1) - %16 = extractvalue { i64, i1 } %15, 1 - br i1 %16, label %17, label %18 - -17: ; preds = %1, %9 + br i1 %10, label %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit, label %12 + +12:; preds = %9 + %13 = add i64 %9, -1 + %15 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %13, i1 true) + %15 = lshr i64 -1, %14 + %16 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %15, i64 1) + br label %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit + +_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit: ; preds = %9, %12 + %.0.i.i = phi { i64, i1 } [ %16, %12 ], [ { i64 1, i1 false }, %9 ] + %17 = extractvalue { i64, i1 } %.0.i.i, 1 + br i1 %17, label %18, label %19 + +18: ; preds = %1, %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit tail call void @_ZN4core6option13expect_failed17h9d76e63e47b0f089E(ptr noalias noundef nonnull readonly align 1 @anon.561421ce84617cadbc77fc4f9399e594.43.llvm.2256714685376175499, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.561421ce84617cadbc77fc4f9399e594.45.llvm.2256714685376175499) #31 unreachable -18: ; preds = %9 - %19 = extractvalue { i64, i1 } %15, 0 +18: ; preds = %_ZN4core3ops8function6FnOnce9call_once17h08b5ed489d9f5f6cE.llvm.2256714685376175499.exit + %19 = extractvalue { i64, i1 } %.0.i.i, 0 %20 = tail call { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17he20b9f1b1f2e2541E.llvm.2256714685376175499"(ptr noalias noundef nonnull align 8 dereferenceable(80) %0, i64 noundef %19) %21 = extractvalue { i64, i64 } %20, 0 - switch i64 %21, label %23 [ + switch i64 %21, label %24 [ i64 -9223372036854775807, label %_ZN8smallvec10infallible17h22cac1cb7ad06844E.llvm.2256714685376175499.exit i64 0, label %22 ] diff --git a/bench/typst-rs/optimized/1ru1rhojhbz2vfey.ll b/bench/typst-rs/optimized/1ru1rhojhbz2vfey.ll index 6772d710bc3..4b9b49d6cf0 100644 --- a/bench/typst-rs/optimized/1ru1rhojhbz2vfey.ll +++ b/bench/typst-rs/optimized/1ru1rhojhbz2vfey.ll @@ -112861,7 +112861,7 @@ define hidden void @_ZN5typst5model12bibliography9Generator5drive17h69fed58b920a .body: ; preds = %235, %72, %.thread396 %.pn159 = phi { ptr, i32 } [ %.pn155.pn.pn309, %.thread396 ], [ %73, %72 ], [ %236, %235 ] invoke void @"_ZN4core3ptr57drop_in_place$LT$typst..model..bibliography..CslStyle$GT$17h00cef6b64bfa0e9cE"(ptr noalias noundef nonnull align 8 dereferenceable(32) %52) #65 - to label %633 unwind label %241 + to label %635 unwind label %241 72: ; preds = %"_ZN4core3ptr167drop_in_place$LT$core..cell..RefCell$LT$typed_arena..ChunkList$LT$alloc..sync..Arc$LT$typst..util..hash..LazyHash$LT$citationberg..IndependentStyle$GT$$GT$$GT$$GT$$GT$17ha1c583d58084f892E.llvm.16845035774076767816.exit.i", %2 %73 = landingpad { ptr, i32 } @@ -113463,8 +113463,8 @@ define hidden void @_ZN5typst5model12bibliography9Generator5drive17h69fed58b920a to label %316 unwind label %.thread337 312: ; preds = %631, %433 - %.0125 = phi i8 [ %.3380, %631 ], [ %.2348, %433 ] - %.pn150.pn = phi { ptr, i32 } [ %.pn150381, %631 ], [ %.pn148349, %433 ] + %.0125 = phi i8 [ %.3380, %633 ], [ %.2348, %433 ] + %.pn150.pn = phi { ptr, i32 } [ %.pn150381, %633 ], [ %.pn148349, %433 ] %313 = trunc nuw i8 %.0125 to i1 br i1 %313, label %632, label %.thread @@ -113531,8 +113531,8 @@ define hidden void @_ZN5typst5model12bibliography9Generator5drive17h69fed58b920a br label %.outer._crit_edge .outer._crit_edge: ; preds = %625, %.outer._crit_edge.loopexit607 - %321 = phi i64 [ %.pre, %.outer._crit_edge.loopexit607 ], [ %629, %625 ] - %.0122.ph.lcssa500 = phi i1 [ %552, %.outer._crit_edge.loopexit607 ], [ %.0122.ph594, %625 ] + %321 = phi i64 [ %.pre, %.outer._crit_edge.loopexit607 ], [ %629, %627 ] + %.0122.ph.lcssa500 = phi i1 [ %552, %.outer._crit_edge.loopexit607 ], [ %.0122.ph594, %627 ] %322 = icmp eq i64 %321, 0 br i1 %322, label %.outer._crit_edge.thread, label %340 @@ -113952,7 +113952,7 @@ define hidden void @_ZN5typst5model12bibliography9Generator5drive17h69fed58b920a br i1 %460, label %.outer437._crit_edge, label %136 461: ; preds = %.lr.ph, %625 - %.sroa.0296.0591 = phi ptr [ %.sroa.0296.0.ph593, %.lr.ph ], [ %462, %625 ] + %.sroa.0296.0591 = phi ptr [ %.sroa.0296.0.ph593, %.lr.ph ], [ %462, %627 ] %462 = getelementptr inbounds nuw i8, ptr %.sroa.0296.0591, i64 24 call void @llvm.lifetime.start.p0(ptr nonnull %46) %463 = load ptr, ptr %.sroa.0296.0591, align 8, !nonnull !5, !noundef !5 @@ -114250,35 +114250,41 @@ switch.lookup: ; preds = %.noexc241, %544 %561 = load i64, ptr %107, align 8, !alias.scope !22802, !noalias !22807 %.sink4.i.i = select i1 %555, i64 %561, i64 %554 %562 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sink4.i.i, i64 1) - %563 = extractvalue { i64, i1 } %562, 1 - br i1 %563, label %.thread.i, label %564 - -564: ; preds = %560 - %565 = extractvalue { i64, i1 } %562, 0 - %566 = icmp ult i64 %565, 2 - %567 = add i64 %565, -1 - %568 = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %567, i1 true) - %569 = lshr i64 -1, %568 - %.0.i.i.i270 = select i1 %566, i64 0, i64 %569 - %570 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i.i270, i64 1) - %571 = extractvalue { i64, i1 } %570, 1 - br i1 %571, label %.thread.i, label %572 - -.thread.i: ; preds = %564, %560 + %563 = extractvalue { i64, i1 } %562, 0 + %564 = extractvalue { i64, i1 } %562, 1 + br i1 %564, label %.thread.i, label %565 + +565:; preds = %560 + %566 = icmp ult i64 %563, 2 + br i1 %566, label %572, label %567 + +567:; preds = %565 + %568 = add i64 %563, -1 + %570 = call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %568, i1 true) + %570 = lshr i64 -1, %569 + %571 = call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %570, i64 1) + br label %572 + +572: ; preds = %567, %565 + %.0.i.i.i270 = phi { i64, i1 } [ %571, %567 ], [ { i64 1, i1 false }, %565 ] + %573 = extractvalue { i64, i1 } %.0.i.i.i270, 1 + br i1 %573, label %.thread.i, label %574 + +.thread.i: ; preds = %572, %560 invoke void @_ZN4core6option13expect_failed17h5c9b166b5a7a71f0E(ptr noalias noundef nonnull readonly align 1 @anon.6e01a69b2c234dfdc5e23dbc943ea0bc.11.llvm.7325118056162354838, i64 noundef 17, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.6e01a69b2c234dfdc5e23dbc943ea0bc.190.llvm.7325118056162354838) #63 to label %.noexc271 unwind label %.loopexit.split-lp412 .noexc271: ; preds = %.thread.i unreachable -572: ; preds = %564 - %573 = extractvalue { i64, i1 } %570, 0 +572: ; preds = %572 + %573 = extractvalue { i64, i1 } %.0.i.i.i270, 0 %574 = invoke { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hf38623af02b96ab9E.llvm.7325118056162354838"(ptr noalias noundef nonnull align 8 dereferenceable(40) %49, i64 noundef %573) to label %.noexc272 unwind label %.loopexit411 .noexc272: ; preds = %572 %575 = extractvalue { i64, i64 } %574, 0 - switch i64 %575, label %577 [ + switch i64 %575, label %579 [ i64 -9223372036854775807, label %"_ZN8smallvec17SmallVec$LT$A$GT$21reserve_one_unchecked17h615512598ff91d32E.exit" i64 0, label %576 ] @@ -114353,7 +114359,7 @@ switch.lookup: ; preds = %.noexc241, %544 unreachable .outer: ; preds = %._crit_edge.i248, %582 - %595 = phi i64 [ %.pre.i249, %._crit_edge.i248 ], [ %587, %582 ] + %595 = phi i64 [ %.pre.i249, %._crit_edge.i248 ], [ %587, %584 ] %596 = load ptr, ptr %82, align 8, !alias.scope !22809, !noalias !22812, !nonnull !5, !noundef !5 %597 = getelementptr inbounds { { i64, [2 x i64] }, { [16 x i8], i8, [7 x i8] }, ptr, i64, i8, i8, [6 x i8] }, ptr %596, i64 %595 call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(72) %597, ptr noundef nonnull align 8 dereferenceable(72) %37, i64 72, i1 false) @@ -114383,7 +114389,7 @@ switch.lookup: ; preds = %.noexc241, %544 call void @llvm.lifetime.start.p0(ptr nonnull %42) call void @llvm.lifetime.start.p0(ptr nonnull %41) %604 = invoke { ptr, i64 } @_ZN5typst4util4pico7PicoStr7resolve17h35375a5f4afb5d8eE(ptr noalias noundef nonnull readonly align 4 dereferenceable(4) %46) - to label %609 unwind label %.loopexit406 + to label %611 unwind label %.loopexit406 .loopexit406: ; preds = %609, %.noexc219.thread %lpad.loopexit408 = landingpad { ptr, i32 } @@ -114418,7 +114424,7 @@ switch.lookup: ; preds = %.noexc241, %544 store ptr %42, ptr %92, align 8, !alias.scope !22824, !noalias !22827 store i64 1, ptr %93, align 8, !alias.scope !22824, !noalias !22827 %612 = invoke noundef zeroext i1 @_ZN4core3fmt5write17h4311bce0ee536615E(ptr noundef nonnull align 1 %44, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.984efe779a4077b66be6415f964eeb42.484, ptr noalias noundef nonnull align 8 captures(none) dereferenceable(48) %43) - to label %613 unwind label %.loopexit406 + to label %615 unwind label %.loopexit406 613: ; preds = %609 call void @llvm.lifetime.end.p0(ptr nonnull %43) @@ -114460,11 +114466,11 @@ switch.lookup: ; preds = %.noexc241, %544 to label %.thread350 unwind label %623 "_ZN4ecow3vec15EcoVec$LT$T$GT$8capacity17hae8806e1eb2fc28eE.exit.i": ; preds = %617, %615 - %.0.i.i.i256 = phi i64 [ %.val.i.i.i, %617 ], [ 0, %615 ] + %.0.i.i.i256 = phi i64 [ %.val.i.i.i, %619 ], [ 0, %617 ] %621 = icmp eq i64 %616, %.0.i.i.i256 %622 = zext i1 %621 to i64 invoke void @"_ZN4ecow3vec15EcoVec$LT$T$GT$7reserve17hc0600674aa22a8f0E"(ptr noalias noundef nonnull align 8 dereferenceable(16) %47, i64 noundef %622) - to label %625 unwind label %619, !noalias !22838 + to label %627 unwind label %619, !noalias !22838 623: ; preds = %619 %624 = landingpad { ptr, i32 } @@ -114485,9 +114491,9 @@ switch.lookup: ; preds = %.noexc241, %544 br i1 %630, label %.outer._crit_edge, label %461 .thread350: ; preds = %591, %559, %605, %608, %428, %.body191, %374, %600, %438, %619, %392, %.thread361 - %.pn148349 = phi { ptr, i32 } [ %lpad.phi405, %.thread361 ], [ %393, %392 ], [ %620, %619 ], [ %601, %600 ], [ %.pn.ph, %438 ], [ %eh.lpad-body192, %374 ], [ %eh.lpad-body192, %.body191 ], [ %425, %428 ], [ %lpad.phi410, %608 ], [ %lpad.phi410, %605 ], [ %lpad.phi415, %559 ], [ %592, %591 ] - %.2348 = phi i8 [ %.0127.ph, %.thread361 ], [ 0, %392 ], [ 1, %619 ], [ 1, %600 ], [ 0, %438 ], [ 1, %374 ], [ 1, %.body191 ], [ 0, %428 ], [ 1, %608 ], [ 1, %605 ], [ 1, %559 ], [ 1, %591 ] - %.1128347 = phi i1 [ %315, %.thread361 ], [ true, %392 ], [ true, %619 ], [ true, %600 ], [ false, %438 ], [ true, %374 ], [ true, %.body191 ], [ false, %428 ], [ true, %608 ], [ true, %605 ], [ true, %559 ], [ true, %591 ] + %.pn148349 = phi { ptr, i32 } [ %lpad.phi405, %.thread361 ], [ %393, %392 ], [ %620, %621 ], [ %603, %602 ], [ %.pn.ph, %438 ], [ %eh.lpad-body192, %374 ], [ %eh.lpad-body192, %.body191 ], [ %425, %428 ], [ %lpad.phi410, %610 ], [ %lpad.phi410, %607 ], [ %lpad.phi415, %559 ], [ %594, %593 ] + %.2348 = phi i8 [ %.0127.ph, %.thread361 ], [ 0, %392 ], [ 1, %621 ], [ 1, %602 ], [ 0, %438 ], [ 1, %374 ], [ 1, %.body191 ], [ 0, %428 ], [ 1, %610 ], [ 1, %607 ], [ 1, %559 ], [ 1, %593 ] + %.1128347 = phi i1 [ %315, %.thread361 ], [ true, %392 ], [ true, %621 ], [ true, %602 ], [ false, %438 ], [ true, %374 ], [ true, %.body191 ], [ false, %428 ], [ true, %610 ], [ true, %607 ], [ true, %559 ], [ true, %593 ] invoke void @"_ZN68_$LT$ecow..vec..EcoVec$LT$T$GT$$u20$as$u20$core..ops..drop..Drop$GT$4drop17he69e9c12ebe6abadE.llvm.16845035774076767816"(ptr noalias noundef nonnull align 8 dereferenceable(16) %47) to label %433 unwind label %241 @@ -114508,7 +114514,7 @@ switch.lookup: ; preds = %.noexc241, %544 to label %.body unwind label %241 .thread: ; preds = %.loopexit419, %.loopexit.split-lp420, %.thread399, %268, %632, %302, %312 - %.pn155.pn.pn310 = phi { ptr, i32 } [ %.pn150.pn, %312 ], [ %lpad.phi428, %302 ], [ %.pn150.pn340, %632 ], [ %.pn155.pn.ph, %268 ], [ %434, %.thread399 ], [ %lpad.loopexit421, %.loopexit419 ], [ %lpad.loopexit.split-lp422, %.loopexit.split-lp420 ] + %.pn155.pn.pn310 = phi { ptr, i32 } [ %.pn150.pn, %312 ], [ %lpad.phi428, %302 ], [ %.pn150.pn340, %634 ], [ %.pn155.pn.ph, %268 ], [ %434, %.thread399 ], [ %lpad.loopexit421, %.loopexit419 ], [ %lpad.loopexit.split-lp422, %.loopexit.split-lp420 ] invoke void @"_ZN4core3ptr79drop_in_place$LT$hayagriva..csl..BibliographyDriver$LT$hayagriva..Entry$GT$$GT$17h34e36238714b75c1E"(ptr noalias noundef nonnull align 8 dereferenceable(24) %50) #65 to label %.thread396 unwind label %241 diff --git a/bench/typst-rs/optimized/3kgmqnxcsl3z3n0n.ll b/bench/typst-rs/optimized/3kgmqnxcsl3z3n0n.ll index 7edc04de5ac..228a0bf868d 100644 --- a/bench/typst-rs/optimized/3kgmqnxcsl3z3n0n.ll +++ b/bench/typst-rs/optimized/3kgmqnxcsl3z3n0n.ll @@ -19538,33 +19538,36 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. %26 = getelementptr inbounds nuw i8, ptr %1, i64 152 %.val70.i.i = load i64, ptr %26, align 8, !alias.scope !5603, !noalias !5604, !noundef !4 %spec.select.i.i.i.i = tail call i64 @llvm.usub.sat.i64(i64 %.val70.i.i, i64 %.val.i.i) + %27 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %spec.select.i.i.i.i, i64 2) br label %.thread.i.i .thread.i.i: ; preds = %24, %2 - %.sroa.884.090.i.i = phi i64 [ 0, %2 ], [ %spec.select.i.i.i.i, %24 ] + %.sroa.884.090.i.i = phi { i64, i1 } [ zeroinitializer, %2 ], [ %27, %24 ] %27 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.sroa.7.0.i.i, i64 %.sroa.8.0.i.i) %28 = extractvalue { i64, i1 } %27, 1 - %29 = icmp slt i64 %.sroa.884.090.i.i, 0 - %or.cond.not.i.i = or i1 %28, %29 - br i1 %or.cond.not.i.i, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread", label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit" - -"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit": ; preds = %.thread.i.i - %30 = extractvalue { i64, i1 } %27, 0 - %31 = shl nuw i64 %.sroa.884.090.i.i, 1 - %32 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %30, i64 %31) - %33 = extractvalue { i64, i1 } %32, 1 - br i1 %33, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread", label %.thread.i.i.i.i - -.thread.i.i.i.i: ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit" - %34 = extractvalue { i64, i1 } %32, 0 - %35 = tail call { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5d6a04aba4a11c15E"(i64 noundef %34, i1 noundef zeroext false) - %36 = extractvalue { i64, ptr } %35, 0 - %37 = extractvalue { i64, ptr } %35, 1 - store i64 %36, ptr %11, align 8 - %38 = getelementptr inbounds nuw i8, ptr %11, i64 8 - store ptr %37, ptr %38, align 8 - %39 = getelementptr inbounds nuw i8, ptr %11, i64 16 - store i64 0, ptr %39, align 8 + %30 = extractvalue { i64, i1 } %28, 0 + br i1 %28, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread", label %31 + +31: ; preds = %.thread.i.i + %32 = extractvalue { i64, i1 } %.sroa.881.087.i.i, 1 + br i1 %32, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread", label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit" + +"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit":; preds = %31 + %33 = extractvalue { i64, i1 } %.sroa.881.087.i.i, 0 + %34 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %30, i64 %33) + %35 = extractvalue { i64, i1 } %34, 1 + br i1 %35, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread", label %36 + +36:; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit" + %36 = extractvalue { i64, i1 } %34, 0 + %38 = tail call { i64, ptr } @"_ZN5alloc7raw_vec19RawVec$LT$T$C$A$GT$11allocate_in17h5d6a04aba4a11c15E"(i64 noundef %37, i1 noundef zeroext false) + %39 = extractvalue { i64, ptr } %38, 0 + %40 = extractvalue { i64, ptr } %38, 1 + store i64 %39, ptr %11, align 8 + %39 = getelementptr inbounds nuw i8, ptr %11, i64 8 + store ptr %40, ptr %39, align 8 + %42 = getelementptr inbounds nuw i8, ptr %11, i64 16 + store i64 0, ptr %42, align 8 %.sroa.7.0..sroa_idx = getelementptr inbounds nuw i8, ptr %1, i64 24 %.sroa.11.0..sroa_idx = getelementptr inbounds nuw i8, ptr %1, i64 88 %.sroa.12.0..sroa_idx = getelementptr inbounds nuw i8, ptr %1, i64 136 @@ -19575,12 +19578,9 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. %.sroa.15.0.copyload = load i64, ptr %.sroa.15.0..sroa_idx, align 8 tail call void @llvm.experimental.noalias.scope.decl(metadata !5605) tail call void @llvm.experimental.noalias.scope.decl(metadata !5608) - %spec.select.i.i.i.i.i.i = tail call i64 @llvm.usub.sat.i64(i64 %.sroa.15.0.copyload, i64 %.sroa.13.0.copyload) - %.sroa.884.090.i.i.i.i = select i1 %23, i64 0, i64 %spec.select.i.i.i.i.i.i - %40 = icmp slt i64 %.sroa.884.090.i.i.i.i, 0 - br i1 %40, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread.i.i", label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.i.i" + br i1 %23, label %.thread.i.i.i.i, label %47 -"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread": ; preds = %.thread.i.i, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit" +"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread": ; preds = %31, %.thread.i.i, %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit" call void @llvm.lifetime.start.p0(ptr nonnull %10) store ptr @anon.ecbbdf4ce99fb387dde54de6349d4c38.7, ptr %10, align 8 %41 = getelementptr inbounds nuw i8, ptr %10, i64 8 @@ -19594,8 +19594,18 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. call void @_ZN4core9panicking9panic_fmt17hc69c4d258fe11477E(ptr noalias noundef nonnull align 8 captures(none) dereferenceable(48) %10, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.ecbbdf4ce99fb387dde54de6349d4c38.10) #51 unreachable -.body.i.i: ; preds = %.noexc.i.i.i.i.i, %70 - %45 = landingpad { ptr, i32 } +.body.i.i: ; preds = %36 + %spec.select.i.i.i.i.i.i = tail call i64 @llvm.usub.sat.i64(i64 %.sroa.15.0.copyload, i64 %.sroa.13.0.copyload) + %48 = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %spec.select.i.i.i.i.i.i, i64 2) + br label %.thread.i.i.i.i + +.thread.i.i.i.i: ; preds = %36, %47 + %.sroa.881.087.i.i.i.i = phi { i64, i1 } [ zeroinitializer, %36 ], [ %48, %47 ] + %49 = extractvalue { i64, i1 } %.sroa.881.087.i.i.i.i, 1 + br i1 %49, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread.i.i", label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.i.i" + +.body.i.i: ; preds = %.noexc.i.i.i.i.i, %75 + %50 = landingpad { ptr, i32 } cleanup %.val22.i.i.i.i.i = load ptr, ptr %8, align 8, !alias.scope !5611, !noalias !5614, !nonnull !4, !align !12, !noundef !4 %.val23.i.i.i.i.i = load i64, ptr %.sroa.48.0..sroa_idx.i.i, align 8, !alias.scope !5611, !noalias !5614, !noundef !4 @@ -19603,14 +19613,14 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. br label %.body "_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.i.i": ; preds = %.thread.i.i.i.i - %46 = shl nuw i64 %.sroa.884.090.i.i.i.i, 1 - %47 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %30, i64 %46) + %51 = extractvalue { i64, i1 } %.sroa.881.087.i.i.i.i, 0 + %47 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %30, i64 %51) %48 = extractvalue { i64, i1 } %47, 1 %49 = extractvalue { i64, i1 } %47, 0 br i1 %48, label %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread.i.i", label %50 50: ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.i.i" - %51 = icmp ugt i64 %49, %36 + %51 = icmp ugt i64 %49, %39 br i1 %51, label %52, label %"_ZN5alloc3vec16Vec$LT$T$C$A$GT$7reserve17haf93ab48e141a17fE.exit.i.i" 52: ; preds = %50 @@ -19618,8 +19628,8 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. to label %.noexc unwind label %84 .noexc: ; preds = %52 - %.pre.i.i = load i64, ptr %39, align 8, !alias.scope !5625, !noalias !5626 - %.pre = load ptr, ptr %38, align 8, !alias.scope !5625, !noalias !5626 + %.pre.i.i = load i64, ptr %42, align 8, !alias.scope !5625, !noalias !5626 + %.pre = load ptr, ptr %39, align 8, !alias.scope !5625, !noalias !5626 br label %"_ZN5alloc3vec16Vec$LT$T$C$A$GT$7reserve17haf93ab48e141a17fE.exit.i.i" "_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.thread.i.i": ; preds = %"_ZN114_$LT$core..iter..adapters..flatten..FlatMap$LT$I$C$U$C$F$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$9size_hint17h5df958776eb11c34E.exit.i.i", %.thread.i.i.i.i @@ -19640,10 +19650,10 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. unreachable "_ZN5alloc3vec16Vec$LT$T$C$A$GT$7reserve17haf93ab48e141a17fE.exit.i.i": ; preds = %.noexc, %50 - %57 = phi ptr [ %.pre, %.noexc ], [ %37, %50 ] - %58 = phi i64 [ %.pre.i.i, %.noexc ], [ 0, %50 ] + %57 = phi ptr [ %.pre, %.noexc ], [ %40, %55 ] + %58 = phi i64 [ %.pre.i.i, %.noexc ], [ 0, %55 ] call void @llvm.lifetime.start.p0(ptr nonnull %8), !noalias !5628 - store ptr %39, ptr %8, align 8, !noalias !5629 + store ptr %42, ptr %8, align 8, !noalias !5629 %.sroa.48.0..sroa_idx.i.i = getelementptr inbounds nuw i8, ptr %8, i64 8 store i64 %58, ptr %.sroa.48.0..sroa_idx.i.i, align 8, !noalias !5629 %.sroa.59.0..sroa_idx.i.i = getelementptr inbounds nuw i8, ptr %8, i64 16 @@ -19767,7 +19777,7 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. br label %.body .body: ; preds = %.body.i.i, %84 - %eh.lpad-body = phi { ptr, i32 } [ %85, %84 ], [ %45, %.body.i.i ] + %eh.lpad-body = phi { ptr, i32 } [ %85, %89 ], [ %50, %.body.i.i ] call void @llvm.experimental.noalias.scope.decl(metadata !5698) call void @llvm.experimental.noalias.scope.decl(metadata !5701) call void @llvm.experimental.noalias.scope.decl(metadata !5704) @@ -19777,7 +19787,7 @@ define hidden void @"_ZN111_$LT$alloc..vec..Vec$LT$T$GT$$u20$as$u20$alloc..vec.. 88: ; preds = %.body %89 = mul nuw i64 %86, 20 - %90 = load ptr, ptr %38, align 8, !alias.scope !5707, !noalias !5710, !nonnull !4, !noundef !4 + %90 = load ptr, ptr %39, align 8, !alias.scope !5707, !noalias !5710, !nonnull !4, !noundef !4 call void @__rust_dealloc(ptr noundef nonnull %90, i64 noundef %89, i64 noundef 4) #52, !noalias !5712 br label %92 diff --git a/bench/typst-rs/optimized/59tuvc5m3xlovl3o.ll b/bench/typst-rs/optimized/59tuvc5m3xlovl3o.ll index d92460c662a..efc7a9e42a1 100644 --- a/bench/typst-rs/optimized/59tuvc5m3xlovl3o.ll +++ b/bench/typst-rs/optimized/59tuvc5m3xlovl3o.ll @@ -3543,17 +3543,17 @@ _ZN10ttf_parser9Transform10is_default17h310561374b706d35E.exit: ; preds = %193 br label %833 335: ; preds = %.lr.ph228, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit - %.sroa.13.0 = phi i64 [ 0, %.lr.ph228 ], [ %.sroa.13.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %.sroa.17.0 = phi i8 [ 0, %.lr.ph228 ], [ %.sroa.17.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %.sroa.21.0 = phi i8 [ 0, %.lr.ph228 ], [ %.sroa.21.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %.sroa.28.0 = phi i64 [ 0, %.lr.ph228 ], [ %.sroa.28.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %336 = phi i16 [ 0, %.lr.ph228 ], [ %429, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %337 = phi i64 [ 0, %.lr.ph228 ], [ %427, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %338 = phi i64 [ 0, %.lr.ph228 ], [ %428, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %339 = phi i16 [ 0, %.lr.ph228 ], [ %407, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %340 = phi i16 [ %.sroa.16.0, %.lr.ph228 ], [ %373, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %341 = phi i16 [ %.sroa.18.0, %.lr.ph228 ], [ %374, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] - %342 = phi i16 [ %.sroa.39112.0, %.lr.ph228 ], [ %343, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %.sroa.13.0 = phi i64 [ 0, %.lr.ph227 ], [ %.sroa.13.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %.sroa.17.0 = phi i8 [ 0, %.lr.ph227 ], [ %.sroa.17.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %.sroa.21.0 = phi i8 [ 0, %.lr.ph227 ], [ %.sroa.21.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %.sroa.28.0 = phi i64 [ 0, %.lr.ph227 ], [ %.sroa.28.2, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %336 = phi i16 [ 0, %.lr.ph227 ], [ %429, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %337 = phi i64 [ 0, %.lr.ph227 ], [ %427, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %338 = phi i64 [ 0, %.lr.ph227 ], [ %428, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %339 = phi i16 [ 0, %.lr.ph227 ], [ %407, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %340 = phi i16 [ %.sroa.16.0, %.lr.ph227 ], [ %373, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %341 = phi i16 [ %.sroa.18.0, %.lr.ph227 ], [ %374, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] + %342 = phi i16 [ %.sroa.39112.0, %.lr.ph227 ], [ %343, %_ZN10ttf_parser6tables4glyf7Builder10push_point17h0443de101b9e669cE.exit ] %343 = add i16 %342, -1 %344 = icmp eq i16 %341, 0 br i1 %344, label %345, label %352 @@ -3688,11 +3688,11 @@ _ZN10ttf_parser6tables4glyf13EndpointsIter4next17h343f1c5693c9cc59E.exit.i: ; pr br label %_ZN10ttf_parser6tables4glyf10CoordsIter4next17h20496966498cbd79E.exit.i _ZN10ttf_parser6tables4glyf10CoordsIter4next17h20496966498cbd79E.exit.i: ; preds = %.thread25.i.i, %397, %.thread.i95, %392 - %.sroa.13.2 = phi i64 [ %.sroa.13.3, %.thread.i95 ], [ %.sroa.13.3, %397 ], [ %.sroa.13.1, %392 ], [ %.sroa.13.1, %.thread25.i.i ] - %.sroa.17.2 = phi i8 [ %.sroa.17.3, %.thread.i95 ], [ %.sroa.17.3, %397 ], [ %.sroa.17.1, %392 ], [ %.sroa.17.1, %.thread25.i.i ] - %.sroa.21.2 = phi i8 [ %.sroa.21.3, %.thread.i95 ], [ %.sroa.21.3, %397 ], [ %.sroa.21.1, %392 ], [ %.sroa.21.1, %.thread25.i.i ] - %.sroa.28.2 = phi i64 [ %.sroa.28.0, %.thread.i95 ], [ %394, %397 ], [ %.sroa.28.0, %392 ], [ %.sroa.28.1, %.thread25.i.i ] - %.0.i.i = phi i16 [ 0, %.thread.i95 ], [ %399, %397 ], [ 0, %392 ], [ %spec.select.i.i93, %.thread25.i.i ] + %.sroa.13.2 = phi i64 [ %.sroa.13.3, %.thread.i ], [ %.sroa.13.3, %397 ], [ %.sroa.13.1, %392 ], [ %.sroa.13.1, %.thread25.i.i ] + %.sroa.17.2 = phi i8 [ %.sroa.17.3, %.thread.i ], [ %.sroa.17.3, %397 ], [ %.sroa.17.1, %392 ], [ %.sroa.17.1, %.thread25.i.i ] + %.sroa.21.2 = phi i8 [ %.sroa.21.3, %.thread.i ], [ %.sroa.21.3, %397 ], [ %.sroa.21.1, %392 ], [ %.sroa.21.1, %.thread25.i.i ] + %.sroa.28.2 = phi i64 [ %.sroa.28.0, %.thread.i ], [ %394, %397 ], [ %.sroa.28.0, %392 ], [ %.sroa.28.1, %.thread25.i.i ] + %.0.i.i = phi i16 [ 0, %.thread.i ], [ %399, %397 ], [ 0, %392 ], [ %spec.select.i.i93, %.thread25.i.i ] %407 = add i16 %339, %.0.i.i %408 = and i8 %.sroa.21.2, 4 %.not17.i = icmp eq i8 %408, 0 @@ -19522,13 +19522,13 @@ define hidden void @"_ZN79_$LT$zerovec..ule..plain..RawBytesULE$LT$_$GT$$u20$as$ ; Function Attrs: nonlazybind uwtable define hidden { i32, i32 } @_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996(ptr noalias noundef nonnull readonly align 8 captures(address) %0, i64 noundef %1) unnamed_addr #7 personality ptr @rust_eh_personality { %3 = alloca [1 x { ptr, i64 }], align 8 - %4 = icmp ult i64 %1, 4294967296 - br i1 %4, label %5, label %.loopexit + %4 = icmp ugt i64 %1, 4294967295 + br i1 %4, label %.loopexit, label %5 5: ; preds = %2 %6 = trunc nuw i64 %1 to i32 - %7 = icmp sgt i32 %6, -1 - br i1 %7, label %8, label %.loopexit + %7 = icmp slt i32 %6, 0 + br i1 %7, label %.loopexit, label %8 8: ; preds = %5 %9 = shl nuw i32 %6, 1 @@ -19543,13 +19543,14 @@ define hidden { i32, i32 } @_ZN7zerovec10varzerovec10components24compute_seriali %16 = getelementptr inbounds nuw i8, ptr %3, i64 16 br label %17 -17: ; preds = %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i", %13 - %18 = phi ptr [ %0, %13 ], [ %24, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i" ] - %.0.i = phi i32 [ 0, %13 ], [ %28, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i" ] +17: ; preds = %20, %13 + %18 = phi ptr [ %0, %13 ], [ %21, %20 ] + %.0.i = phi i32 [ 0, %13 ], [ %.2.i.i, %20 ] %19 = icmp eq ptr %18, %14 br i1 %19, label %29, label %20 20: ; preds = %17 + %21 = getelementptr inbounds nuw i8, ptr %18, i64 16 %.val.i = load ptr, ptr %18, align 8, !alias.scope !3907, !noalias !3912, !nonnull !4, !align !159, !noundef !4 %21 = getelementptr i8, ptr %18, i64 8 %.val8.i = load i64, ptr %21, align 8, !alias.scope !3907, !noalias !3912, !noundef !4 @@ -19558,16 +19559,14 @@ define hidden { i32, i32 } @_ZN7zerovec10varzerovec10components24compute_seriali store i64 %.val8.i, ptr %15, align 8, !noalias !3915 %22 = call noundef i64 @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4fold17h4e126311d4415e4eE.llvm.12777920187102919001"(ptr noundef nonnull readonly align 8 %3, ptr noundef nonnull readonly %16, i64 noundef 0), !noalias !3915 call void @llvm.lifetime.end.p0(ptr nonnull %3), !noalias !3915 - %23 = icmp ult i64 %22, 4294967296 - br i1 %23, label %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i", label %.loopexit - -"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i": ; preds = %20 - %24 = getelementptr inbounds nuw i8, ptr %18, i64 16 + %23 = icmp ugt i64 %22, 4294967295 %25 = trunc nuw i64 %22 to i32 %26 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %.0.i, i32 %25) %27 = extractvalue { i32, i1 } %26, 1 %28 = extractvalue { i32, i1 } %26, 0 - br i1 %27, label %.loopexit, label %17 + %narrow.i.i.not.i = select i1 %24, i1 true, i1 %27 + %.2.i.i = select i1 %24, i32 undef, i32 %28 + br i1 %narrow.i.i.not.i, label %.loopexit, label %17 29: ; preds = %17 %30 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %12, i32 %.0.i) @@ -19579,9 +19578,9 @@ define hidden { i32, i32 } @_ZN7zerovec10varzerovec10components24compute_seriali %spec.select34 = zext i1 %narrow to i32 br label %.loopexit -.loopexit: ; preds = %20, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i", %29, %2, %5, %8 - %.sroa.10.3 = phi i32 [ undef, %8 ], [ undef, %5 ], [ undef, %2 ], [ %32, %29 ], [ undef, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i" ], [ undef, %20 ] - %.sroa.0.3 = phi i32 [ 0, %8 ], [ 0, %5 ], [ 0, %2 ], [ %spec.select34, %29 ], [ 0, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i" ], [ 0, %20 ] +.loopexit: ; preds = %20, %5, %2, %29, %8 + %.sroa.10.3 = phi i32 [ undef, %8 ], [ %32, %29 ], [ undef, %2 ], [ undef, %5 ], [ undef, %20 ] + %.sroa.0.3 = phi i32 [ 0, %8 ], [ %spec.select34, %29 ], [ 0, %2 ], [ 0, %5 ], [ 0, %20 ] %34 = insertvalue { i32, i32 } poison, i32 %.sroa.0.3, 0 %35 = insertvalue { i32, i32 } %34, i32 %.sroa.10.3, 1 ret { i32, i32 } %35 @@ -19714,13 +19713,13 @@ define hidden void @_ZN7zerovec10varzerovec10components32get_serializable_bytes_ %4 = alloca [1 x { ptr, i64 }], align 8 %5 = alloca { { i64, ptr, {} }, i64 }, align 8 tail call void @llvm.experimental.noalias.scope.decl(metadata !3956) - %6 = icmp ult i64 %2, 4294967296 - br i1 %6, label %7, label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread + %6 = icmp ugt i64 %2, 4294967295 + br i1 %6, label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread, label %7 7: ; preds = %3 %8 = trunc nuw i64 %2 to i32 - %9 = icmp sgt i32 %8, -1 - br i1 %9, label %10, label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread + %9 = icmp slt i32 %8, 0 + br i1 %9, label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread, label %10 10: ; preds = %7 %11 = shl nuw i32 %8, 1 @@ -19735,13 +19734,14 @@ define hidden void @_ZN7zerovec10varzerovec10components32get_serializable_bytes_ %18 = getelementptr inbounds nuw i8, ptr %4, i64 16 br label %19 -19: ; preds = %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i.i", %15 - %20 = phi ptr [ %1, %15 ], [ %26, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i.i" ] - %.0.i.i = phi i32 [ 0, %15 ], [ %30, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i.i" ] +19: ; preds = %22, %15 + %20 = phi ptr [ %1, %15 ], [ %23, %22 ] + %.0.i.i = phi i32 [ 0, %15 ], [ %.2.i.i.i, %22 ] %21 = icmp eq ptr %20, %16 br i1 %21, label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit, label %22 22: ; preds = %19 + %23 = getelementptr inbounds nuw i8, ptr %20, i64 16 %.val.i.i = load ptr, ptr %20, align 8, !alias.scope !3959, !noalias !3964, !nonnull !4, !align !159, !noundef !4 %23 = getelementptr i8, ptr %20, i64 8 %.val8.i.i = load i64, ptr %23, align 8, !alias.scope !3959, !noalias !3964, !noundef !4 @@ -19750,16 +19750,14 @@ define hidden void @_ZN7zerovec10varzerovec10components32get_serializable_bytes_ store i64 %.val8.i.i, ptr %17, align 8, !noalias !3967 %24 = call noundef i64 @"_ZN91_$LT$core..slice..iter..Iter$LT$T$GT$$u20$as$u20$core..iter..traits..iterator..Iterator$GT$4fold17h4e126311d4415e4eE.llvm.12777920187102919001"(ptr noundef nonnull readonly align 8 %4, ptr noundef nonnull readonly %18, i64 noundef 0), !noalias !3967 call void @llvm.lifetime.end.p0(ptr nonnull %4), !noalias !3967 - %25 = icmp ult i64 %24, 4294967296 - br i1 %25, label %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i.i", label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread - -"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i.i": ; preds = %22 - %26 = getelementptr inbounds nuw i8, ptr %20, i64 16 - %27 = trunc nuw i64 %24 to i32 + %25 = icmp ugt i64 %24, 4294967295 + %27 = trunc nuw i64 %25 to i32 %28 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %.0.i.i, i32 %27) %29 = extractvalue { i32, i1 } %28, 1 %30 = extractvalue { i32, i1 } %28, 0 - br i1 %29, label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread, label %19 + %narrow.i.i.not.i.i = select i1 %26, i1 true, i1 %29 + %.2.i.i.i = select i1 %26, i32 undef, i32 %30 + br i1 %narrow.i.i.not.i.i, label %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread, label %19 _ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit: ; preds = %19 %31 = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 %14, i32 %.0.i.i) @@ -19784,7 +19782,7 @@ _ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958 invoke void @_ZN7zerovec10varzerovec10components24write_serializable_bytes17h0a2abafe642c4d12E.llvm.5857379167208991996(ptr noalias noundef nonnull readonly align 8 %1, i64 noundef %2, ptr noalias noundef nonnull align 1 %38, i64 noundef %36) to label %43 unwind label %41 -_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread: ; preds = %22, %"_ZN4core4iter8adapters3map12map_try_fold28_$u7b$$u7b$closure$u7d$$u7d$17he68731ed9eb9e9d6E.exit.i.i", %3, %7, %10, %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit +_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit.thread: ; preds = %22, %7, %3, %10, %_ZN7zerovec10varzerovec10components24compute_serializable_len17h4971f14e7e926958E.llvm.5857379167208991996.exit store i64 -9223372036854775808, ptr %0, align 8 br label %44 diff --git a/bench/wasmtime-rs/optimized/1bz8ofzmdclmzhoz.ll b/bench/wasmtime-rs/optimized/1bz8ofzmdclmzhoz.ll index f8125f4c3f3..423ec08cd73 100644 --- a/bench/wasmtime-rs/optimized/1bz8ofzmdclmzhoz.ll +++ b/bench/wasmtime-rs/optimized/1bz8ofzmdclmzhoz.ll @@ -30235,9 +30235,9 @@ define { i32, i32 } @_ZN17cranelift_codegen2ir10immediates8Offset3212try_from_i6 ; Function Attrs: mustprogress nofree norecurse nosync nounwind nonlazybind willreturn memory(none) uwtable define { i32, i32 } @_ZN17cranelift_codegen2ir10immediates8Offset3211try_add_i6417ha536a63be71c59b2E(i32 noundef %0, i64 noundef %1) unnamed_addr #13 { - %3 = add i64 %1, 2147483648 - %or.cond = icmp ult i64 %3, 4294967296 - br i1 %or.cond, label %4, label %10 + %3 = add i64 %1, -2147483648 + %or.cond = icmp ult i64 %3, -4294967296 + br i1 %or.cond, label %10, label %4 4: ; preds = %2 %5 = trunc nsw i64 %1 to i32 @@ -30248,9 +30248,9 @@ define { i32, i32 } @_ZN17cranelift_codegen2ir10immediates8Offset3211try_add_i64 %spec.select10 = zext i1 %9 to i32 br label %10 -10: ; preds = %4, %2 - %.sroa.4.0 = phi i32 [ undef, %2 ], [ %8, %4 ] - %.sroa.0.0 = phi i32 [ 0, %2 ], [ %spec.select10, %4 ] +10: ; preds = %2, %4 + %.sroa.4.0 = phi i32 [ %8, %4 ], [ undef, %2 ] + %.sroa.0.0 = phi i32 [ %spec.select10, %4 ], [ 0, %2 ] %11 = insertvalue { i32, i32 } poison, i32 %.sroa.0.0, 0 %12 = insertvalue { i32, i32 } %11, i32 %.sroa.4.0, 1 ret { i32, i32 } %12 diff --git a/bench/wasmtime-rs/optimized/1r2x5absurxbrq18.ll b/bench/wasmtime-rs/optimized/1r2x5absurxbrq18.ll index c90b5a603ba..29f24f68b57 100644 --- a/bench/wasmtime-rs/optimized/1r2x5absurxbrq18.ll +++ b/bench/wasmtime-rs/optimized/1r2x5absurxbrq18.ll @@ -16290,6 +16290,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari .critedge.loopexit: ; preds = %.thread %19 = trunc nuw i8 %.sroa.015.1 to i1 + %20 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.1, i8 1) br label %.critedge .critedge: ; preds = %.critedge.loopexit, %10 @@ -16298,7 +16299,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari %.021.lcssa = phi i32 [ 0, %10 ], [ %.122, %.critedge.loopexit ] %.019.lcssa = phi i32 [ %11, %10 ], [ %.120, %.critedge.loopexit ] %.0.lcssa = phi i32 [ 0, %10 ], [ %.1, %.critedge.loopexit ] - %.sroa.4.0.lcssa = phi i8 [ 0, %10 ], [ %.sroa.4.1, %.critedge.loopexit ] + %.sroa.4.0.lcssa = phi { i8, i1 } [ { i8 1, i1 false }, %10 ], [ %19, %.critedge.loopexit ] %20 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %.019.lcssa) %21 = icmp eq i32 %20, 1 br i1 %21, label %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit27, label %22 @@ -16320,19 +16321,18 @@ _ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29: ; pre br i1 %.sroa.015.0.lcssa, label %26, label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit 26: ; preds = %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 - %27 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.0.lcssa, i8 1) - %28 = extractvalue { i8, i1 } %27, 1 + %28 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 1 br i1 %28, label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit, label %29 29: ; preds = %26 - %30 = extractvalue { i8, i1 } %27, 0 + %30 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 0 %31 = icmp ult i8 %30, 17 %32 = zext i1 %31 to i8 br label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit _ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit: ; preds = %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29, %26, %29 - %.sroa.03.0.i = phi i8 [ 0, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ 0, %26 ], [ %32, %29 ] - %.sroa.5.0.i = phi i8 [ undef, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ undef, %26 ], [ %30, %29 ] + %.sroa.03.0.i = phi i8 [ 0, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ 0, %27 ], [ %32, %29 ] + %.sroa.5.0.i = phi i8 [ undef, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ undef, %27 ], [ %30, %29 ] %33 = add i32 %11, -1 %34 = add i32 %.023.lcssa, %33 %35 = sub i32 0, %.023.lcssa @@ -16434,6 +16434,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari ._crit_edge.loopexit: ; preds = %49 %14 = trunc nuw i8 %.sroa.015.1 to i1 + %15 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.1, i8 1) br label %._crit_edge ._crit_edge: ; preds = %._crit_edge.loopexit, %7 @@ -16442,7 +16443,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari %.024.lcssa = phi i32 [ 0, %7 ], [ %.125, %._crit_edge.loopexit ] %.022.lcssa = phi i32 [ %8, %7 ], [ %.123, %._crit_edge.loopexit ] %.020.lcssa = phi i32 [ 0, %7 ], [ %.121, %._crit_edge.loopexit ] - %.sroa.4.0.lcssa = phi i8 [ 0, %7 ], [ %.sroa.4.1, %._crit_edge.loopexit ] + %.sroa.4.0.lcssa = phi { i8, i1 } [ { i8 1, i1 false }, %7 ], [ %15, %._crit_edge.loopexit ] %15 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %.022.lcssa) %16 = icmp eq i32 %15, 1 br i1 %16, label %17, label %.noexc @@ -16464,12 +16465,11 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari br i1 %.sroa.015.0.lcssa, label %21, label %28 21: ; preds = %20 - %22 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.0.lcssa, i8 1) - %23 = extractvalue { i8, i1 } %22, 1 + %23 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 1 br i1 %23, label %28, label %24 24: ; preds = %21 - %25 = extractvalue { i8, i1 } %22, 0 + %25 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 0 %26 = icmp ult i8 %25, 17 %27 = zext i1 %26 to i8 br label %28 @@ -16621,6 +16621,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari "_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32.loopexit": ; preds = %39 %43 = trunc nuw i8 %.sroa.015.0 to i1 + %44 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.0, i8 1) br label %"_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32" "_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32": ; preds = %"_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32.loopexit", %17 @@ -16629,7 +16630,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari %.us-phi64 = phi i32 [ 0, %17 ], [ %.024, %"_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32.loopexit" ] %.us-phi65 = phi i32 [ %15, %17 ], [ %.022, %"_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32.loopexit" ] %.us-phi66 = phi i32 [ 0, %17 ], [ %.020, %"_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32.loopexit" ] - %.us-phi67 = phi i8 [ 0, %17 ], [ %.sroa.4.0, %"_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32.loopexit" ] + %.us-phi67 = phi { i8, i1 } [ { i8 1, i1 false }, %17 ], [ %44, %"_ZN4core3ptr375drop_in_place$LT$core..iter..adapters..map..Map$LT$core..array..iter..IntoIter$LT$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$C$2_usize$GT$$C$wasmtime_environ..fact..trampoline..variant_info$LT$$u5b$core..option..Option$LT$$RF$wasmtime_environ..component..types..InterfaceType$GT$$u3b$$u20$2$u5d$$GT$..$u7b$$u7b$closure$u7d$$u7d$$GT$$GT$17h40c22adb9ce8d941E.exit32.loopexit" ] %44 = call { ptr, i64 } @"_ZN4core5array4iter21IntoIter$LT$T$C$_$GT$12as_mut_slice17h561e8eb3fb25bffeE.llvm.11357125133562502446"(ptr noalias noundef nonnull align 8 dereferenceable(32) %20) call void @llvm.lifetime.end.p0(ptr nonnull %3) %45 = call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %.us-phi65) @@ -16657,19 +16658,18 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari br i1 %.us-phi, label %52, label %59 52: ; preds = %51 - %53 = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.us-phi67, i8 1) - %54 = extractvalue { i8, i1 } %53, 1 + %54 = extractvalue { i8, i1 } %.us-phi67, 1 br i1 %54, label %59, label %55 55: ; preds = %52 - %56 = extractvalue { i8, i1 } %53, 0 + %56 = extractvalue { i8, i1 } %.us-phi67, 0 %57 = icmp ult i8 %56, 17 %58 = zext i1 %57 to i8 br label %59 59: ; preds = %55, %52, %51 - %.sroa.03.0.i = phi i8 [ 0, %51 ], [ 0, %52 ], [ %58, %55 ] - %.sroa.5.0.i = phi i8 [ undef, %51 ], [ undef, %52 ], [ %56, %55 ] + %.sroa.03.0.i = phi i8 [ 0, %52 ], [ 0, %53 ], [ %58, %55 ] + %.sroa.5.0.i = phi i8 [ undef, %52 ], [ undef, %53 ], [ %56, %55 ] %60 = add i32 %15, -1 %61 = add i32 %.us-phi63, %60 %62 = sub i32 0, %.us-phi63 @@ -16700,12 +16700,12 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari ret void .thread54: ; preds = %26, %80, %47 - %.sroa.015.1 = phi i8 [ %92, %80 ], [ %.sroa.015.0, %47 ], [ %.sroa.015.0, %26 ] - %.127 = phi i32 [ %.0.sroa.speculated.i42, %80 ], [ %.026, %47 ], [ %.026, %26 ] - %.125 = phi i32 [ %.0.sroa.speculated.i41, %80 ], [ %.024, %47 ], [ %.024, %26 ] - %.123 = phi i32 [ %.0.sroa.speculated.i40, %80 ], [ %.022, %47 ], [ %.022, %26 ] - %.121 = phi i32 [ %.0.sroa.speculated.i, %80 ], [ %.020, %47 ], [ %.020, %26 ] - %.sroa.4.1 = phi i8 [ %.sroa.4.0.i, %80 ], [ %.sroa.4.0, %47 ], [ %.sroa.4.0, %26 ] + %.sroa.015.1 = phi i8 [ %92, %80 ], [ %.sroa.015.0, %48 ], [ %.sroa.015.0, %26 ] + %.127 = phi i32 [ %.0.sroa.speculated.i42, %80 ], [ %.026, %48 ], [ %.026, %26 ] + %.125 = phi i32 [ %.0.sroa.speculated.i41, %80 ], [ %.024, %48 ], [ %.024, %26 ] + %.123 = phi i32 [ %.0.sroa.speculated.i40, %80 ], [ %.022, %48 ], [ %.022, %26 ] + %.121 = phi i32 [ %.0.sroa.speculated.i, %80 ], [ %.020, %48 ], [ %.020, %26 ] + %.sroa.4.1 = phi i8 [ %.sroa.4.0.i, %80 ], [ %.sroa.4.0, %48 ], [ %.sroa.4.0, %26 ] %.pre = load i64, ptr %19, align 8, !alias.scope !3860 %.pre85 = load i64, ptr %18, align 8, !alias.scope !3860 br label %.split, !llvm.loop !3873 @@ -16794,6 +16794,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari ._crit_edge.loopexit: ; preds = %.thread %19 = trunc nuw i8 %.sroa.015.1 to i1 + %20 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.1, i8 1) br label %._crit_edge ._crit_edge: ; preds = %._crit_edge.loopexit, %10 @@ -16802,7 +16803,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari %.021.lcssa = phi i32 [ 0, %10 ], [ %.122, %._crit_edge.loopexit ] %.019.lcssa = phi i32 [ %11, %10 ], [ %.120, %._crit_edge.loopexit ] %.0.lcssa = phi i32 [ 0, %10 ], [ %.1, %._crit_edge.loopexit ] - %.sroa.4.0.lcssa = phi i8 [ 0, %10 ], [ %.sroa.4.1, %._crit_edge.loopexit ] + %.sroa.4.0.lcssa = phi { i8, i1 } [ { i8 1, i1 false }, %10 ], [ %19, %._crit_edge.loopexit ] %20 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %.019.lcssa) %21 = icmp eq i32 %20, 1 br i1 %21, label %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit27, label %22 @@ -16824,19 +16825,18 @@ _ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29: ; pre br i1 %.sroa.015.0.lcssa, label %26, label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit 26: ; preds = %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 - %27 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.0.lcssa, i8 1) - %28 = extractvalue { i8, i1 } %27, 1 + %28 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 1 br i1 %28, label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit, label %29 29: ; preds = %26 - %30 = extractvalue { i8, i1 } %27, 0 + %30 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 0 %31 = icmp ult i8 %30, 17 %32 = zext i1 %31 to i8 br label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit _ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit: ; preds = %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29, %26, %29 - %.sroa.03.0.i = phi i8 [ 0, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ 0, %26 ], [ %32, %29 ] - %.sroa.5.0.i = phi i8 [ undef, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ undef, %26 ], [ %30, %29 ] + %.sroa.03.0.i = phi i8 [ 0, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ 0, %27 ], [ %32, %29 ] + %.sroa.5.0.i = phi i8 [ undef, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ undef, %27 ], [ %30, %29 ] %33 = add i32 %11, -1 %34 = add i32 %.023.lcssa, %33 %35 = sub i32 0, %.023.lcssa @@ -16944,6 +16944,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari .critedge.loopexit: ; preds = %.thread %19 = trunc nuw i8 %.sroa.015.1 to i1 + %20 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.1, i8 1) br label %.critedge .critedge: ; preds = %.critedge.loopexit, %10 @@ -16952,7 +16953,7 @@ define hidden void @_ZN16wasmtime_environ9component5types16CanonicalAbiInfo7vari %.021.lcssa = phi i32 [ 0, %10 ], [ %.122, %.critedge.loopexit ] %.019.lcssa = phi i32 [ %11, %10 ], [ %.120, %.critedge.loopexit ] %.0.lcssa = phi i32 [ 0, %10 ], [ %.1, %.critedge.loopexit ] - %.sroa.4.0.lcssa = phi i8 [ 0, %10 ], [ %.sroa.4.1, %.critedge.loopexit ] + %.sroa.4.0.lcssa = phi { i8, i1 } [ { i8 1, i1 false }, %10 ], [ %19, %.critedge.loopexit ] %20 = tail call range(i32 0, 33) i32 @llvm.ctpop.i32(i32 %.019.lcssa) %21 = icmp eq i32 %20, 1 br i1 %21, label %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit27, label %22 @@ -16974,19 +16975,18 @@ _ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29: ; pre br i1 %.sroa.015.0.lcssa, label %26, label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit 26: ; preds = %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 - %27 = tail call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 %.sroa.4.0.lcssa, i8 1) - %28 = extractvalue { i8, i1 } %27, 1 + %28 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 1 br i1 %28, label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit, label %29 29: ; preds = %26 - %30 = extractvalue { i8, i1 } %27, 0 + %30 = extractvalue { i8, i1 } %.sroa.4.0.lcssa, 0 %31 = icmp ult i8 %30, 17 %32 = zext i1 %31 to i8 br label %_ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit _ZN16wasmtime_environ9component5types8add_flat17h4446092aac2a602fE.exit: ; preds = %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29, %26, %29 - %.sroa.03.0.i = phi i8 [ 0, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ 0, %26 ], [ %32, %29 ] - %.sroa.5.0.i = phi i8 [ undef, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ undef, %26 ], [ %30, %29 ] + %.sroa.03.0.i = phi i8 [ 0, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ 0, %27 ], [ %32, %29 ] + %.sroa.5.0.i = phi i8 [ undef, %_ZN16wasmtime_environ9component5types8align_to17h089c6779f7c5890cE.exit29 ], [ undef, %27 ], [ %30, %29 ] %33 = add i32 %11, -1 %34 = add i32 %.023.lcssa, %33 %35 = sub i32 0, %.023.lcssa diff --git a/bench/wasmtime-rs/optimized/21fqzizs6bhqfm93.ll b/bench/wasmtime-rs/optimized/21fqzizs6bhqfm93.ll index 1478b53bd3a..03657677636 100644 --- a/bench/wasmtime-rs/optimized/21fqzizs6bhqfm93.ll +++ b/bench/wasmtime-rs/optimized/21fqzizs6bhqfm93.ll @@ -187,87 +187,94 @@ define hidden { i64, i64 } @"_ZN8smallvec17SmallVec$LT$A$GT$11try_reserve17h575e 11: ; preds = %2 %12 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %9, i64 %1) - %13 = extractvalue { i64, i1 } %12, 1 - br i1 %13, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %14 - -14: ; preds = %11 - %15 = extractvalue { i64, i1 } %12, 0 - %16 = icmp ult i64 %15, 2 - %17 = add i64 %15, -1 - %18 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %17, i1 true) - %19 = lshr i64 -1, %18 - %.0.i.i = select i1 %16, i64 0, i64 %19 - %20 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %.0.i.i, i64 1) - %21 = extractvalue { i64, i1 } %20, 1 - %22 = extractvalue { i64, i1 } %20, 0 - br i1 %21, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %23 - -23: ; preds = %14 + %13 = extractvalue { i64, i1 } %12, 0 + %14 = extractvalue { i64, i1 } %12, 1 + br i1 %14, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %15 + +15:; preds = %11 + %16 = icmp ult i64 %13, 2 + br i1 %16, label %22, label %17 + +17:; preds = %15 + %18 = add i64 %13, -1 + %20 = tail call range(i64 0, 65) i64 @llvm.ctlz.i64(i64 %18, i1 true) + %20 = lshr i64 -1, %19 + %21 = tail call { i64, i1 } @llvm.uadd.with.overflow.i64(i64 %20, i64 1) + br label %23 + +23: ; preds = %17, %15 + %.0.i.i = phi { i64, i1 } [ %21, %17 ], [ { i64 1, i1 false }, %15 ] + %23 = extractvalue { i64, i1 } %.0.i.i, 1 + %24 = extractvalue { i64, i1 } %.0.i.i, 0 + %.sroa.3.0.i.i = select i1 %23, i64 undef, i64 %24 + br i1 %23, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %25 + +25: ; preds = %22 tail call void @llvm.experimental.noalias.scope.decl(metadata !28) %24 = icmp ult i64 %5, 17 - %.not.i = icmp ult i64 %22, %9 + %.not.i = icmp ult i64 %24, %9 br i1 %.not.i, label %25, label %26 -25: ; preds = %23 +25: ; preds = %25 tail call void @_ZN4core9panicking5panic17h44790a89027c670fE(ptr noalias noundef nonnull readonly align 1 @anon.f6a7ce93089bff2d29fe019b266fc7c5.18, i64 noundef 32, ptr noalias noundef readonly align 8 dereferenceable(24) @anon.f6a7ce93089bff2d29fe019b266fc7c5.19) #15, !noalias !28 unreachable -26: ; preds = %23 - %27 = icmp ult i64 %22, 17 - br i1 %27, label %29, label %28 +26: ; preds = %25 + %27 = icmp ult i64 %24, 17 + br i1 %27, label %31, label %30 -28: ; preds = %26 - %.not74.i = icmp eq i64 %5, %22 - br i1 %.not74.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %30 +30: ; preds = %28 + %.not74.i = icmp eq i64 %5, %24 + br i1 %.not74.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %32 -29: ; preds = %26 - br i1 %24, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %49 +31: ; preds = %28 + br i1 %26, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %51 -30: ; preds = %28 - %31 = shl i64 %22, 2 - %32 = icmp ult i64 %22, 4611686018427387904 - br i1 %32, label %33, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit" - -33: ; preds = %30 - %34 = icmp ugt i64 %31, 9223372036854775804 - br i1 %34, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %35 - -35: ; preds = %33 - br i1 %24, label %41, label %36 - -36: ; preds = %35 - %37 = shl i64 %.sink.i, 2 - %38 = icmp ult i64 %5, 4611686018427387904 - br i1 %38, label %39, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit" - -39: ; preds = %36 - %40 = icmp ugt i64 %37, 9223372036854775804 - br i1 %40, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %44 - -41: ; preds = %35 - %42 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !28 - %43 = tail call noundef align 4 ptr @__rust_alloc(i64 noundef %31, i64 noundef 4) #16, !noalias !28 - %.not119.i = icmp eq ptr %43, null +32:; preds = %30 + %33 = shl i64 %24, 2 + %34 = icmp ult i64 %24, 4611686018427387904 + br i1 %34, label %35, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit" + +36: ; preds = %32 + %36 = icmp ugt i64 %33, 9223372036854775804 + br i1 %36, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %37 + +37: ; preds = %35 + br i1 %26, label %43, label %38 + +38:; preds = %37 + %39 = shl i64 %.sink.i, 2 + %40 = icmp ult i64 %5, 4611686018427387904 + br i1 %40, label %41, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit" + +41:; preds = %38 + %42 = icmp ugt i64 %39, 9223372036854775804 + br i1 %42, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %46 + +43: ; preds = %37 + %44 = load volatile i8, ptr @__rust_no_alloc_shim_is_unstable, align 1, !noalias !28 + %45 = tail call noundef align 4 ptr @__rust_alloc(i64 noundef %33, i64 noundef 4) #16, !noalias !28 + %.not119.i = icmp eq ptr %45, null br i1 %.not119.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %47 -44: ; preds = %39 - %45 = tail call noundef align 4 ptr @__rust_realloc(ptr noundef nonnull %7, i64 noundef %37, i64 noundef 4, i64 noundef %31) #16, !noalias !28 - %.not118.i = icmp eq ptr %45, null - br i1 %.not118.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %46 +46: ; preds = %41 + %47 = tail call noundef align 4 ptr @__rust_realloc(ptr noundef nonnull %7, i64 noundef %39, i64 noundef 4, i64 noundef %33) #16, !noalias !28 + %.not118.i = icmp eq ptr %47, null + br i1 %.not118.i, label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit", label %48 -46: ; preds = %44, %47 - %.0.i = phi ptr [ %43, %47 ], [ %45, %44 ] +48: ; preds = %46, %49 + %.0.i = phi ptr [ %45, %49 ], [ %47, %46 ] store ptr %.0.i, ptr %0, align 8, !alias.scope !28 store i64 %9, ptr %8, align 8, !alias.scope !28 - store i64 %22, ptr %4, align 8, !alias.scope !28 + store i64 %24, ptr %4, align 8, !alias.scope !28 br label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit" -47: ; preds = %41 +47: ; preds = %43 %48 = shl nuw nsw i64 %5, 2 - tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 4 %43, ptr nonnull align 8 dereferenceable(72) %0, i64 %48, i1 false) - br label %46 + tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 4 %45, ptr nonnull align 8 dereferenceable(72) %0, i64 %48, i1 false) + br label %48 -49: ; preds = %29 +49: ; preds = %31 %50 = shl i64 %.val, 2 tail call void @llvm.memcpy.p0.p0.i64(ptr nonnull align 8 dereferenceable(72) %0, ptr nonnull align 4 %7, i64 %50, i1 false) store i64 %.val, ptr %4, align 8, !alias.scope !28 @@ -289,9 +296,9 @@ _ZN8smallvec10deallocate17h96e979249edf9c4cE.exit.i: ; preds = %49 tail call void @__rust_dealloc(ptr noundef nonnull %7, i64 noundef %51, i64 noundef 4) #16, !noalias !28 br label %"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit" -"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit": ; preds = %14, %11, %_ZN8smallvec10deallocate17h96e979249edf9c4cE.exit.i, %46, %44, %41, %39, %36, %33, %30, %29, %28, %2 - %.sroa.4.0 = phi i64 [ undef, %2 ], [ %31, %44 ], [ %31, %41 ], [ undef, %28 ], [ undef, %46 ], [ undef, %_ZN8smallvec10deallocate17h96e979249edf9c4cE.exit.i ], [ undef, %29 ], [ undef, %33 ], [ %31, %30 ], [ undef, %39 ], [ %37, %36 ], [ undef, %11 ], [ %22, %14 ] - %.sroa.0.0 = phi i64 [ -9223372036854775807, %2 ], [ 4, %44 ], [ 4, %41 ], [ -9223372036854775807, %28 ], [ -9223372036854775807, %46 ], [ -9223372036854775807, %_ZN8smallvec10deallocate17h96e979249edf9c4cE.exit.i ], [ -9223372036854775807, %29 ], [ 0, %33 ], [ 0, %30 ], [ 0, %39 ], [ 0, %36 ], [ 0, %11 ], [ 0, %14 ] +"_ZN8smallvec17SmallVec$LT$A$GT$8try_grow17hfc224d51830cc85eE.exit": ; preds = %22, %11, %_ZN8smallvec10deallocate17h96e979249edf9c4cE.exit.i, %48, %46, %43, %41, %38, %36, %32, %31, %30, %2 + %.sroa.4.0 = phi i64 [ undef, %2 ], [ %33, %46 ], [ %33, %43 ], [ undef, %30 ], [ undef, %48 ], [ undef, %_ZN8smallvec10deallocate17h96e979249edf9c4cE.exit.i ], [ undef, %31 ], [ undef, %35 ], [ %33, %32 ], [ undef, %41 ], [ %39, %38 ], [ undef, %11 ], [ %.sroa.3.0.i.i, %22 ] + %.sroa.0.0 = phi i64 [ -9223372036854775807, %2 ], [ 4, %46 ], [ 4, %43 ], [ -9223372036854775807, %30 ], [ -9223372036854775807, %48 ], [ -9223372036854775807, %_ZN8smallvec10deallocate17h96e979249edf9c4cE.exit.i ], [ -9223372036854775807, %31 ], [ 0, %35 ], [ 0, %32 ], [ 0, %41 ], [ 0, %38 ], [ 0, %11 ], [ 0, %22 ] %55 = insertvalue { i64, i64 } poison, i64 %.sroa.0.0, 0 %56 = insertvalue { i64, i64 } %55, i64 %.sroa.4.0, 1 ret { i64, i64 } %56 diff --git a/bench/wasmtime-rs/optimized/37pex3k1sj15o95m.ll b/bench/wasmtime-rs/optimized/37pex3k1sj15o95m.ll index 4a644da76ca..1454e495e67 100644 --- a/bench/wasmtime-rs/optimized/37pex3k1sj15o95m.ll +++ b/bench/wasmtime-rs/optimized/37pex3k1sj15o95m.ll @@ -24941,7 +24941,6 @@ _ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit: ; preds = %.sroa.3.0.i = select i1 %or.cond.i.not133.not137, i64 %41, i64 undef %narrow.i.not.not = select i1 %or.cond.i.not133.not137, i1 %42, i1 false %43 = icmp sgt i64 %.sroa.3.0.i, -1 - %.sroa.6.0 = select i1 %narrow.i.not.not, i64 %.sroa.3.0.i, i64 undef %narrow = select i1 %narrow.i.not.not, i1 %43, i1 false %44 = load i8, ptr %4, align 8, !range !3795, !alias.scope !4291, !noundef !4 %45 = icmp eq i8 %44, 1 @@ -24960,7 +24959,7 @@ _ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit: ; preds = br i1 %51, label %52, label %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit.i106" 52: ; preds = %46 - switch i32 %.val.i102, label %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit.i106" [ + switch i32 %.val.i102, label %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit.i102" [ i32 1, label %53 i32 2, label %55 ] @@ -24985,7 +24984,7 @@ _ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit: ; preds = br label %_ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit110 _ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit110: ; preds = %_ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit, %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit.i106" - %.0.i101 = phi ptr [ null, %_ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit ], [ %spec.select.i109, %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit.i106" ] + %.0.i101 = phi ptr [ null, %_ZN17cranelift_codegen2ir3pcc4Fact9as_symbol17h5dd4b2b48c15dc84E.exit ], [ %spec.select.i109, %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit.i102" ] %62 = icmp eq ptr %.0.i, null %63 = load i8, ptr %2, align 8, !range !3795 br i1 %62, label %64, label %66 @@ -25043,7 +25042,7 @@ default.unreachable140: ; preds = %136 %. = zext i1 %79 to i64 %80 = getelementptr inbounds nuw i8, ptr %2, i64 32 %81 = load i64, ptr %80, align 8, !noundef !4 - %82 = tail call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %81, i64 %.sroa.6.0) + %82 = tail call { i64, i1 } @llvm.sadd.with.overflow.i64(i64 %81, i64 %.sroa.3.0.i) %83 = extractvalue { i64, i1 } %82, 1 br i1 %83, label %.critedge, label %84 @@ -25096,7 +25095,7 @@ default.unreachable140: ; preds = %136 br i1 %109, label %110, label %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit.thread114" 110: ; preds = %102 - switch i32 %.val97, label %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit112.thread" [ + switch i32 %.val97, label %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit108.thread" [ i32 1, label %111 i32 2, label %"_ZN77_$LT$cranelift_codegen..ir..pcc..BaseExpr$u20$as$u20$core..cmp..PartialEq$GT$2eq17h1f2fa5857a5ce062E.exit112" ] @@ -25154,7 +25153,7 @@ default.unreachable140: ; preds = %136 %.sroa.730.0 = phi i32 [ undef, %131 ], [ %135, %.sink.split ] %137 = load i32, ptr %103, align 4, !noundef !4 %138 = load i32, ptr %104, align 8, !range !3801, !alias.scope !4294, !noalias !4297, !noundef !4 - switch i32 %138, label %default.unreachable140 [ + switch i32 %138, label %default.unreachable135 [ i32 0, label %"_ZN71_$LT$cranelift_codegen..ir..pcc..Expr$u20$as$u20$core..clone..Clone$GT$5clone17hda07561bf74c99d2E.exit" i32 1, label %139 i32 2, label %142 diff --git a/bench/wasmtime-rs/optimized/4u85yh8sn1llpfha.ll b/bench/wasmtime-rs/optimized/4u85yh8sn1llpfha.ll index 550f37fdfc8..3baed94ea2d 100644 --- a/bench/wasmtime-rs/optimized/4u85yh8sn1llpfha.ll +++ b/bench/wasmtime-rs/optimized/4u85yh8sn1llpfha.ll @@ -4060,7 +4060,7 @@ define hidden void @_ZN16wasmtime_runtime6memory10MmapMemory3new17heaf0bbb1cba0c call void @llvm.lifetime.end.p0(ptr nonnull %8) br i1 %44, label %50, label %49 -.thread: ; preds = %37, %33, %22 +.thread: ; preds = %33, %22, %37 %47 = call fastcc noundef nonnull ptr @"_ZN16wasmtime_runtime6memory10MmapMemory3new28_$u7b$$u7b$closure$u7d$$u7d$17h1948b74fea1cec8dE"(ptr noalias noundef readonly align 8 dereferenceable(8) %10) %48 = getelementptr inbounds nuw i8, ptr %0, i64 8 store ptr %47, ptr %48, align 8 diff --git a/bench/wasmtime-rs/optimized/enal6epyb0tyurl.ll b/bench/wasmtime-rs/optimized/enal6epyb0tyurl.ll index d6894a80a2b..8fc0d581e8c 100644 --- a/bench/wasmtime-rs/optimized/enal6epyb0tyurl.ll +++ b/bench/wasmtime-rs/optimized/enal6epyb0tyurl.ll @@ -23308,8 +23308,8 @@ _ZN5gimli4read6reader6Reader11read_offset17haccfa5cfe0240852E.exit: ; preds = %5 %.fr481 = freeze i8 %80 %81 = select i1 %12, i8 16, i8 8 %82 = add nuw nsw i8 %81, %.sroa.18.sroa.0.0 - %83 = icmp slt i8 %.fr, 0 - br i1 %83, label %.thread465, label %87 + %83 = icmp sgt i8 %.fr, -1 + br i1 %83, label %87, label %.thread467 84: ; preds = %71 %85 = ptrtoint ptr %72 to i64 diff --git a/bench/z3/optimized/fm_tactic.ll b/bench/z3/optimized/fm_tactic.ll index 4a3896b0740..4a94428c3ec 100644 --- a/bench/z3/optimized/fm_tactic.ll +++ b/bench/z3/optimized/fm_tactic.ll @@ -5151,8 +5151,8 @@ _ZNK6vectorIcLb0EjE3endEv.exit.i.i.i.i: ; preds = %.noexc br label %124 36: ; preds = %.lr.ph, %79 - %37 = phi ptr [ null, %.lr.ph ], [ %80, %79 ] - %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %79 ] + %37 = phi ptr [ null, %.lr.ph ], [ %80, %80 ] + %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %80 ] %38 = load ptr, ptr %10, align 8, !tbaa !146 %39 = getelementptr inbounds nuw i8, ptr %38, i64 %indvars.iv %40 = load i8, ptr %39, align 1, !tbaa !107 @@ -5177,22 +5177,22 @@ _ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 %50 = getelementptr inbounds nuw %class.ptr_vector.26, ptr %49, i64 %indvars.iv %51 = load ptr, ptr %50, align 8, !tbaa !71 %52 = icmp eq ptr %51, null - br i1 %52, label %56, label %53 + br i1 %52, label %57, label %53 53: ; preds = %_ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i %54 = getelementptr inbounds i8, ptr %51, i64 -4 %55 = load i32, ptr %54, align 4, !tbaa !117 - br label %56 + %56 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %.0.i.i18, i32 %55) + br label %57 -56: ; preds = %53, %_ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i - %.0.i6.i = phi i32 [ %55, %53 ], [ 0, %_ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i ] - %umul.i = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %.0.i.i18, i32 %.0.i6.i) - %57 = extractvalue { i32, i1 } %umul.i, 1 - %umul.value.i = extractvalue { i32, i1 } %umul.i, 0 +57: ; preds = %53, %_ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i + %.0.i6.i = phi { i32, i1 } [ %56, %53 ], [ zeroinitializer, %_ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i ] + %57 = extractvalue { i32, i1 } %.0.i6.i, 1 + %umul.value.i = extractvalue { i32, i1 } %.0.i6.i, 0 %58 = icmp eq ptr %37, null br i1 %58, label %65, label %59 -59: ; preds = %56 +59: ; preds = %57 %60 = getelementptr inbounds i8, ptr %37, i64 -4 %61 = load i32, ptr %60, align 4, !tbaa !117 %62 = getelementptr inbounds i8, ptr %37, i64 -8 @@ -5200,7 +5200,7 @@ _ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 %64 = icmp eq i32 %61, %63 br i1 %64, label %65, label %66 -65: ; preds = %59, %56 +65: ; preds = %59, %57 invoke void @_ZN6vectorISt4pairIjjELb0EjE13expand_vectorEv(ptr noundef nonnull align 8 dereferenceable(8) %3) to label %.noexc19 unwind label %77 @@ -5211,8 +5211,8 @@ _ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 br label %66 66: ; preds = %.noexc19, %59 - %67 = phi i32 [ %.pre2.i, %.noexc19 ], [ %61, %59 ] - %68 = phi ptr [ %.pre.i, %.noexc19 ], [ %37, %59 ] + %67 = phi i32 [ %.pre2.i, %.noexc19 ], [ %61, %60 ] + %68 = phi ptr [ %.pre.i, %.noexc19 ], [ %37, %60 ] %69 = zext i32 %67 to i64 %70 = getelementptr inbounds nuw %"struct.std::pair.80", ptr %68, i64 %69 %71 = zext i32 %umul.value.i to i64 @@ -5233,7 +5233,7 @@ _ZNK6vectorIPN9fm_tactic10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 br label %124 79: ; preds = %36, %66 - %80 = phi ptr [ %37, %36 ], [ %73, %66 ] + %80 = phi ptr [ %37, %36 ], [ %73, %67 ] %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count br i1 %exitcond.not, label %._crit_edge, label %36, !llvm.loop !257 @@ -5242,7 +5242,7 @@ _ZN9fm_tactic3imp9x_cost_ltC2ER7svectorIcjE.exit: ; preds = %_ZN6vectorISt4pairI %81 = phi ptr [ null, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit.thread ], [ %18, %32 ], [ %18, %_ZNK6vectorIcLb0EjE3endEv.exit.i.i.i.i ], [ %18, %.noexc ], [ %18, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit ] %82 = phi ptr [ null, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit.thread ], [ %.ph, %32 ], [ %.ph, %_ZNK6vectorIcLb0EjE3endEv.exit.i.i.i.i ], [ %.ph, %.noexc ], [ %.ph, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit ] invoke void @_ZSt11stable_sortIPSt4pairIjjEN9fm_tactic3imp9x_cost_ltEEvT_S6_T0_(ptr noundef %82, ptr noundef %81, ptr noundef nonnull %4) - to label %83 unwind label %102 + to label %84 unwind label %102 83: ; preds = %_ZN9fm_tactic3imp9x_cost_ltC2ER7svectorIcjE.exit %84 = load ptr, ptr %4, align 8, !tbaa !146 @@ -5308,8 +5308,8 @@ _ZN6vectorISt4pairIjjELb0EjED2Ev.exit: ; preds = %_ZN9fm_tactic3imp9x br label %124 .lr.ph34: ; preds = %.lr.ph34.preheader, %113 - %104 = phi ptr [ %114, %113 ], [ %.pre, %.lr.ph34.preheader ] - %.01433 = phi ptr [ %121, %113 ], [ %90, %.lr.ph34.preheader ] + %104 = phi ptr [ %114, %114 ], [ %.pre, %.lr.ph34.preheader ] + %.01433 = phi ptr [ %121, %114 ], [ %90, %.lr.ph34.preheader ] %105 = icmp eq ptr %104, null br i1 %105, label %112, label %106 @@ -5332,8 +5332,8 @@ _ZN6vectorISt4pairIjjELb0EjED2Ev.exit: ; preds = %_ZN9fm_tactic3imp9x br label %113 113: ; preds = %.noexc26, %106 - %114 = phi ptr [ %.pre.i23, %.noexc26 ], [ %104, %106 ] - %115 = phi i32 [ %.pre2.i25, %.noexc26 ], [ %108, %106 ] + %114 = phi ptr [ %.pre.i23, %.noexc26 ], [ %104, %107 ] + %115 = phi i32 [ %.pre2.i25, %.noexc26 ], [ %108, %107 ] %116 = getelementptr inbounds i8, ptr %114, i64 -4 %117 = zext i32 %115 to i64 %118 = getelementptr inbounds nuw i32, ptr %114, i64 %117 @@ -5351,7 +5351,7 @@ _ZN6vectorISt4pairIjjELb0EjED2Ev.exit: ; preds = %_ZN9fm_tactic3imp9x br label %124 124: ; preds = %122, %102, %77, %34 - %.pn = phi { ptr, i32 } [ %78, %77 ], [ %123, %122 ], [ %103, %102 ], [ %35, %34 ] + %.pn = phi { ptr, i32 } [ %78, %78 ], [ %123, %123 ], [ %103, %103 ], [ %35, %34 ] call void @_ZN6vectorISt4pairIjjELb0EjED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %3) #22 call void @llvm.lifetime.end.p0(ptr nonnull %3) resume { ptr, i32 } %.pn diff --git a/bench/z3/optimized/pb_solver.ll b/bench/z3/optimized/pb_solver.ll index 5ede12b8a1b..f227f3ac511 100644 --- a/bench/z3/optimized/pb_solver.ll +++ b/bench/z3/optimized/pb_solver.ll @@ -5681,12 +5681,12 @@ _ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit: ; preds = %42, %47 br label %56 56: ; preds = %328, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit - %57 = phi ptr [ %43, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %265, %328 ] - %58 = phi ptr [ %45, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %266, %328 ] - %59 = phi i8 [ %.pre, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %315, %328 ] - %.sroa.0.1 = phi i32 [ %.sroa.0.0, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %273, %328 ] - %.080 = phi i32 [ 1, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %.181, %328 ] - %.077 = phi i32 [ %.0.i, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %300, %328 ] + %57 = phi ptr [ %43, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %265, %329 ] + %58 = phi ptr [ %45, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %266, %329 ] + %59 = phi i8 [ %.pre, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %315, %329 ] + %.sroa.0.1 = phi i32 [ %.sroa.0.0, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %273, %329 ] + %.080 = phi i32 [ 1, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %.181, %329 ] + %.077 = phi i32 [ %.0.i, %_ZNK6vectorIN3sat7literalELb0EjE4sizeEv.exit ], [ %300, %329 ] %60 = trunc nuw i8 %59 to i1 %61 = icmp ugt i32 %.080, 4096 %or.cond = or i1 %61, %60 @@ -5799,7 +5799,7 @@ _ZN3satlsERSoNS_7literalE.exit98: ; preds = %107, %109 124: ; preds = %123, %81 %125 = load i32, ptr %51, align 8, !tbaa !214 %126 = and i32 %125, 7 - switch i32 %126, label %264 [ + switch i32 %126, label %265 [ i32 0, label %127 i32 1, label %137 i32 2, label %149 @@ -5908,7 +5908,7 @@ _ZN3satlsERSoNS_7literalE.exit98: ; preds = %107, %109 store i32 %187, ptr %53, align 8, !tbaa !325 %188 = getelementptr inbounds nuw i8, ptr %182, i64 16 %189 = load i32, ptr %188, align 8, !tbaa !326 - switch i32 %189, label %263 [ + switch i32 %189, label %264 [ i32 0, label %190 i32 1, label %231 ] @@ -5965,13 +5965,17 @@ _ZN3satlsERSoNS_7literalE.exit98: ; preds = %107, %109 %216 = icmp samesign ult i64 %indvars.iv.next.i, %215 br i1 %216, label %212, label %.preheader.loopexit.i, !llvm.loop !327 -._crit_edge.i: ; preds = %217, %.preheader.i - %.lcssa.i = phi i32 [ 0, %.preheader.i ], [ %219, %217 ] +._crit_edge.i: ; preds = %217 + %217 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %.080, i32 %220) + br label %._crit_edge.i + +._crit_edge.i: ; preds = %._crit_edge.loopexit.i, %.preheader.i + %.lcssa.i = phi { i32, i1 } [ zeroinitializer, %.preheader.i ], [ %217, %._crit_edge.loopexit.i ] %.not.i = icmp eq i32 %.sroa.0.0.copyload.i.i, -2 br i1 %.not.i, label %_ZN2pb6solver12process_cardERNS_4cardEj.exit.thread, label %222 217: ; preds = %217, %.lr.ph30.i - %indvars.iv34.i = phi i64 [ 0, %.lr.ph30.i ], [ %indvars.iv.next35.i, %217 ] + %indvars.iv34.i = phi i64 [ 0, %.lr.ph30.i ], [ %indvars.iv.next35.i, %218 ] %218 = getelementptr inbounds nuw %"class.sat::literal", ptr %211, i64 %indvars.iv34.i %.sroa.06.0.copyload.i = load i32, ptr %218, align 4, !tbaa !78 call void @_ZN2pb6solver9inc_coeffEN3sat7literalEj(ptr noundef nonnull align 8 dereferenceable(1049) %0, i32 %.sroa.06.0.copyload.i, i32 noundef %.080) @@ -5982,10 +5986,9 @@ _ZN3satlsERSoNS_7literalE.exit98: ; preds = %107, %109 br i1 %221, label %217, label %._crit_edge.i, !llvm.loop !328 222: ; preds = %._crit_edge.i - %umul.i = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %.080, i32 %.lcssa.i) - %umul.value.i = extractvalue { i32, i1 } %umul.i, 0 - %223 = extractvalue { i32, i1 } %umul.i, 1 - br i1 %223, label %224, label %.sink.split.i + %umul.value.i = extractvalue { i32, i1 } %.lcssa.i, 0 + %umul.value.i = extractvalue { i32, i1 } %.lcssa.i, 1 + br i1 %umul.value.i, label %225, label %.sink.split.i 224: ; preds = %222 store i8 1, ptr %16, align 4, !tbaa !309 @@ -5995,7 +5998,7 @@ _ZN3satlsERSoNS_7literalE.exit98: ; preds = %107, %109 %225 = load ptr, ptr %0, align 8, !tbaa !79 %226 = getelementptr inbounds nuw i8, ptr %225, i64 536 %227 = load ptr, ptr %226, align 8 - %228 = call noundef i32 %227(ptr noundef nonnull align 8 dereferenceable(1049) %0, i32 %.sroa.0.0.copyload.i.i) + %228 = call noundef i32 %228(ptr noundef nonnull align 8 dereferenceable(1049) %0, i32 %.sroa.0.0.copyload.i.i) %229 = icmp eq i32 %228, 1 %230 = zext i1 %229 to i32 %.sink.i = xor i32 %.sroa.0.0.copyload.i.i, %230 @@ -6098,45 +6101,45 @@ _ZN2pb6solver12process_cardERNS_4cardEj.exit.thread: ; preds = %.lr.ph, %178, %2 %276 = getelementptr inbounds nuw i8, ptr %268, i64 %275 %277 = load i8, ptr %276, align 1, !tbaa !227, !range !228, !noundef !229 %278 = trunc nuw i8 %277 to i1 - br i1 %278, label %279, label %284 + br i1 %278, label %291, label %285 -279: ; preds = %272 - %280 = load ptr, ptr %269, align 8, !tbaa !249 - %281 = getelementptr inbounds nuw %"class.sat::justification", ptr %280, i64 %275 - %282 = load i32, ptr %281, align 8, !tbaa !209 - %283 = icmp eq i32 %282, %270 - br i1 %283, label %297, label %284 +291: ; preds = %273 + %281 = load ptr, ptr %270, align 8, !tbaa !249 + %282 = getelementptr inbounds nuw %"class.sat::justification", ptr %281, i64 %276 + %283 = load i32, ptr %282, align 8, !tbaa !209 + %284 = icmp eq i32 %283, %271 + br i1 %284, label %298, label %285 -284: ; preds = %279, %272 - %285 = icmp eq i64 %indvars.iv165, 0 - br i1 %285, label %286, label %.split87 +285: ; preds = %280, %273 + %286 = icmp eq i64 %indvars.iv165, 0 + br i1 %286, label %287, label %.split87 -286: ; preds = %284 - %287 = call noundef i32 @_Z19get_verbosity_levelv() - %288 = icmp ugt i32 %287, 1 - br i1 %288, label %289, label %_ZN2pb6solver12process_cardERNS_4cardEj.exit +287: ; preds = %285 + %288 = call noundef i32 @_Z19get_verbosity_levelv() + %289 = icmp ugt i32 %288, 1 + br i1 %289, label %290, label %_ZN2pb6solver12process_cardERNS_4cardEj.exit -289: ; preds = %286 - %290 = call noundef zeroext i1 @_Z11is_threadedv() - br i1 %290, label %291, label %294 +290: ; preds = %287 + %291 = call noundef zeroext i1 @_Z11is_threadedv() + br i1 %291, label %292, label %295 -291: ; preds = %289 +292: ; preds = %290 call void @_Z12verbose_lockv() %292 = call noundef nonnull align 8 dereferenceable(8) ptr @_Z14verbose_streamv() %293 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l(ptr noundef nonnull align 8 dereferenceable(8) %292, ptr noundef nonnull @.str.43, i64 noundef 28) call void @_Z14verbose_unlockv() br label %_ZN2pb6solver12process_cardERNS_4cardEj.exit -294: ; preds = %289 +294: ; preds = %290 %295 = call noundef nonnull align 8 dereferenceable(8) ptr @_Z14verbose_streamv() %296 = call noundef nonnull align 8 dereferenceable(8) ptr @_ZSt16__ostream_insertIcSt11char_traitsIcEERSt13basic_ostreamIT_T0_ES6_PKS3_l(ptr noundef nonnull align 8 dereferenceable(8) %295, ptr noundef nonnull @.str.43, i64 noundef 28) br label %_ZN2pb6solver12process_cardERNS_4cardEj.exit -.split87: ; preds = %284 +.split87: ; preds = %285 %indvars.iv.next166 = add nsw i64 %indvars.iv165, -1 br label %272, !llvm.loop !329 -297: ; preds = %279 +297: ; preds = %291 %298 = getelementptr inbounds nuw i8, ptr %268, i64 %275 %299 = trunc nuw i64 %indvars.iv165 to i32 store i8 0, ptr %298, align 1, !tbaa !227 @@ -6144,7 +6147,7 @@ _ZN2pb6solver12process_cardERNS_4cardEj.exit.thread: ; preds = %.lr.ph, %178, %2 %301 = load i32, ptr %31, align 8, !tbaa !312 %302 = add i32 %301, -1 store i32 %302, ptr %31, align 8, !tbaa !312 - call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(20) %2, ptr noundef nonnull align 8 dereferenceable(20) %281, i64 20, i1 false), !tbaa.struct !319 + call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 8 dereferenceable(20) %2, ptr noundef nonnull align 8 dereferenceable(20) %282, i64 20, i1 false), !tbaa.struct !319 %303 = load ptr, ptr %55, align 8, !tbaa !306 %304 = icmp eq ptr %303, null br i1 %304, label %_ZNK2pb6solver13get_abs_coeffEj.exit, label %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.i @@ -6163,7 +6166,7 @@ _ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.then.i: ; preds = %_ZNK6vectorIlLb0EjE br label %_ZNK2pb6solver13get_abs_coeffEj.exit _ZNK2pb6solver13get_abs_coeffEj.exit: ; preds = %297, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.i, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.then.i - %310 = phi i64 [ 0, %297 ], [ %309, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.then.i ], [ 0, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.i ] + %310 = phi i64 [ 0, %298 ], [ %309, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.then.i ], [ 0, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i.i ] %311 = trunc i64 %310 to i32 %312 = icmp samesign ugt i64 %310, 4294967295 %313 = load i8, ptr %16, align 4, !tbaa !309, !range !228, !noundef !229 @@ -6195,7 +6198,7 @@ _ZNK2pb6solver9get_coeffEj.exit: ; preds = %_ZNK6vectorIlLb0EjE br label %_ZNK2pb6solver9get_coeffEj.exit.thread _ZNK2pb6solver9get_coeffEj.exit.thread: ; preds = %_ZNK2pb6solver9get_coeffEj.exit, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i, %318 - %326 = phi i64 [ %319, %318 ], [ %319, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i ], [ %spec.select, %_ZNK2pb6solver9get_coeffEj.exit ] + %326 = phi i64 [ %319, %319 ], [ %319, %_ZNK6vectorIlLb0EjE4sizeEv.exit.i.i ], [ %spec.select, %_ZNK2pb6solver9get_coeffEj.exit ] %327 = getelementptr inbounds nuw i64, ptr %303, i64 %275 store i64 %326, ptr %327, align 8, !tbaa !308 br label %328 @@ -6213,8 +6216,8 @@ _ZNK2pb6solver9get_coeffEj.exit.thread: ; preds = %_ZNK2pb6solver9get_ %332 = call noundef ptr @_ZN2pb6solver12active2lemmaEv(ptr noundef nonnull align 8 dereferenceable(1049) %0) br label %340 -_ZN2pb6solver12process_cardERNS_4cardEj.exit: ; preds = %180, %286, %294, %291, %329, %62, %73, %67 - %.178 = phi i32 [ %.077, %67 ], [ %.077, %73 ], [ %.077, %62 ], [ %300, %329 ], [ 0, %291 ], [ 0, %294 ], [ 0, %286 ], [ %.077, %180 ] +_ZN2pb6solver12process_cardERNS_4cardEj.exit: ; preds = %180, %287, %294, %292, %329, %62, %73, %67 + %.178 = phi i32 [ %.077, %67 ], [ %.077, %73 ], [ %.077, %62 ], [ %300, %330 ], [ 0, %292 ], [ 0, %295 ], [ 0, %287 ], [ %.077, %180 ] %333 = load i8, ptr %16, align 4, !tbaa !309, !range !228, !noundef !229 %334 = trunc nuw i8 %333 to i1 br i1 %334, label %335, label %339 @@ -6232,13 +6235,13 @@ _ZN2pb6solver12process_cardERNS_4cardEj.exit: ; preds = %180, %286, %294, %2 br label %340 340: ; preds = %331, %339, %_ZN2pb6solver12reset_coeffsEv.exit - %.1 = phi i32 [ 0, %_ZN2pb6solver12reset_coeffsEv.exit ], [ 0, %339 ], [ 1, %331 ] + %.1 = phi i32 [ 0, %_ZN2pb6solver12reset_coeffsEv.exit ], [ 0, %340 ], [ 1, %332 ] call void @llvm.lifetime.end.p0(ptr nonnull %3) call void @llvm.lifetime.end.p0(ptr nonnull %2) br label %341 341: ; preds = %1, %340, %13 - %.0 = phi i32 [ %14, %13 ], [ %.1, %340 ], [ 0, %1 ] + %.0 = phi i32 [ %14, %13 ], [ %.1, %341 ], [ 0, %1 ] ret i32 %.0 } @@ -7164,13 +7167,17 @@ define hidden void @_ZN2pb6solver12process_cardERNS_4cardEj(ptr noundef nonnull %18 = icmp samesign ult i64 %indvars.iv.next, %17 br i1 %18, label %14, label %.preheader.loopexit, !llvm.loop !327 -._crit_edge: ; preds = %19, %.preheader - %.lcssa = phi i32 [ 0, %.preheader ], [ %21, %19 ] +._crit_edge: ; preds = %19 + %19 = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %2, i32 %22) + br label %._crit_edge + +._crit_edge: ; preds = %._crit_edge.loopexit, %.preheader + %.lcssa = phi { i32, i1 } [ zeroinitializer, %.preheader ], [ %19, %._crit_edge.loopexit ] %.not = icmp eq i32 %.sroa.0.0.copyload.i, -2 br i1 %.not, label %34, label %24 19: ; preds = %.lr.ph30, %19 - %indvars.iv34 = phi i64 [ 0, %.lr.ph30 ], [ %indvars.iv.next35, %19 ] + %indvars.iv34 = phi i64 [ 0, %.lr.ph30 ], [ %indvars.iv.next35, %20 ] %20 = getelementptr inbounds nuw %"class.sat::literal", ptr %13, i64 %indvars.iv34 %.sroa.06.0.copyload = load i32, ptr %20, align 4, !tbaa !78 tail call void @_ZN2pb6solver9inc_coeffEN3sat7literalEj(ptr noundef nonnull align 8 dereferenceable(1049) %0, i32 %.sroa.06.0.copyload, i32 noundef %2) @@ -7181,10 +7188,9 @@ define hidden void @_ZN2pb6solver12process_cardERNS_4cardEj(ptr noundef nonnull br i1 %23, label %19, label %._crit_edge, !llvm.loop !328 24: ; preds = %._crit_edge - %umul = tail call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %2, i32 %.lcssa) - %umul.value = extractvalue { i32, i1 } %umul, 0 - %25 = extractvalue { i32, i1 } %umul, 1 - br i1 %25, label %26, label %.sink.split + %umul.value = extractvalue { i32, i1 } %.lcssa, 0 + %umul.value = extractvalue { i32, i1 } %.lcssa, 1 + br i1 %umul.value, label %27, label %.sink.split 26: ; preds = %24 %27 = getelementptr inbounds nuw i8, ptr %0, i64 996 @@ -7195,7 +7201,7 @@ define hidden void @_ZN2pb6solver12process_cardERNS_4cardEj(ptr noundef nonnull %28 = load ptr, ptr %0, align 8, !tbaa !79 %29 = getelementptr inbounds nuw i8, ptr %28, i64 536 %30 = load ptr, ptr %29, align 8 - %31 = tail call noundef i32 %30(ptr noundef nonnull align 8 dereferenceable(1049) %0, i32 %.sroa.0.0.copyload.i) + %31 = tail call noundef i32 %31(ptr noundef nonnull align 8 dereferenceable(1049) %0, i32 %.sroa.0.0.copyload.i) %32 = icmp eq i32 %31, 1 %33 = zext i1 %32 to i32 %.sink = xor i32 %.sroa.0.0.copyload.i, %33 diff --git a/bench/z3/optimized/qe_lite_tactic.ll b/bench/z3/optimized/qe_lite_tactic.ll index f0cb88ea054..43188ab3e97 100644 --- a/bench/z3/optimized/qe_lite_tactic.ll +++ b/bench/z3/optimized/qe_lite_tactic.ll @@ -34058,8 +34058,8 @@ _ZNK6vectorIcLb0EjE3endEv.exit.i.i.i.i: ; preds = %.noexc br label %124 36: ; preds = %.lr.ph, %79 - %37 = phi ptr [ null, %.lr.ph ], [ %80, %79 ] - %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %79 ] + %37 = phi ptr [ null, %.lr.ph ], [ %80, %80 ] + %indvars.iv = phi i64 [ 0, %.lr.ph ], [ %indvars.iv.next, %80 ] %38 = load ptr, ptr %10, align 8, !tbaa !352 %39 = getelementptr inbounds nuw i8, ptr %38, i64 %indvars.iv %40 = load i8, ptr %39, align 1, !tbaa !368 @@ -34084,22 +34084,22 @@ _ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 %50 = getelementptr inbounds nuw %class.ptr_vector.20, ptr %49, i64 %indvars.iv %51 = load ptr, ptr %50, align 8, !tbaa !314 %52 = icmp eq ptr %51, null - br i1 %52, label %56, label %53 + br i1 %52, label %57, label %53 53: ; preds = %_ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i %54 = getelementptr inbounds i8, ptr %51, i64 -4 %55 = load i32, ptr %54, align 4, !tbaa !201 - br label %56 + %56 = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %.0.i.i16, i32 %55) + br label %57 -56: ; preds = %53, %_ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i - %.0.i6.i = phi i32 [ %55, %53 ], [ 0, %_ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i ] - %umul.i = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 %.0.i.i16, i32 %.0.i6.i) - %57 = extractvalue { i32, i1 } %umul.i, 1 - %umul.value.i = extractvalue { i32, i1 } %umul.i, 0 +57: ; preds = %53, %_ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i + %.0.i6.i = phi { i32, i1 } [ %56, %53 ], [ zeroinitializer, %_ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i ] + %57 = extractvalue { i32, i1 } %.0.i6.i, 1 + %umul.value.i = extractvalue { i32, i1 } %.0.i6.i, 0 %58 = icmp eq ptr %37, null br i1 %58, label %65, label %59 -59: ; preds = %56 +59: ; preds = %57 %60 = getelementptr inbounds i8, ptr %37, i64 -4 %61 = load i32, ptr %60, align 4, !tbaa !201 %62 = getelementptr inbounds i8, ptr %37, i64 -8 @@ -34107,7 +34107,7 @@ _ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 %64 = icmp eq i32 %61, %63 br i1 %64, label %65, label %66 -65: ; preds = %59, %56 +65: ; preds = %59, %57 invoke void @_ZN6vectorISt4pairIjjELb0EjE13expand_vectorEv(ptr noundef nonnull align 8 dereferenceable(8) %3) to label %.noexc17 unwind label %77 @@ -34118,8 +34118,8 @@ _ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 br label %66 66: ; preds = %.noexc17, %59 - %67 = phi i32 [ %.pre2.i, %.noexc17 ], [ %61, %59 ] - %68 = phi ptr [ %.pre.i, %.noexc17 ], [ %37, %59 ] + %67 = phi i32 [ %.pre2.i, %.noexc17 ], [ %61, %60 ] + %68 = phi ptr [ %.pre.i, %.noexc17 ], [ %37, %60 ] %69 = zext i32 %67 to i64 %70 = getelementptr inbounds nuw %"struct.std::pair.115", ptr %68, i64 %69 %71 = zext i32 %umul.value.i to i64 @@ -34140,7 +34140,7 @@ _ZNK6vectorIPN3qel2fm10constraintELb0EjE4sizeEv.exit.i: ; preds = %46, %41 br label %124 79: ; preds = %36, %66 - %80 = phi ptr [ %37, %36 ], [ %73, %66 ] + %80 = phi ptr [ %37, %36 ], [ %73, %67 ] %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 %exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count br i1 %exitcond.not, label %._crit_edge, label %36, !llvm.loop !522 @@ -34149,7 +34149,7 @@ _ZN3qel2fm2fm9x_cost_ltC2ER7svectorIcjE.exit: ; preds = %_ZN6vectorISt4pairI %81 = phi ptr [ null, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit.thread ], [ %18, %32 ], [ %18, %_ZNK6vectorIcLb0EjE3endEv.exit.i.i.i.i ], [ %18, %.noexc ], [ %18, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit ] %82 = phi ptr [ null, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit.thread ], [ %.ph, %32 ], [ %.ph, %_ZNK6vectorIcLb0EjE3endEv.exit.i.i.i.i ], [ %.ph, %.noexc ], [ %.ph, %_ZN6vectorISt4pairIjjELb0EjE3endEv.exit ] invoke void @_ZSt11stable_sortIPSt4pairIjjEN3qel2fm2fm9x_cost_ltEEvT_S7_T0_(ptr noundef %82, ptr noundef %81, ptr noundef nonnull %4) - to label %83 unwind label %102 + to label %84 unwind label %102 83: ; preds = %_ZN3qel2fm2fm9x_cost_ltC2ER7svectorIcjE.exit %84 = load ptr, ptr %4, align 8, !tbaa !352 @@ -34215,8 +34215,8 @@ _ZN6vectorISt4pairIjjELb0EjED2Ev.exit: ; preds = %_ZN3qel2fm2fm9x_cos br label %124 .lr.ph32: ; preds = %.lr.ph32.preheader, %113 - %104 = phi ptr [ %114, %113 ], [ %.pre, %.lr.ph32.preheader ] - %.01231 = phi ptr [ %121, %113 ], [ %90, %.lr.ph32.preheader ] + %104 = phi ptr [ %114, %114 ], [ %.pre, %.lr.ph32.preheader ] + %.01231 = phi ptr [ %121, %114 ], [ %90, %.lr.ph32.preheader ] %105 = icmp eq ptr %104, null br i1 %105, label %112, label %106 @@ -34239,8 +34239,8 @@ _ZN6vectorISt4pairIjjELb0EjED2Ev.exit: ; preds = %_ZN3qel2fm2fm9x_cos br label %113 113: ; preds = %.noexc24, %106 - %114 = phi ptr [ %.pre.i21, %.noexc24 ], [ %104, %106 ] - %115 = phi i32 [ %.pre2.i23, %.noexc24 ], [ %108, %106 ] + %114 = phi ptr [ %.pre.i21, %.noexc24 ], [ %104, %107 ] + %115 = phi i32 [ %.pre2.i23, %.noexc24 ], [ %108, %107 ] %116 = getelementptr inbounds i8, ptr %114, i64 -4 %117 = zext i32 %115 to i64 %118 = getelementptr inbounds nuw i32, ptr %114, i64 %117 @@ -34258,7 +34258,7 @@ _ZN6vectorISt4pairIjjELb0EjED2Ev.exit: ; preds = %_ZN3qel2fm2fm9x_cos br label %124 124: ; preds = %122, %102, %77, %34 - %.pn = phi { ptr, i32 } [ %78, %77 ], [ %123, %122 ], [ %103, %102 ], [ %35, %34 ] + %.pn = phi { ptr, i32 } [ %78, %78 ], [ %123, %123 ], [ %103, %103 ], [ %35, %34 ] call void @_ZN6vectorISt4pairIjjELb0EjED2Ev(ptr noundef nonnull align 8 dereferenceable(8) %3) #26 call void @llvm.lifetime.end.p0(ptr nonnull %3) resume { ptr, i32 } %.pn diff --git a/scripts/setup_pre_commit_patch.sh b/scripts/setup_pre_commit_patch.sh index c8d0fce0bf7..7ffe09f30ef 100755 --- a/scripts/setup_pre_commit_patch.sh +++ b/scripts/setup_pre_commit_patch.sh @@ -2,7 +2,7 @@ set -euo pipefail shopt -s inherit_errexit -export GITHUB_PATCH_ID="/llvm-project/commit/" +export GITHUB_PATCH_ID=llvm/llvm-project/pull/164388 export COMPTIME_MODE=0 export STAT_MODE=0 export STAT_NAME=""