@@ -68,7 +68,7 @@ AggressiveAntiDepState::AggressiveAntiDepState(const unsigned TargetRegs,
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}
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unsigned AggressiveAntiDepState::GetGroup (MCRegister Reg) {
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- unsigned Node = GroupNodeIndices[Reg];
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+ unsigned Node = GroupNodeIndices[Reg. id () ];
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while (GroupNodes[Node] != Node)
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Node = GroupNodes[Node];
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@@ -106,14 +106,14 @@ unsigned AggressiveAntiDepState::LeaveGroup(MCRegister Reg) {
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// it.
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unsigned idx = GroupNodes.size ();
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GroupNodes.push_back (idx);
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- GroupNodeIndices[Reg] = idx;
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+ GroupNodeIndices[Reg. id () ] = idx;
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return idx;
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}
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bool AggressiveAntiDepState::IsLive (MCRegister Reg) {
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// KillIndex must be defined and DefIndex not defined for a register
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// to be live.
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- return ((KillIndices[Reg] != ~0u ) && (DefIndices[Reg] == ~0u ));
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+ return ((KillIndices[Reg. id () ] != ~0u ) && (DefIndices[Reg. id () ] == ~0u ));
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}
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AggressiveAntiDepBreaker::AggressiveAntiDepBreaker (
@@ -154,10 +154,10 @@ void AggressiveAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
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for (MachineBasicBlock *Succ : BB->successors ())
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for (const auto &LI : Succ->liveins ()) {
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for (MCRegAliasIterator AI (LI.PhysReg , TRI, true ); AI.isValid (); ++AI) {
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- unsigned Reg = *AI;
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+ MCRegister Reg = *AI;
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State->UnionGroups (Reg, 0 );
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- KillIndices[Reg] = BB->size ();
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- DefIndices[Reg] = ~0u ;
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+ KillIndices[Reg. id () ] = BB->size ();
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+ DefIndices[Reg. id () ] = ~0u ;
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}
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}
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@@ -174,8 +174,8 @@ void AggressiveAntiDepBreaker::StartBlock(MachineBasicBlock *BB) {
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for (MCRegAliasIterator AI (Reg, TRI, true ); AI.isValid (); ++AI) {
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MCRegister AliasReg = *AI;
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State->UnionGroups (AliasReg, 0 );
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- KillIndices[AliasReg] = BB->size ();
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- DefIndices[AliasReg] = ~0u ;
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+ KillIndices[AliasReg. id () ] = BB->size ();
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+ DefIndices[AliasReg. id () ] = ~0u ;
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}
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}
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}
@@ -307,8 +307,8 @@ void AggressiveAntiDepBreaker::HandleLastUse(MCRegister Reg, unsigned KillIdx,
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}
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if (!State->IsLive (Reg)) {
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- KillIndices[Reg] = KillIdx;
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- DefIndices[Reg] = ~0u ;
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+ KillIndices[Reg. id () ] = KillIdx;
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+ DefIndices[Reg. id () ] = ~0u ;
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RegRefs.erase (Reg);
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State->LeaveGroup (Reg);
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LLVM_DEBUG (if (header) {
@@ -651,7 +651,7 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
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LLVM_DEBUG (dbgs () << " " << printReg (NewReg, TRI));
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// Check if Reg can be renamed to NewReg.
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- if (!RenameRegisterMap[Reg].test (NewReg)) {
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+ if (!RenameRegisterMap[Reg].test (NewReg. id () )) {
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LLVM_DEBUG (dbgs () << " (no rename)" );
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goto next_super_reg;
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}
@@ -660,15 +660,16 @@ bool AggressiveAntiDepBreaker::FindSuitableFreeRegisters(
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// Regs's kill, it's safe to replace Reg with NewReg. We
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// must also check all aliases of NewReg, because we can't define a
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// register when any sub or super is already live.
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- if (State->IsLive (NewReg) || (KillIndices[Reg] > DefIndices[NewReg])) {
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+ if (State->IsLive (NewReg) ||
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+ (KillIndices[Reg.id ()] > DefIndices[NewReg.id ()])) {
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LLVM_DEBUG (dbgs () << " (live)" );
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goto next_super_reg;
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} else {
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bool found = false ;
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for (MCRegAliasIterator AI (NewReg, TRI, false ); AI.isValid (); ++AI) {
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MCRegister AliasReg = *AI;
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if (State->IsLive (AliasReg) ||
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- (KillIndices[Reg] > DefIndices[AliasReg])) {
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+ (KillIndices[Reg. id () ] > DefIndices[AliasReg. id () ])) {
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LLVM_DEBUG (dbgs ()
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<< " (alias " << printReg (AliasReg, TRI) << " live)" );
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found = true ;
@@ -940,15 +941,15 @@ unsigned AggressiveAntiDepBreaker::BreakAntiDependencies(
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// the state as if it were dead.
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State->UnionGroups (NewReg, 0 );
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RegRefs.erase (NewReg);
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- DefIndices[NewReg] = DefIndices[CurrReg];
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- KillIndices[NewReg] = KillIndices[CurrReg];
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+ DefIndices[NewReg. id () ] = DefIndices[CurrReg. id () ];
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+ KillIndices[NewReg. id () ] = KillIndices[CurrReg. id () ];
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State->UnionGroups (CurrReg, 0 );
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RegRefs.erase (CurrReg);
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- DefIndices[CurrReg] = KillIndices[CurrReg];
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- KillIndices[CurrReg] = ~0u ;
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- assert (((KillIndices[CurrReg] == ~0u ) !=
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- (DefIndices[CurrReg] == ~0u )) &&
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+ DefIndices[CurrReg. id () ] = KillIndices[CurrReg. id () ];
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+ KillIndices[CurrReg. id () ] = ~0u ;
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+ assert (((KillIndices[CurrReg. id () ] == ~0u ) !=
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+ (DefIndices[CurrReg. id () ] == ~0u )) &&
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" Kill and Def maps aren't consistent for AntiDepReg!" );
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}
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