Adjust the PSRAM clock when over/underclock F_SYS (#2824)

* Adjust the PSRAM clock when over/underclock F_SYS

Fixes #2818

* Need to increase PSRAM divider before sysclk increase

Per datasheet, when increasing sysclk speed we need to set the qmi
clocks first and do a dummy transfer to ensure no invalid speed
operations happen on the bus.  Handle the logic for this while setting
up the overclock.

Author: earlephilhower

cores/rp2040/main.cpp

@@ -23,6 +23,9 @@
 #include <pico/stdlib.h>
 #include <pico/multicore.h>
 #include <reent.h>
+#ifdef RP2350_PSRAM_CS
+#include "psram.h"
+#endif
 
 RP2040 rp2040;
 extern "C" {
@@ -80,7 +83,26 @@ static struct _reent *_impure_ptr1 = nullptr;
 
 extern "C" int main() {
 #if (defined(PICO_RP2040) && (F_CPU != 125000000)) || (defined(PICO_RP2350) && (F_CPU != 150000000))
+#if defined(RP2350_PSRAM_CS) && (F_CPU > 150000000)
+    // Need to increase the qmi divider before upping sysclk to ensure we keep the output sck w/in legal bounds
+    psram_reinit_timing(F_CPU);
+    // Per datasheet, need to do a dummy access and memory barrier before it takes effect
+    extern uint8_t __psram_start__;
+    volatile uint8_t *x = &__psram_start__;
+    *x ^= 0xff;
+    *x ^= 0xff;
+    asm volatile("" ::: "memory");
+#endif
     set_sys_clock_khz(F_CPU / 1000, true);
+#if defined(RP2350_PSRAM_CS) && (F_CPU < 150000000)
+    psram_reinit_timing();
+    // Per datasheet, need to do a dummy access and memory barrier before it takes effect
+    extern uint8_t __psram_start__;
+    volatile uint8_t *x = &__psram_start__;
+    *x ^= 0xff;
+    *x ^= 0xff;
+    asm volatile("" ::: "memory");
+#endif
 #endif
 
     // Let rest of core know if we're using FreeRTOS

cores/rp2040/psram.cpp

@@ -195,10 +195,7 @@ static size_t __no_inline_not_in_flash_func(get_psram_size)(void) {
 ///
 /// @note This function expects interrupts to be enabled on entry
 
-static void __no_inline_not_in_flash_func(set_psram_timing)(void) {
-    // Get secs / cycle for the system clock - get before disabling interrupts.
-    uint32_t sysHz = (uint32_t)clock_get_hz(clk_sys);
-
+static void __no_inline_not_in_flash_func(set_psram_timing)(uint32_t sysHz) {
     // Calculate the clock divider - goal to get clock used for PSRAM <= what
     // the PSRAM IC can handle - which is defined in SFE_PSRAM_MAX_SCK_HZ
     volatile uint8_t clockDivider = (sysHz + SFE_PSRAM_MAX_SCK_HZ - 1) / SFE_PSRAM_MAX_SCK_HZ;
@@ -283,7 +280,7 @@ static void __no_inline_not_in_flash_func(runtime_init_setup_psram)(/*uint32_t p
 
     // check our interrupts and setup the timing
     restore_interrupts(intr_stash);
-    set_psram_timing();
+    set_psram_timing((uint32_t)clock_get_hz(clk_sys));
 
     // and now stash interrupts again
     intr_stash = save_and_disable_interrupts();
@@ -323,8 +320,11 @@ static void __no_inline_not_in_flash_func(runtime_init_setup_psram)(/*uint32_t p
 PICO_RUNTIME_INIT_FUNC_RUNTIME(runtime_init_setup_psram, PICO_RUNTIME_INIT_PSRAM);
 
 // update timing -- used if the system clock/timing was changed.
-void psram_reinit_timing() {
-    set_psram_timing();
+void psram_reinit_timing(uint32_t hz) {
+    if (!hz) {
+        hz = (uint32_t)clock_get_hz(clk_sys);
+    }
+    set_psram_timing(hz);
 }
 
 static bool __psram_heap_init() {

cores/rp2040/psram.h

@@ -31,7 +31,7 @@
 
 #include <Arduino.h>
 
-void psram_reinit_timing();
+void psram_reinit_timing(uint32_t hz = 0);
 void *__psram_malloc(size_t size);
 void __psram_free(void *ptr);
 void *__psram_realloc(void *ptr, size_t size);