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nascs
authored and
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platform: adjusting the order of pwm pins of radxa borads
Signed-off-by: Nascs <[email protected]>
1 parent 258bfcf commit 4e11858

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6 files changed

+78
-78
lines changed

6 files changed

+78
-78
lines changed

‎src/arm/radxa_cm3.c‎

Lines changed: 10 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -96,24 +96,24 @@ mraa_radxa_cm3()
9696
return NULL;
9797
}
9898

99-
b->pins[13].pwm.parent_id = 0; // pwm0-m0
100-
b->pins[13].pwm.mux_total = 0;
101-
b->pins[11].pwm.parent_id = 0; // pwm0-m1
102-
b->pins[11].pwm.mux_total = 0;
103-
b->pins[5].pwm.parent_id = 1; // pwm1-m1
104-
b->pins[5].pwm.mux_total = 0;
10599
b->pins[3].pwm.parent_id = 2; // pwm2-m1
106100
b->pins[3].pwm.mux_total = 0;
107-
b->pins[37].pwm.parent_id = 3; // pwm3
108-
b->pins[37].pwm.mux_total = 0;
101+
b->pins[5].pwm.parent_id = 1; // pwm1-m1
102+
b->pins[5].pwm.mux_total = 0;
103+
b->pins[11].pwm.parent_id = 0; // pwm0-m1
104+
b->pins[11].pwm.mux_total = 0;
105+
b->pins[13].pwm.parent_id = 0; // pwm0-m0
106+
b->pins[13].pwm.mux_total = 0;
109107
b->pins[15].pwm.parent_id = 4; // pwm4
110108
b->pins[15].pwm.mux_total = 0;
111109
b->pins[31].pwm.parent_id = 6; // pwm6
112110
b->pins[31].pwm.mux_total = 0;
113-
b->pins[33].pwm.parent_id = 15; // pwm7
114-
b->pins[33].pwm.mux_total = 0;
115111
b->pins[32].pwm.parent_id = 11; // pwm11-m1
116112
b->pins[32].pwm.mux_total = 0;
113+
b->pins[33].pwm.parent_id = 15; // pwm7
114+
b->pins[33].pwm.mux_total = 0;
115+
b->pins[37].pwm.parent_id = 3; // pwm3
116+
b->pins[37].pwm.mux_total = 0;
117117

118118
mraa_radxa_cm3_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
119119
mraa_radxa_cm3_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3.3V");

‎src/arm/radxa_cm5_io.c‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -90,27 +90,27 @@ mraa_radxa_cm5_io()
9090
return NULL;
9191
}
9292

93-
b->pins[38].pwm.parent_id = 0; // PWM0-M1
94-
b->pins[38].pwm.mux_total = 0;
95-
b->pins[38].pwm.pinmap = 0;
96-
b->pins[31].pwm.parent_id = 6; // PWM6-M0
97-
b->pins[31].pwm.mux_total = 0;
98-
b->pins[31].pwm.pinmap = 0;
99-
b->pins[29].pwm.parent_id = 7; // PWM7-M0
100-
b->pins[29].pwm.mux_total = 0;
101-
b->pins[29].pwm.pinmap = 0;
10293
b->pins[16].pwm.parent_id = 11; // PWM11-M0
10394
b->pins[16].pwm.mux_total = 0;
10495
b->pins[16].pwm.pinmap = 0;
105-
b->pins[32].pwm.parent_id = 13; // PWM13-M2
106-
b->pins[32].pwm.mux_total = 0;
107-
b->pins[32].pwm.pinmap = 0;
10896
b->pins[24].pwm.parent_id = 11; // PWM14-M1
10997
b->pins[24].pwm.mux_total = 0;
11098
b->pins[24].pwm.pinmap = 0;
99+
b->pins[29].pwm.parent_id = 7; // PWM7-M0
100+
b->pins[29].pwm.mux_total = 0;
101+
b->pins[29].pwm.pinmap = 0;
102+
b->pins[31].pwm.parent_id = 6; // PWM6-M0
103+
b->pins[31].pwm.mux_total = 0;
104+
b->pins[31].pwm.pinmap = 0;
105+
b->pins[32].pwm.parent_id = 13; // PWM13-M2
106+
b->pins[32].pwm.mux_total = 0;
107+
b->pins[32].pwm.pinmap = 0;
111108
b->pins[36].pwm.parent_id = 15; // PWM15-M2
112109
b->pins[36].pwm.mux_total = 0;
113110
b->pins[36].pwm.pinmap = 0;
111+
b->pins[38].pwm.parent_id = 0; // PWM0-M1
112+
b->pins[38].pwm.mux_total = 0;
113+
b->pins[38].pwm.pinmap = 0;
114114

115115
// AIO
116116
b->aio_count = MRAA_RADXA_CM5_IO_AIO_COUNT;

‎src/arm/radxa_rock_3a.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -101,12 +101,18 @@ mraa_radxa_rock_3a()
101101

102102
b->pins[7].pwm.parent_id = 12; // PWM12_M0
103103
b->pins[7].pwm.mux_total = 0;
104+
b->pins[7].pwm.parent_id = 1; // PWM1_M1
105+
b->pins[7].pwm.mux_total = 0;
104106
b->pins[11].pwm.parent_id = 14; // PWM14_M0
105107
b->pins[11].pwm.mux_total = 0;
106108
b->pins[13].pwm.parent_id = 15; // PWM15_IR_M0
107109
b->pins[13].pwm.mux_total = 0;
108110
b->pins[15].pwm.parent_id = 1; // PWM1_M0
109111
b->pins[15].pwm.mux_total = 0;
112+
b->pins[16].pwm.parent_id = 2; // PWM2_M1
113+
b->pins[16].pwm.mux_total = 0;
114+
b->pins[18].pwm.parent_id = 9; // PWM9_M0
115+
b->pins[18].pwm.mux_total = 0;
110116
b->pins[19].pwm.parent_id = 15; // PWM15_IR_M1
111117
b->pins[19].pwm.mux_total = 0;
112118
b->pins[21].pwm.parent_id = 12; // PWM12_M1
@@ -115,12 +121,6 @@ mraa_radxa_rock_3a()
115121
b->pins[23].pwm.mux_total = 0;
116122
b->pins[24].pwm.parent_id = 13; // PWM13_M1
117123
b->pins[24].pwm.mux_total = 0;
118-
b->pins[18].pwm.parent_id = 9; // PWM9_M0
119-
b->pins[18].pwm.mux_total = 0;
120-
b->pins[16].pwm.parent_id = 2; // PWM2_M1
121-
b->pins[16].pwm.mux_total = 0;
122-
b->pins[7].pwm.parent_id = 1; // PWM1_M1
123-
b->pins[7].pwm.mux_total = 0;
124124

125125
// hardware V1.3/V1.31
126126
mraa_radxa_rock_3a_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");

‎src/arm/radxa_rock_3b.c‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -97,28 +97,28 @@ mraa_radxa_rock_3b()
9797
return NULL;
9898
}
9999

100-
b->pins[15].pwm.parent_id = 1; // pwm1-m0
101-
b->pins[15].pwm.mux_total = 0;
102100
b->pins[7].pwm.parent_id = 1; // pwm1-m1
103101
b->pins[7].pwm.mux_total = 0;
104-
b->pins[22].pwm.parent_id = 2; // pwm2-m0
105-
b->pins[22].pwm.mux_total = 0;
102+
b->pins[11].pwm.parent_id = 14; // pwm14-m0
103+
b->pins[11].pwm.mux_total = 0;
104+
b->pins[13].pwm.parent_id = 15; // pwm15-m0
105+
b->pins[13].pwm.mux_total = 0;
106+
b->pins[15].pwm.parent_id = 1; // pwm1-m0
107+
b->pins[15].pwm.mux_total = 0;
106108
b->pins[16].pwm.parent_id = 2; // pwm2-m1
107109
b->pins[16].pwm.mux_total = 0;
108110
b->pins[18].pwm.parent_id = 9; // pwm9-m0
109111
b->pins[18].pwm.mux_total = 0;
112+
b->pins[19].pwm.parent_id = 15; // pwm15-m1
113+
b->pins[19].pwm.mux_total = 0;
110114
b->pins[21].pwm.parent_id = 12; // pwm12-m1
111115
b->pins[21].pwm.mux_total = 0;
112-
b->pins[24].pwm.parent_id = 13; // pwm13-m1
113-
b->pins[24].pwm.mux_total = 0;
114-
b->pins[11].pwm.parent_id = 14; // pwm14-m0
115-
b->pins[11].pwm.mux_total = 0;
116+
b->pins[22].pwm.parent_id = 2; // pwm2-m0
117+
b->pins[22].pwm.mux_total = 0;
116118
b->pins[23].pwm.parent_id = 14; // pwm14-m1
117119
b->pins[23].pwm.mux_total = 0;
118-
b->pins[13].pwm.parent_id = 15; // pwm15-m0
119-
b->pins[13].pwm.mux_total = 0;
120-
b->pins[19].pwm.parent_id = 15; // pwm15-m1
121-
b->pins[19].pwm.mux_total = 0;
120+
b->pins[24].pwm.parent_id = 13; // pwm13-m1
121+
b->pins[24].pwm.mux_total = 0;
122122

123123
mraa_radxa_rock_3b_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
124124
mraa_radxa_rock_3b_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");

‎src/arm/radxa_rock_3c.c‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -94,22 +94,22 @@ mraa_radxa_rock_3c()
9494
return NULL;
9595
}
9696

97+
b->pins[7].pwm.parent_id = 14; // pwm14-m0
98+
b->pins[7].pwm.mux_total = 0;
99+
b->pins[13].pwm.parent_id = 15; // pwm15-m0
100+
b->pins[13].pwm.mux_total = 0;
97101
b->pins[16].pwm.parent_id = 8; // pwm8-m0
98102
b->pins[16].pwm.mux_total = 0;
99103
b->pins[18].pwm.parent_id = 9; // pwm9-m0
100104
b->pins[18].pwm.mux_total = 0;
105+
b->pins[19].pwm.parent_id = 15; // pwm15-m1
106+
b->pins[19].pwm.mux_total = 0;
101107
b->pins[21].pwm.parent_id = 12; // pwm12-m1
102108
b->pins[21].pwm.mux_total = 0;
103-
b->pins[24].pwm.parent_id = 13; // pwm13-m1
104-
b->pins[24].pwm.mux_total = 0;
105-
b->pins[7].pwm.parent_id = 14; // pwm14-m0
106-
b->pins[7].pwm.mux_total = 0;
107109
b->pins[23].pwm.parent_id = 14; // pwm14-m1
108110
b->pins[23].pwm.mux_total = 0;
109-
b->pins[13].pwm.parent_id = 15; // pwm15-m0
110-
b->pins[13].pwm.mux_total = 0;
111-
b->pins[19].pwm.parent_id = 15; // pwm15-m1
112-
b->pins[19].pwm.mux_total = 0;
111+
b->pins[24].pwm.parent_id = 13; // pwm13-m1
112+
b->pins[24].pwm.mux_total = 0;
113113

114114
mraa_radxa_rock_3c_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
115115
mraa_radxa_rock_3c_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3");

‎src/arm/radxa_rock_5b.c‎

Lines changed: 30 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -87,48 +87,48 @@ mraa_radxa_rock_5b()
8787
return NULL;
8888
}
8989

90-
b->pins[36].pwm.parent_id = 2; // PWM2_M1
91-
b->pins[36].pwm.mux_total = 0;
92-
b->pins[36].pwm.pinmap = 0;
93-
b->pins[38].pwm.parent_id = 3; // PWM3_M1
94-
b->pins[38].pwm.mux_total = 0;
95-
b->pins[38].pwm.pinmap = 0;
90+
b->pins[3].pwm.parent_id = 15; // PWM15_M1
91+
b->pins[3].pwm.mux_total = 0;
92+
b->pins[3].pwm.pinmap = 0;
93+
b->pins[5].pwm.parent_id = 14; // PWM14_M2
94+
b->pins[5].pwm.mux_total = 0;
95+
b->pins[5].pwm.pinmap = 0;
96+
b->pins[7].pwm.parent_id = 15; // PWM15_M0
97+
b->pins[7].pwm.mux_total = 0;
98+
b->pins[7].pwm.pinmap = 0;
99+
b->pins[12].pwm.parent_id = 12; // PWM12_M0
100+
b->pins[12].pwm.mux_total = 0;
101+
b->pins[12].pwm.pinmap = 0;
96102
b->pins[18].pwm.parent_id = 5; // PWM5_M2
97103
b->pins[18].pwm.mux_total = 0;
98104
b->pins[18].pwm.pinmap = 0;
99-
b->pins[28].pwm.parent_id = 6; // PWM6_M2
100-
b->pins[28].pwm.mux_total = 0;
101-
b->pins[28].pwm.pinmap = 0;
102105
b->pins[27].pwm.parent_id = 7; // PWM7_M3
103106
b->pins[27].pwm.mux_total = 0;
104107
b->pins[27].pwm.pinmap = 0;
105-
b->pins[33].pwm.parent_id = 8; // PWM8_M0
106-
b->pins[33].pwm.mux_total = 0;
107-
b->pins[33].pwm.pinmap = 0;
108-
b->pins[12].pwm.parent_id = 12; // PWM12_M0
109-
b->pins[12].pwm.mux_total = 0;
110-
b->pins[12].pwm.pinmap = 0;
111-
b->pins[35].pwm.parent_id = 13; // PWM13_M0
112-
b->pins[35].pwm.mux_total = 0;
113-
b->pins[35].pwm.pinmap = 0;
108+
b->pins[28].pwm.parent_id = 6; // PWM6_M2
109+
b->pins[28].pwm.mux_total = 0;
110+
b->pins[28].pwm.pinmap = 0;
111+
b->pins[29].pwm.parent_id = 7; // PWM15_M3
112+
b->pins[29].pwm.mux_total = 0;
113+
b->pins[29].pwm.pinmap = 0;
114114
b->pins[31].pwm.parent_id = 13; // PWM13_M2
115115
b->pins[31].pwm.mux_total = 0;
116116
b->pins[31].pwm.pinmap = 0;
117117
b->pins[32].pwm.parent_id = 14; // PWM14_M0
118118
b->pins[32].pwm.mux_total = 0;
119119
b->pins[32].pwm.pinmap = 0;
120-
b->pins[5].pwm.parent_id = 14; // PWM14_M2
121-
b->pins[5].pwm.mux_total = 0;
122-
b->pins[5].pwm.pinmap = 0;
123-
b->pins[7].pwm.parent_id = 15; // PWM15_M0
124-
b->pins[7].pwm.mux_total = 0;
125-
b->pins[7].pwm.pinmap = 0;
126-
b->pins[3].pwm.parent_id = 15; // PWM15_M1
127-
b->pins[3].pwm.mux_total = 0;
128-
b->pins[3].pwm.pinmap = 0;
129-
b->pins[29].pwm.parent_id = 7; // PWM15_M3
130-
b->pins[29].pwm.mux_total = 0;
131-
b->pins[29].pwm.pinmap = 0;
120+
b->pins[33].pwm.parent_id = 8; // PWM8_M0
121+
b->pins[33].pwm.mux_total = 0;
122+
b->pins[33].pwm.pinmap = 0;
123+
b->pins[35].pwm.parent_id = 13; // PWM13_M0
124+
b->pins[35].pwm.mux_total = 0;
125+
b->pins[35].pwm.pinmap = 0;
126+
b->pins[36].pwm.parent_id = 2; // PWM2_M1
127+
b->pins[36].pwm.mux_total = 0;
128+
b->pins[36].pwm.pinmap = 0;
129+
b->pins[38].pwm.parent_id = 3; // PWM3_M1
130+
b->pins[38].pwm.mux_total = 0;
131+
b->pins[38].pwm.pinmap = 0;
132132

133133
b->aio_count = MRAA_RADXA_ROCK_5B_AIO_COUNT;
134134
b->adc_raw = 10;

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