Skip to content

Commit 60d99f1

Browse files
nascstingleby
nascs
authored and
tingleby
committed
platform: add radxa e25 support
Signed-off-by: Nascs <[email protected]>
1 parent 3022803 commit 60d99f1

File tree

10 files changed

+271
-0
lines changed

10 files changed

+271
-0
lines changed

‎README.md‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -46,6 +46,7 @@ ARM
4646
* [96Boards](../master/docs/96boards.md)
4747
* [ADLINK IPi-SMARC ARM](../master/docs/adlink_ipi_arm.md)
4848
* [Radxa CM3](../master/docs/radxa_cm3.md)
49+
* [Radxa E25](../master/docs/radxa_e25.md)
4950
* [Radxa ROCK 3A](../master/docs/radxa_rock_3a.md)
5051
* [Radxa ROCK 3B](../master/docs/radxa_rock_3b.md)
5152
* [Radxa ROCK 3C](../master/docs/radxa_rock_3c.md)

‎api/mraa/types.h‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -78,6 +78,7 @@ typedef enum {
7878
MRAA_RADXA_CM3 = 33, /**< Radxa CM3 */
7979
MRAA_RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
8080
MRAA_RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
81+
MRAA_RADXA_E25 = 36, /**< Radxa E25 */
8182

8283
// USB platform extenders start at 256
8384
MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
@@ -416,6 +417,30 @@ typedef enum {
416417
MRAA_RADXA_CM3_IO_PIN40 = 40
417418
} mraa_radxa_cm3_io_wiring_t;
418419

420+
/**
421+
* Radxa E25 GPIO numbering enum
422+
*/
423+
typedef enum {
424+
MRAA_RADXA_E25_PIN3 = 3,
425+
MRAA_RADXA_E25_PIN5 = 5,
426+
MRAA_RADXA_E25_PIN7 = 7,
427+
MRAA_RADXA_E25_PIN8 = 8,
428+
MRAA_RADXA_E25_PIN10 = 10,
429+
MRAA_RADXA_E25_PIN11 = 11,
430+
MRAA_RADXA_E25_PIN12 = 12,
431+
MRAA_RADXA_E25_PIN13 = 13,
432+
MRAA_RADXA_E25_PIN15 = 15,
433+
MRAA_RADXA_E25_PIN16 = 16,
434+
MRAA_RADXA_E25_PIN17 = 17,
435+
MRAA_RADXA_E25_PIN18 = 18,
436+
MRAA_RADXA_E25_PIN19 = 19,
437+
MRAA_RADXA_E25_PIN21 = 21,
438+
MRAA_RADXA_E25_PIN22 = 22,
439+
MRAA_RADXA_E25_PIN23 = 23,
440+
MRAA_RADXA_E25_PIN24 = 24,
441+
MRAA_RADXA_E25_PIN26 = 26
442+
} mraa_radxa_e25_wiring_t;
443+
419444
/**
420445
* ROCKPI4 GPIO numbering enum
421446
*/

‎api/mraa/types.hpp‎

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,7 @@ typedef enum {
7272
RADXA_CM3 = 33, /**< Radxa CM3 */
7373
RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
7474
RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
75+
RADXA_E25 = 36, /**< Radxa E25 */
7576

7677
FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
7778

@@ -407,6 +408,30 @@ typedef enum {
407408
RADXA_CM3_IO_PIN40 = 40
408409
} RadxaCM3IOWiring;
409410

411+
/**
412+
* Radxa E25 GPIO numbering enum
413+
*/
414+
typedef enum {
415+
RADXA_E25_PIN3 = 3,
416+
RADXA_E25_PIN5 = 5,
417+
RADXA_E25_PIN7 = 7,
418+
RADXA_E25_PIN8 = 8,
419+
RADXA_E25_PIN10 = 10,
420+
RADXA_E25_PIN11 = 11,
421+
RADXA_E25_PIN12 = 12,
422+
RADXA_E25_PIN13 = 13,
423+
RADXA_E25_PIN15 = 15,
424+
RADXA_E25_PIN16 = 16,
425+
RADXA_E25_PIN17 = 17,
426+
RADXA_E25_PIN18 = 18,
427+
RADXA_E25_PIN19 = 19,
428+
RADXA_E25_PIN21 = 21,
429+
RADXA_E25_PIN22 = 22,
430+
RADXA_E25_PIN23 = 23,
431+
RADXA_E25_PIN24 = 24,
432+
RADXA_E25_PIN26 = 26
433+
} RadxaE25Wiring;
434+
410435
/**
411436
* ROCKPI4 GPIO numbering enum
412437
*/

‎docs/index.java.md‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -55,6 +55,7 @@ Specific platform information for supported platforms is documented here:
5555
- @ref up-xtreme
5656
- @ref _orange_pi_prime
5757
- @ref radxa_cm3
58+
- @ref radxa_e25
5859
- @ref radxa_cm5_io
5960
- @ref radxa_rock_3a
6061
- @ref radxa_rock_3b

‎docs/index.md‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,7 @@ Specific platform information for supported platforms is documented here:
6363
- @ref upXtreme
6464
- @ref _orange_pi_prime
6565
- @ref radxa_cm3
66+
- @ref radxa_e25
6667
- @ref radxa_cm5_io
6768
- @ref radxa_rock_3a
6869
- @ref radxa_rock_3b

‎docs/radxa_e25.md‎

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
Radxa E25 {#_Radxa}
2+
====================
3+
4+
Radxa E25 is a Rockchip RK3568 based SBC(Single Board Computer) by Radxa. It can run Android or Linux. Radxa E25 features a four core ARM processor, 64bit dual channel 3200Mb/s LPDDR4, HDMI up to 4K60p, MIPI DSI, MIPI CSI, 3.5mm combo audio jack, Wi-Fi 6, Bluetooth 5.0, USB, GbE LAN, and 40-pin color expansion header. Radxa E25 is powered by the USB Type-C port, and supports 5V input only. The recommended power adapter is 5V/3A without SSD, or 5V/5A with SSD.
5+
6+
Interface notes
7+
---------------
8+
9+
- All UART ports support baud up to 1500000.
10+
- Radxa E25 v1.3 or earlier with 10-pin header are **NOT** supported. Only v1.4 or later with 26-pin header are supported.
11+
12+
Pin Mapping
13+
-----------
14+
15+
Radxa E25 has a 40-pin expansion header. Each pin is distinguished by the color.
16+
17+
| Function5| Function4| Function3| Function2| Function1| PIN | PIN | Function1| Function2| Function3| Function4| Function5|
18+
|-------------|-------------|-----------|-----------|-----------|:------|------:|-----------|-------------|-----------|------------|------------|
19+
| | | | | 3V3 | 1 | 2 | +5.0V | | | | |
20+
| | |I2C3_SDA_M0|UART3_RX_M0|GPIO1_A0 | 3 | 4 | +5.0V | | | | |
21+
| | |I2C3_SCL_M0|UART3_TX_M0|GPIO1_A1 | 5 | 6 | GND | | | | |
22+
| |PWM12_M0 | |UART3_TX_M1|GPIO3_B7 | 7 | 8 | GPIO3_C2| UART5_TX_M1| | |SPI1_MISO_M1|
23+
| | | | | GND | 9 | 10 | GPIO3_C3| UART5_RX_M1| | | SPI1_CLK_M1|
24+
| |PWM14_M0 | |UART7_TX_M1|GPIO3_C4 | 11 | 12 | GPIO3_A3| | | | |
25+
| | | |UART7_RX_M1|GPIO3_C5 | 13 | 14 | GND | | | | |
26+
|SPI1_MOSI_M1 | | | |GPIO3_C1 | 15 | 16 | GPIO2_D2| | | | SPI0_CSO_M1|
27+
|SPI1_CSO_M1 | | | |GPIO3_A1 | 17 | 18 | GPIO0_C6| | | PWM7_IR| SPI0_CS0_M0|
28+
|SPI0_MOSI_M1 | | | |GPIO2_D1 | 19 | 20 | GND | | | | |
29+
|SPI0_MISO_M1 | | | |GPIO2_D0 | 21 | 22 |SARADC_VIN5| | | | |
30+
|SPI0_CLK_M1 | | | |GPIO2_D3 | 23 | 24 | GPIO4_C6| | | PWM13_M1| |
31+
| | | | | GND | 25 | 26 | GPIO3_C0| UART3_RX_M1| | PWM13_M0| |
32+
33+
Supports
34+
--------
35+
36+
You can find additional product support in the following channels:
37+
38+
- [Product Info](https://docs.radxa.com/en/rock3/e25)
39+
- [Forums](https://forum.radxa.com/c/rock3)
40+
- [Github](https://github.com/radxa)

‎include/arm/radxa_e25.h‎

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,30 @@
1+
/*
2+
* Author: Nascs <[email protected]>
3+
* Copyright (c) 2023 Radxa Limited.
4+
*
5+
* SPDX-License-Identifier: MIT
6+
*/
7+
8+
#pragma once
9+
10+
#ifdef __cplusplus
11+
extern "C" {
12+
#endif
13+
14+
#include "mraa_internal.h"
15+
16+
#define MRAA_RADXA_E25_GPIO_COUNT 17
17+
#define MRAA_RADXA_E25_I2C_COUNT 1
18+
#define MRAA_RADXA_E25_SPI_COUNT 2
19+
#define MRAA_RADXA_E25_UART_COUNT 3
20+
#define MRAA_RADXA_E25_PWM_COUNT 6
21+
#define MRAA_RADXA_E25_AIO_COUNT 1
22+
#define MRAA_RADXA_E25_PIN_COUNT 26
23+
#define PLATFORM_NAME_RADXA_E25 "Radxa E25 Carrier Board"
24+
25+
mraa_board_t *
26+
mraa_radxa_e25();
27+
28+
#ifdef __cplusplus
29+
}
30+
#endif

‎src/CMakeLists.txt‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -111,6 +111,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
111111
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_3b.c
112112
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_3c.c
113113
${PROJECT_SOURCE_DIR}/src/arm/radxa_cm3.c
114+
${PROJECT_SOURCE_DIR}/src/arm/radxa_e25.c
114115
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5a.c
115116
${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_5b.c
116117
${PROJECT_SOURCE_DIR}/src/arm/radxa_cm5_io.c

‎src/arm/arm.c‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,7 @@
1111

1212
#include "arm/96boards.h"
1313
#include "arm/radxa_cm3.h"
14+
#include "arm/radxa_e25.h"
1415
#include "arm/radxa_rock_3a.h"
1516
#include "arm/radxa_rock_3b.h"
1617
#include "arm/radxa_rock_3c.h"
@@ -103,6 +104,8 @@ mraa_arm_platform()
103104
mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_CM3_IO_2) ||
104105
mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_CM3_RPI_CM4_IO))
105106
platform_type = MRAA_RADXA_CM3;
107+
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_E25))
108+
platform_type = MRAA_RADXA_E25;
106109
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_3A))
107110
platform_type = MRAA_RADXA_ROCK_3A;
108111
else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_3B))
@@ -149,6 +152,9 @@ mraa_arm_platform()
149152
case MRAA_RADXA_CM3:
150153
plat = mraa_radxa_cm3();
151154
break;
155+
case MRAA_RADXA_E25:
156+
plat = mraa_radxa_e25();
157+
break;
152158
case MRAA_RADXA_ROCK_3A:
153159
plat = mraa_radxa_rock_3a();
154160
break;

‎src/arm/radxa_e25.c‎

Lines changed: 141 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,141 @@
1+
/*
2+
* Author: Nascs <[email protected]>
3+
* Copyright (c) 2023 Radxa Limited.
4+
*
5+
* SPDX-License-Identifier: MIT
6+
*/
7+
8+
#include <mraa/common.h>
9+
#include <stdarg.h>
10+
#include <stdlib.h>
11+
#include <string.h>
12+
#include <sys/mman.h>
13+
#include "arm/radxa_e25.h"
14+
#include "common.h"
15+
16+
const char* radxa_e25_serialdev[MRAA_RADXA_E25_UART_COUNT] = { "/dev/ttyS3", "/dev/ttyS5", "/dev/ttyS7" };
17+
18+
void
19+
mraa_radxa_e25_pininfo(mraa_board_t* board, int index, int gpio_chip, int gpio_line, mraa_pincapabilities_t pincapabilities_t, char* pin_name)
20+
{
21+
22+
if (index > board->phy_pin_count)
23+
return;
24+
25+
mraa_pininfo_t* pininfo = &board->pins[index];
26+
strncpy(pininfo->name, pin_name, MRAA_PIN_NAME_SIZE);
27+
28+
if (pincapabilities_t.gpio == 1) {
29+
pininfo->gpio.gpio_chip = gpio_chip;
30+
pininfo->gpio.gpio_line = gpio_line;
31+
}
32+
33+
pininfo->capabilities = pincapabilities_t;
34+
35+
pininfo->gpio.mux_total = 0;
36+
}
37+
38+
mraa_board_t*
39+
mraa_radxa_e25()
40+
{
41+
mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t));
42+
if (b == NULL) {
43+
return NULL;
44+
}
45+
46+
b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t));
47+
if (b->adv_func == NULL) {
48+
free(b);
49+
return NULL;
50+
}
51+
52+
// pin mux for buses are setup by default by kernel so tell mraa to ignore them
53+
b->no_bus_mux = 1;
54+
b->phy_pin_count = MRAA_RADXA_E25_PIN_COUNT + 1;
55+
56+
if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_E25)) {
57+
b->platform_name = PLATFORM_NAME_RADXA_E25;
58+
} else {
59+
printf("An unknown product detected. Fail early...\n");
60+
exit(-1);
61+
}
62+
63+
b->chardev_capable = 1;
64+
65+
// UART
66+
b->uart_dev_count = MRAA_RADXA_E25_UART_COUNT;
67+
b->def_uart_dev = 0;
68+
b->uart_dev[0].index = 3;
69+
b->uart_dev[1].index = 5;
70+
b->uart_dev[2].index = 7;
71+
b->uart_dev[0].device_path = (char*) radxa_e25_serialdev[0];
72+
b->uart_dev[1].device_path = (char*) radxa_e25_serialdev[1];
73+
b->uart_dev[2].device_path = (char*) radxa_e25_serialdev[2];
74+
75+
// I2C
76+
b->i2c_bus_count = MRAA_RADXA_E25_I2C_COUNT;
77+
b->def_i2c_bus = 0;
78+
b->i2c_bus[0].bus_id = 3;
79+
80+
// SPI
81+
b->spi_bus_count = MRAA_RADXA_E25_SPI_COUNT;
82+
b->def_spi_bus = 0;
83+
b->spi_bus[0].bus_id = 0;
84+
b->spi_bus[1].bus_id = 1;
85+
86+
// PWM
87+
b->pwm_dev_count = MRAA_RADXA_E25_PWM_COUNT;
88+
b->pwm_default_period = 500;
89+
b->pwm_max_period = 2147483;
90+
b->pwm_min_period = 1;
91+
92+
b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count);
93+
if (b->pins == NULL) {
94+
free(b->adv_func);
95+
free(b);
96+
return NULL;
97+
}
98+
99+
b->pins[7].pwm.parent_id = 12; // pwm12-m0
100+
b->pins[7].pwm.mux_total = 0;
101+
b->pins[11].pwm.parent_id = 14; // pwm14-m0
102+
b->pins[11].pwm.mux_total = 0;
103+
b->pins[13].pwm.parent_id = 1; // pwm15-m0
104+
b->pins[13].pwm.mux_total = 0;
105+
b->pins[18].pwm.parent_id = 7; // pwm7-m0
106+
b->pins[18].pwm.mux_total = 0;
107+
b->pins[24].pwm.parent_id = 13; // pwm13-m1
108+
b->pins[24].pwm.mux_total = 0;
109+
b->pins[26].pwm.parent_id = 4; // pwm13-m0
110+
b->pins[26].pwm.mux_total = 0;
111+
112+
mraa_radxa_e25_pininfo(b, 0, -1, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID");
113+
mraa_radxa_e25_pininfo(b, 1, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3.3V");
114+
mraa_radxa_e25_pininfo(b, 2, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5.0V");
115+
mraa_radxa_e25_pininfo(b, 3, 1, 0, (mraa_pincapabilities_t){1,1,0,0,0,1,0,1}, "GPIO1_A0");
116+
mraa_radxa_e25_pininfo(b, 4, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5.0V");
117+
mraa_radxa_e25_pininfo(b, 5, 1, 1, (mraa_pincapabilities_t){1,1,0,0,0,1,0,1}, "GPIO1_A1");
118+
mraa_radxa_e25_pininfo(b, 6, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
119+
mraa_radxa_e25_pininfo(b, 7, 3, 15, (mraa_pincapabilities_t){1,1,1,0,0,0,0,1}, "GPIO3_B7");
120+
mraa_radxa_e25_pininfo(b, 8, 3, 18, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "GPIO3_C2");
121+
mraa_radxa_e25_pininfo(b, 9, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
122+
mraa_radxa_e25_pininfo(b, 10, 3, 19, (mraa_pincapabilities_t){1,1,0,0,1,0,0,1}, "GPIO3_C3");
123+
mraa_radxa_e25_pininfo(b, 11, 3, 20, (mraa_pincapabilities_t){1,1,1,0,0,0,0,1}, "GPIO3_C4");
124+
mraa_radxa_e25_pininfo(b, 12, 3, 3, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "GPIO3_A3");
125+
mraa_radxa_e25_pininfo(b, 13, 3, 21, (mraa_pincapabilities_t){1,1,1,0,0,0,0,1}, "GPIO3_C5");
126+
mraa_radxa_e25_pininfo(b, 14, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
127+
mraa_radxa_e25_pininfo(b, 15, 3, 17, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO3_C1");
128+
mraa_radxa_e25_pininfo(b, 16, 2, 26, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO2_D2");
129+
mraa_radxa_e25_pininfo(b, 17, 3, 1, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO3_A1");
130+
mraa_radxa_e25_pininfo(b, 18, 0, 22, (mraa_pincapabilities_t){1,1,1,0,1,0,0,0}, "GPIO0_C6");
131+
mraa_radxa_e25_pininfo(b, 19, 2, 25, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO2_D1");
132+
mraa_radxa_e25_pininfo(b, 20, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
133+
mraa_radxa_e25_pininfo(b, 21, 2, 24, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO2_D0");
134+
mraa_radxa_e25_pininfo(b, 22, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,1,0}, "SARADC_VIN5");
135+
mraa_radxa_e25_pininfo(b, 23, 2, 27, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "GPIO2_D3");
136+
mraa_radxa_e25_pininfo(b, 24, 4, 22, (mraa_pincapabilities_t){1,1,1,0,0,0,0,0}, "GPIO4_C6");
137+
mraa_radxa_e25_pininfo(b, 25, -1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND");
138+
mraa_radxa_e25_pininfo(b, 26, 3, 16, (mraa_pincapabilities_t){1,1,1,0,0,0,0,1}, "GPIO3_C0");
139+
140+
return b;
141+
}

0 commit comments

Comments
 (0)