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platform: add Radxa ROCK 3A platform support
Signed-off-by: Nascs <[email protected]>
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‎README.md‎

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@@ -46,6 +46,7 @@ ARM
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* [96Boards](../master/docs/96boards.md)
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* [ADLINK IPi-SMARC ARM](../master/docs/adlink_ipi_arm.md)
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* [Radxa CM3](../master/docs/radxa_cm3.md)
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* [Radxa ROCK 3A](../master/docs/radxa_rock_3a.md)
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* [Radxa ROCK 3B](../master/docs/radxa_rock_3b.md)
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* [Radxa ROCK 3C](../master/docs/radxa_rock_3c.md)
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* [Radxa ROCK 5A](../master/docs/radxa_rock_5a.md)

‎api/mraa/types.h‎

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@@ -77,6 +77,7 @@ typedef enum {
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MRAA_RADXA_ROCK_3B = 32, /**< Radxa ROCK 3 Model B */
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MRAA_RADXA_CM3 = 33, /**< Radxa CM3 */
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MRAA_RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
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MRAA_RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
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// USB platform extenders start at 256
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MRAA_FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
@@ -283,6 +284,40 @@ typedef enum {
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RADXA_CM5_IO_PIN40 = 40
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} mraa_radxa_cm5_io_wiring_t;
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/**
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* Radxa ROCK 3 Model A GPIO numbering enum
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*/
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typedef enum {
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MRAA_RADXA_ROCK_3A_PIN3 = 3,
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MRAA_RADXA_ROCK_3A_PIN5 = 5,
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MRAA_RADXA_ROCK_3A_PIN7 = 7,
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MRAA_RADXA_ROCK_3A_PIN8 = 8,
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MRAA_RADXA_ROCK_3A_PIN10 = 10,
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MRAA_RADXA_ROCK_3A_PIN11 = 11,
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MRAA_RADXA_ROCK_3A_PIN12 = 12,
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MRAA_RADXA_ROCK_3A_PIN13 = 13,
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MRAA_RADXA_ROCK_3A_PIN15 = 15,
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MRAA_RADXA_ROCK_3A_PIN16 = 16,
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MRAA_RADXA_ROCK_3A_PIN17 = 17,
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MRAA_RADXA_ROCK_3A_PIN18 = 18,
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MRAA_RADXA_ROCK_3A_PIN19 = 19,
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MRAA_RADXA_ROCK_3A_PIN21 = 21,
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MRAA_RADXA_ROCK_3A_PIN23 = 23,
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MRAA_RADXA_ROCK_3A_PIN24 = 24,
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MRAA_RADXA_ROCK_3A_PIN26 = 26,
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MRAA_RADXA_ROCK_3A_PIN27 = 27,
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MRAA_RADXA_ROCK_3A_PIN28 = 28,
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MRAA_RADXA_ROCK_3A_PIN29 = 29,
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MRAA_RADXA_ROCK_3A_PIN31 = 31,
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MRAA_RADXA_ROCK_3A_PIN32 = 32,
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MRAA_RADXA_ROCK_3A_PIN33 = 33,
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MRAA_RADXA_ROCK_3A_PIN35 = 35,
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MRAA_RADXA_ROCK_3A_PIN36 = 36,
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MRAA_RADXA_ROCK_3A_PIN37 = 37,
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MRAA_RADXA_ROCK_3A_PIN38 = 38,
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MRAA_RADXA_ROCK_3A_PIN40 = 40
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} mraa_radxa_rock_3a_wiring_t;
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/**
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* Radxa ROCK 3 Model B GPIO numbering enum
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*/

‎api/mraa/types.hpp‎

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@@ -71,6 +71,7 @@ typedef enum {
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RADXA_ROCK_3B = 32, /**< Radxa ROCK 3 Model B */
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RADXA_CM3 = 33, /**< Radxa CM3 */
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RADXA_CM5_IO = 34, /**< Radxa CM5 IO */
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RADXA_ROCK_3A = 35, /**< Radxa ROCK 3 Model A */
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FTDI_FT4222 = 256, /**< FTDI FT4222 USB to i2c bridge */
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RADXA_CM5_IO_PIN40 = 40
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} RadxaCM5IOWiring;
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/**
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* Radxa ROCK 3 Model A GPIO numbering enum
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*/
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typedef enum {
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RADXA_ROCK_3A_PIN3 = 3,
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RADXA_ROCK_3A_PIN5 = 5,
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RADXA_ROCK_3A_PIN7 = 7,
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RADXA_ROCK_3A_PIN8 = 8,
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RADXA_ROCK_3A_PIN10 = 10,
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RADXA_ROCK_3A_PIN11 = 11,
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RADXA_ROCK_3A_PIN12 = 12,
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RADXA_ROCK_3A_PIN13 = 13,
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RADXA_ROCK_3A_PIN15 = 15,
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RADXA_ROCK_3A_PIN16 = 16,
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RADXA_ROCK_3A_PIN17 = 17,
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RADXA_ROCK_3A_PIN18 = 18,
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RADXA_ROCK_3A_PIN19 = 19,
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RADXA_ROCK_3A_PIN21 = 21,
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RADXA_ROCK_3A_PIN23 = 23,
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RADXA_ROCK_3A_PIN24 = 24,
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RADXA_ROCK_3A_PIN26 = 26,
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RADXA_ROCK_3A_PIN27 = 27,
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RADXA_ROCK_3A_PIN28 = 28,
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RADXA_ROCK_3A_PIN29 = 29,
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RADXA_ROCK_3A_PIN31 = 31,
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RADXA_ROCK_3A_PIN32 = 32,
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RADXA_ROCK_3A_PIN33 = 33,
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RADXA_ROCK_3A_PIN35 = 35,
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RADXA_ROCK_3A_PIN36 = 36,
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RADXA_ROCK_3A_PIN37 = 37,
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RADXA_ROCK_3A_PIN38 = 38,
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RADXA_ROCK_3A_PIN40 = 40
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} RadxaRock3AWiring;
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/**
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* Radxa ROCK 3 Model B GPIO numbering enum
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*/

‎docs/index.java.md‎

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@@ -56,6 +56,7 @@ Specific platform information for supported platforms is documented here:
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- @ref _orange_pi_prime
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- @ref radxa_cm3
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- @ref radxa_cm5_io
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- @ref radxa_rock_3a
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- @ref radxa_rock_3b
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- @ref radxa_rock_3c
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- @ref radxa_rock_5a

‎docs/index.md‎

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@@ -64,6 +64,7 @@ Specific platform information for supported platforms is documented here:
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- @ref _orange_pi_prime
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- @ref radxa_cm3
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- @ref radxa_cm5_io
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- @ref radxa_rock_3a
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- @ref radxa_rock_3b
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- @ref radxa_rock_3c
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- @ref radxa_rock_5a

‎docs/radxa_rock_3a.md‎

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Radxa ROCK 3 Model A {#_Radxa}
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====================
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Radxa ROCK 3 Model A is a Rockchip RK3568 based SBC(Single Board Computer) by Radxa. It can run Android or Linux. Radxa ROCK 3 Model A features a four core ARM processor, 64bit dual channel 3200Mb/s LPDDR4, HDMI up to 4K60p, MIPI DSI, MIPI CSI, 3.5mm combo audio jack, Wi-Fi 6, Bluetooth 5.0, USB, GbE LAN, and 40-pin color expansion header. Radxa ROCK 3 Model A is powered by the USB Type-C port, and supports 5V input only. The recommended power adapter is 5V/3A without SSD, or 5V/5A with SSD.
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Interface notes
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---------------
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- UART2 is enabled as the default console.
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- All UART ports support baud up to 1500000.
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Pin Mapping
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-----------
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Radxa ROCK 3 Model A has a 40-pin expansion header. Each pin is distinguished by the color.
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| Function5| Function4| Function3| Function2| Function1| PIN | PIN | Function1| Function2| Function3| Function4| Function5|
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|-------------|-------------|-----------|-------------|-----------|:------|------:|----------|-------------|-----------|------------|------------|
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| | | | | 3V3| 1 | 2 |+5.0V | | | | |
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| | |UART3_RX_M0| I2C3_SDA_M0| GPIO1_A0| 3 | 4 |+5.0V | | | | |
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| | |UART3_TX_M0| I2C3_SCL_M0| GPIO1_A1| 5 | 6 |GND | |UART2_TXD | | |
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| | PWM1_M1| | I2C2_SCL_M0| GPIO0_B5| 7 | 8 |GPIO0_D1 | |UART2_RXD | | |
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| | | | | GND| 9 | 10 |GPIO0_D0 | | | | |
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| | PWM14_M0|UART7_TX_M1| | GPIO3_C4| 11 | 12 |GPIO3_A3 | | | | |
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| | PWM15_IR_M0|UART7_RX_M1| | GPIO3_C5| 13 | 14 |GND | | | | |
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| | PWM1_M0| UART0_RX| | GPIO0_C0| 15 | 16 |GPIO0_B6 |I2C2_SDA_M0 | |PWM2_M1 | |
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| | | | | 3V3| 17 | 18 |GPIO3_B2 | |UART4_TX_M1| | |
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| SPI3_MOSI_M1| PWM15_IR_M1| | | GPIO4_C3| 19 | 20 |GND | | | | |
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| SPI3_MISO_M1| PWM12_M1|UART9_TX_M1| | GPIO4_C5| 21 | 22 |GPIO0_C1 | |UART0_TX |PWM2_M0 | |
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| SPI3_CLK_M1| PWM14_M1| | | GPIO4_C2| 23 | 24 |GPIO4_C6 | |UART9_RX_M1|PWM13_M1 |SPI3_CS0_M1 |
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| | | | | GND| 25 | 26 |GPIO4_D1 | | | |SPI3_CS1_M1 |
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| | PWM2_M1| | I2C1_SDA| GPIO0_B4| 27 | 28 |GPIO0_B3 |I2C1_SCL | |PWM1_M1 | |
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| | |UART8_TX_M1| | GPIO2_D7| 29 | 30 |GND | | | | |
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| SPI2_CLK_M1| |UART8_RX_M1| | GPIO3_A0| 31 | 32 |GPIO3_C2 | |UART5_TX_M1| | |
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| | |UART5_RX_M1| | GPIO3_C3| 33 | 34 |GND | | | | |
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| | | | | GPIO3_A4| 35 | 36 |GPIO3_A2 | | | | |
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| | | | |SARADC_VIN5| 37 | 38 |GPIO3_A6 | | | | |
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| | | | | GND| 39 | 40 |GPIO3_A5 | | | | |
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Supports
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--------
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You can find additional product support in the following channels:
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- [Product Info](https://docs.radxa.com/en/rock3/rock3a)
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- [Forums](https://forum.radxa.com/c/rock3)
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- [Github](https://github.com/radxa)

‎include/arm/radxa_rock_3a.h‎

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/*
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* Author: Nascs <[email protected]>
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* Copyright (c) Radxa Limited.
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*
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* SPDX-License-Identifier: MIT
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*/
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#pragma once
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "mraa_internal.h"
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#define MRAA_RADXA_ROCK_3A_GPIO_COUNT 28
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#define MRAA_RADXA_ROCK_3A_I2C_COUNT 3
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#define MRAA_RADXA_ROCK_3A_SPI_COUNT 1
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#define MRAA_RADXA_ROCK_3A_UART_COUNT 7
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#define MRAA_RADXA_ROCK_3A_PWM_COUNT 11
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#define MRAA_RADXA_ROCK_3A_AIO_COUNT 1
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#define MRAA_RADXA_ROCK_3A_PIN_COUNT 40
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#define PLATFORM_NAME_RADXA_ROCK_3A "Radxa ROCK3 Model A"
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mraa_board_t *
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mraa_radxa_rock_3a();
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#ifdef __cplusplus
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}
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#endif

‎src/CMakeLists.txt‎

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@@ -107,6 +107,7 @@ set (mraa_LIB_ARM_SRCS_NOAUTO
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${PROJECT_SOURCE_DIR}/src/arm/phyboard.c
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${PROJECT_SOURCE_DIR}/src/arm/banana.c
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${PROJECT_SOURCE_DIR}/src/arm/de_nano_soc.c
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${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_3a.c
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${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_3b.c
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${PROJECT_SOURCE_DIR}/src/arm/radxa_rock_3c.c
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${PROJECT_SOURCE_DIR}/src/arm/radxa_cm3.c

‎src/arm/arm.c‎

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#include "arm/96boards.h"
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#include "arm/radxa_cm3.h"
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#include "arm/radxa_rock_3a.h"
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#include "arm/radxa_rock_3b.h"
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#include "arm/radxa_rock_3c.h"
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#include "arm/radxa_rock_5a.h"
@@ -102,6 +103,8 @@ mraa_arm_platform()
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mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_CM3_IO_2) ||
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mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_CM3_RPI_CM4_IO))
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platform_type = MRAA_RADXA_CM3;
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else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_3A))
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platform_type = MRAA_RADXA_ROCK_3A;
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else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_3B))
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platform_type = MRAA_RADXA_ROCK_3B;
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else if (mraa_file_contains("/proc/device-tree/model", PLATFORM_NAME_RADXA_ROCK_3C))
@@ -146,6 +149,9 @@ mraa_arm_platform()
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case MRAA_RADXA_CM3:
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plat = mraa_radxa_cm3();
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break;
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case MRAA_RADXA_ROCK_3A:
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plat = mraa_radxa_rock_3a();
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break;
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case MRAA_RADXA_ROCK_3B:
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plat = mraa_radxa_rock_3b();
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break;

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