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| 1 | +/* |
| 2 | + * Author: Gunjan <[email protected]> |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: MIT |
| 5 | + */ |
| 6 | + |
| 7 | +#include <mraa/common.h> |
| 8 | +#include <stdarg.h> |
| 9 | +#include <stdlib.h> |
| 10 | +#include <string.h> |
| 11 | +#include <sys/mman.h> |
| 12 | + |
| 13 | +#include "arm/orange_pi_prime.h" |
| 14 | +#include "common.h" |
| 15 | + |
| 16 | +#define DT_BASE "/proc/device-tree" |
| 17 | + |
| 18 | +#define PLATFORM_NAME_ORANGE_PI_PRIME "Xunlong Orange Pi Prime" |
| 19 | +#define MAX_SIZE 64 |
| 20 | + |
| 21 | +#define ORANGE_PI_PRIME_SPI_CS_DEV "/dev/spidev1.1" |
| 22 | + |
| 23 | +#define ORANGE_PI_PRIME_SERIALDEV "/dev/ttyS2" |
| 24 | + |
| 25 | +void |
| 26 | +mraa_orange_pi_prime_pininfo(mraa_board_t* board, int index, int sysfs_pin, mraa_pincapabilities_t pincapabilities_t, char* fmt, ...) |
| 27 | +{ |
| 28 | + va_list arg_ptr; |
| 29 | + if (index > board->phy_pin_count) |
| 30 | + return; |
| 31 | + |
| 32 | + mraa_pininfo_t* pininfo = &board->pins[index]; |
| 33 | + va_start(arg_ptr, fmt); |
| 34 | + vsnprintf(pininfo->name, MRAA_PIN_NAME_SIZE, fmt, arg_ptr); |
| 35 | + |
| 36 | + if( pincapabilities_t.gpio == 1 ) { |
| 37 | + pininfo->gpio.gpio_chip = 1; |
| 38 | + pininfo->gpio.gpio_line = sysfs_pin; |
| 39 | + } |
| 40 | + |
| 41 | + pininfo->capabilities = pincapabilities_t; |
| 42 | + |
| 43 | + va_end(arg_ptr); |
| 44 | + pininfo->gpio.pinmap = sysfs_pin; |
| 45 | + pininfo->gpio.mux_total = 0; |
| 46 | +} |
| 47 | + |
| 48 | +mraa_board_t* |
| 49 | +mraa_orange_pi_prime() |
| 50 | +{ |
| 51 | + mraa_board_t* b = (mraa_board_t*) calloc(1, sizeof(mraa_board_t)); |
| 52 | + if (b == NULL) { |
| 53 | + return NULL; |
| 54 | + } |
| 55 | + |
| 56 | + b->adv_func = (mraa_adv_func_t*) calloc(1, sizeof(mraa_adv_func_t)); |
| 57 | + if (b->adv_func == NULL) { |
| 58 | + free(b); |
| 59 | + return NULL; |
| 60 | + } |
| 61 | + |
| 62 | + b->chardev_capable = 1; |
| 63 | + |
| 64 | + // pin mux for buses are setup using device tree overlays |
| 65 | + // so tell mraa to ignore them |
| 66 | + b->no_bus_mux = 1; |
| 67 | + b->phy_pin_count = MRAA_ORANGE_PI_PRIME_PIN_COUNT + 1; |
| 68 | + b->platform_name = PLATFORM_NAME_ORANGE_PI_PRIME; |
| 69 | + |
| 70 | + // uart2 |
| 71 | + b->uart_dev_count = MRAA_ORANGE_PI_PRIME_UART_COUNT; |
| 72 | + b->def_uart_dev = 0; |
| 73 | + b->uart_dev[0].device_path = ORANGE_PI_PRIME_SERIALDEV; |
| 74 | + |
| 75 | + // I2C |
| 76 | + b->i2c_bus_count = MRAA_ORANGE_PI_PRIME_I2C_COUNT; |
| 77 | + b->def_i2c_bus = 0; |
| 78 | + b->i2c_bus[0].bus_id = 0; |
| 79 | + b->i2c_bus[1].bus_id = 1; |
| 80 | + |
| 81 | + // SPI |
| 82 | + b->spi_bus_count = MRAA_ORANGE_PI_PRIME_SPI_COUNT; |
| 83 | + b->def_spi_bus = 0; |
| 84 | + b->spi_bus[0].bus_id = 1; |
| 85 | + |
| 86 | + // Depending on the overlay parameter, we might have slave select |
| 87 | + if (mraa_file_exist(ORANGE_PI_PRIME_SPI_CS_DEV)) { |
| 88 | + b->spi_bus[0].slave_s = 1; |
| 89 | + } |
| 90 | + |
| 91 | + b->pins = (mraa_pininfo_t*) malloc(sizeof(mraa_pininfo_t) * b->phy_pin_count); |
| 92 | + if (b->pins == NULL) { |
| 93 | + free(b->adv_func); |
| 94 | + free(b); |
| 95 | + return NULL; |
| 96 | + } |
| 97 | + |
| 98 | + // no analog I/O |
| 99 | + b->aio_count = 0; |
| 100 | + b->adc_raw = 0; |
| 101 | + b->adc_supported = 0; |
| 102 | + |
| 103 | + // Orange Pi Prime documentation shows pin 7 (PA6) as pwm1 pin |
| 104 | + // but Allwinner H5 doesn't list pwm as a function for PA6. |
| 105 | + // Hence no PWM for this board |
| 106 | + b->pwm_dev_count = 0; |
| 107 | + |
| 108 | + mraa_orange_pi_prime_pininfo(b, 0, -1, (mraa_pincapabilities_t){0,0,0,0,0,0,0,0}, "INVALID"); |
| 109 | + mraa_orange_pi_prime_pininfo(b, 1, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); |
| 110 | + mraa_orange_pi_prime_pininfo(b, 2, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); |
| 111 | + mraa_orange_pi_prime_pininfo(b, 3, 12, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "I2C0_SDA"); |
| 112 | + mraa_orange_pi_prime_pininfo(b, 4, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "5V"); |
| 113 | + mraa_orange_pi_prime_pininfo(b, 5, 11, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "I2C0_SCK"); |
| 114 | + mraa_orange_pi_prime_pininfo(b, 6, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 115 | + mraa_orange_pi_prime_pininfo(b, 7, 6, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PA6"); |
| 116 | + mraa_orange_pi_prime_pininfo(b, 8, 69, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC5"); |
| 117 | + mraa_orange_pi_prime_pininfo(b, 9, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 118 | + mraa_orange_pi_prime_pininfo(b, 10, 70, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC6"); |
| 119 | + mraa_orange_pi_prime_pininfo(b, 11, 1, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "UART2_RX"); |
| 120 | + mraa_orange_pi_prime_pininfo(b, 12, 110, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PD14"); |
| 121 | + mraa_orange_pi_prime_pininfo(b, 13, 0, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "UART2_TX"); |
| 122 | + mraa_orange_pi_prime_pininfo(b, 14, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 123 | + mraa_orange_pi_prime_pininfo(b, 15, 3, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "UART2_CTS"); |
| 124 | + mraa_orange_pi_prime_pininfo(b, 16, 68, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC4"); |
| 125 | + mraa_orange_pi_prime_pininfo(b, 17, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "3V3"); |
| 126 | + mraa_orange_pi_prime_pininfo(b, 18, 71, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC7"); |
| 127 | + mraa_orange_pi_prime_pininfo(b, 19, 15, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1_MOSI"); |
| 128 | + mraa_orange_pi_prime_pininfo(b, 20, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 129 | + mraa_orange_pi_prime_pininfo(b, 21, 16, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1_MISO"); |
| 130 | + mraa_orange_pi_prime_pininfo(b, 22, 2, (mraa_pincapabilities_t){1,1,0,0,0,0,0,1}, "UART2_RTS"); |
| 131 | + mraa_orange_pi_prime_pininfo(b, 23, 14, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1_CLK"); |
| 132 | + mraa_orange_pi_prime_pininfo(b, 24, 13, (mraa_pincapabilities_t){1,1,0,0,1,0,0,0}, "SPI1_CS"); |
| 133 | + mraa_orange_pi_prime_pininfo(b, 25, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 134 | + mraa_orange_pi_prime_pininfo(b, 26, 72, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC8"); |
| 135 | + mraa_orange_pi_prime_pininfo(b, 27, 19, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "I2C1_SDA"); |
| 136 | + mraa_orange_pi_prime_pininfo(b, 28, 18, (mraa_pincapabilities_t){1,1,0,0,0,1,0,0}, "I2C1_SCK"); |
| 137 | + mraa_orange_pi_prime_pininfo(b, 29, 7, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PA7"); |
| 138 | + mraa_orange_pi_prime_pininfo(b, 30, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 139 | + mraa_orange_pi_prime_pininfo(b, 31, 8, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PA8"); |
| 140 | + mraa_orange_pi_prime_pininfo(b, 32, 73, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC9"); |
| 141 | + mraa_orange_pi_prime_pininfo(b, 33, 9, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PA9"); |
| 142 | + mraa_orange_pi_prime_pininfo(b, 34, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 143 | + mraa_orange_pi_prime_pininfo(b, 35, 10, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PA10"); |
| 144 | + mraa_orange_pi_prime_pininfo(b, 36, 74, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC10"); |
| 145 | + mraa_orange_pi_prime_pininfo(b, 37, 107, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PD11"); |
| 146 | + mraa_orange_pi_prime_pininfo(b, 38, 75, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC11"); |
| 147 | + mraa_orange_pi_prime_pininfo(b, 39, -1, (mraa_pincapabilities_t){1,0,0,0,0,0,0,0}, "GND"); |
| 148 | + mraa_orange_pi_prime_pininfo(b, 40, 76, (mraa_pincapabilities_t){1,1,0,0,0,0,0,0}, "PC12"); |
| 149 | + |
| 150 | + return b; |
| 151 | +} |
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