diff --git a/Platform/Xiaomi/sm8150/nabu.dsc b/Platform/Xiaomi/sm8150/nabu.dsc
index 848f2a5b8..58477970c 100644
--- a/Platform/Xiaomi/sm8150/nabu.dsc
+++ b/Platform/Xiaomi/sm8150/nabu.dsc
@@ -17,7 +17,7 @@
 !include Platform/Qualcomm/sm8150/sm8150.dsc
 
 [BuildOptions.common]
-  GCC:*_*_AARCH64_CC_FLAGS = -DMEMMAP_XIAOMI_HACKS=1 -DENABLE_SIMPLE_INIT -DENABLE_LINUX_SIMPLE_MASS_STORAGE -DENABLE_LINUX_UTILS
+  GCC:*_*_AARCH64_CC_FLAGS = -DENABLE_PUS3 -DMEMMAP_XIAOMI_HACKS=1 -DENABLE_SIMPLE_INIT -DENABLE_LINUX_SIMPLE_MASS_STORAGE -DENABLE_LINUX_UTILS
 
 [PcdsFixedAtBuild.common]
   gQcomTokenSpaceGuid.PcdMipiFrameBufferWidth|1600
@@ -33,4 +33,15 @@
   gsm8150PkgTokenSpaceGuid.PcdSmbiosProcessorModel|"Snapdragon (TM) 860 @ 2.96 GHz"
 
   gQcomTokenSpaceGuid.PcdHallSensorPin|9
-  gQcomTokenSpaceGuid.PcdHallSensorActiveLow|TRUE
\ No newline at end of file
+  gQcomTokenSpaceGuid.PcdHallSensorActiveLow|TRUE
+
+  # Produce the highest video mode in Shell and UiApp
+[PcdsDynamicDefault.common]
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVideoHorizontalResolution|0 # /8 = column
+  gEfiMdeModulePkgTokenSpaceGuid.PcdVideoVerticalResolution|0 #/19 = row
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoHorizontalResolution|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupVideoVerticalResolution|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutRow|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdSetupConOutColumn|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutRow|0
+  gEfiMdeModulePkgTokenSpaceGuid.PcdConOutColumn|0
\ No newline at end of file
diff --git a/Silicon/Qualcomm/sm8150/Library/MsPlatformDevicesLib/MsPlatformDevicesLib.c b/Silicon/Qualcomm/sm8150/Library/MsPlatformDevicesLib/MsPlatformDevicesLib.c
index 645ef28ae..b0b552d9b 100644
--- a/Silicon/Qualcomm/sm8150/Library/MsPlatformDevicesLib/MsPlatformDevicesLib.c
+++ b/Silicon/Qualcomm/sm8150/Library/MsPlatformDevicesLib/MsPlatformDevicesLib.c
@@ -43,7 +43,11 @@ PlatformUpdateAcpiTables(VOID)
   UINT16                              SDFE  = 0;
   UINT16                              SIDM  = 0;
   UINT32                              SUFS  = 0xFFFFFFFF;
+  #ifdef ENABLE_PUS3
   UINT32                              PUS3  = 0x1;
+  #else
+  UINT32                              PUS3  = 0x0;
+  #endif
   UINT32                              SUS3  = 0xFFFFFFFF;
   UINT32                             *pSIDT = (UINT32 *)0x784130;
   UINT32                              SIDT  = (*pSIDT & 0xFF00000) >> 20;