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Commit f735d2a

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M0stafaRady
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Add user_proj_tests_gl.yaml and point to gen_default script
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Makefile

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@@ -111,11 +111,11 @@ setup-cocotb-env:
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.PHONY: cocotb-verify-all-rtl
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cocotb-verify-all-rtl:
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@(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -tl user_proj_tests/user_proj_tests.yaml $(COCOTB_ARGS) )
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.PHONY: cocotb-verify-all-gl
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@(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -tl user_proj_tests/user_proj_tests.yaml -gen_defaults_dir ./../../../dependencies/frigate $(COCOTB_ARGS) )
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.PHONY: cocotb-verify-all-gl
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cocotb-verify-all-gl:
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@(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -tl user_proj_tests/user_proj_tests_gl.yaml -sim GL $(COCOTB_ARGS))
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@(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -tl user_proj_tests/user_proj_tests_gl.yaml -sim GL -gen_defaults_dir ./../../../dependencies/frigate $(COCOTB_ARGS))
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$(cocotb-dv-targets-rtl): cocotb-verify-%-rtl:
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@(cd $(PROJECT_ROOT)/verilog/dv/cocotb && $(PROJECT_ROOT)/venv-cocotb/bin/caravel_cocotb -t $* $(COCOTB_ARGS))
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Tests:
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- {name: gpio_portA, sim: GL}

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