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Some VHDL simulation files not fully supported #84

@oscargus

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@oscargus

I created a VHDL file that used lots of different types and then simulated those using NVC and GHDL, dumping all available formats. It is clear that simulators dump things in the same format differently...

wavefiles.zip

The files ending with 2 contains a few more signals (arrays of records, strings, and signals with units), but otherwise are the same.

ghdl2.ghw crashes with

  not yet implemented: Support: TypeP32

All NVC-files triggers

TODO: handle Integer Natural better!
TODO: handle Integer Positive better!
TODO: handle String Character better!

Here one can note that NVC seems to store the character string escaped in VCD \'a\'. Maybe one can deal with that in the parser? One can also argue if it should be stored with ' around it or not. While in some sense correct, the actual information is the character. In VCD, NVC stores times (and variables with units) with \040 as space. Again, it would be nice if wellen could replace that with a space (there may be other situations where this happens as well).

Hence, one would need to handle escaped strings somehow, but one should also try to confirm how other simulators handle this to not break other cases.

(Interestingly GHDL stores strings as a union of enums in fst, so one gets an array with a separate signal for each character position padded with spaces. I may open an issue with GHDL to suggest that they are stored as strings, which would make things quite a bit easier on the viewer side. NVC worked out of the box.)

Edit: here are the escape patterns for strings btw https://github.com/gtkwave/libfst/blob/6a52070cd62ec65c29832bc95e7db493504aa7ac/src/fstapi.c#L6774

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